FDMC86259P P-Channel PowerTrench® MOSFET -150 V, -13 A, 107 m: Features General Description Max rDS(on) = 107 m: at VGS = -10 V, ID = -3 A This P-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced PowerTrench® process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. Max rDS(on) = 137 m: at VGS = -6 V, ID = -2.7 A Very low RDS-on mid voltage P channel silicon technology optimised for low Qg This product is optimised for fast switching applications as well as load switch applications Applications Active Clamp Switch 100% UIL Tested Load Switch RoHS Compliant Pin 1 Pin 1 S D D Top D S S S D S D S D G D G D Bottom Power 33 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous TC = 25 °C -Continuous TA = 25 °C ID TJ, TSTG ±25 V (Note 1a) -3.2 A -20 Single Pulse Avalanche Energy PD Units V -13 -Pulsed EAS Ratings -150 (Note 3) Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C 181 62 (Note 1a) Operating and Storage Junction Temperature Range 2.3 -55 to + 150 mJ W °C Thermal Characteristics RTJC Thermal Resistance, Junction to Case RTJA Thermal Resistance, Junction to Ambient 2.0 (Note 1a) 53 °C/W Package Marking and Ordering Information Device Marking FDMC86259P Device FDMC86259P ©2014 Fairchild Semiconductor Corporation FDMC86259P Rev.C Package Power 33 1 Reel Size 13’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMC86259P P-Channel PowerTrench® MOSFET February 2014 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = -250 PA, VGS = 0 V 'BVDSS 'TJ Breakdown Voltage Temperature Coefficient ID = -250 PA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = -120 V, VGS = 0 V -1 PA IGSS Gate to Source Leakage Current VGS = ±25 V, VDS = 0 V ±100 nA -4 V -150 V -88 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250 PA 'VGS(th) 'TJ Gate to Source Threshold Voltage Temperature Coefficient ID = -250 PA, referenced to 25 °C VGS = -10 V, ID = -3 A 87 107 rDS(on) Static Drain to Source On Resistance VGS = -6 V, ID = -2.7 A 99 137 VGS = -10 V, ID = -3 A,TJ = 125 °C 145 178 VDS = -10 V, ID = -3 A 12 gFS Forward Transconductance -2 -2.8 6 mV/°C m: S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = -75 V, VGS = 0 V, f = 1 MHz 0.1 1535 2045 pF 125 170 pF 6 10 pF 1.4 3 : Switching Characteristics td(on) Turn-On Delay Time 12 23 ns tr Rise Time 3.3 10 ns td(off) Turn-Off Delay Time 22 36 ns tf Fall Time 9.6 20 ns Qg(TOT) Total Gate Charge VGS = 0 V to -10 V 22 32 nC Qg(TOT) Total Gate Charge VGS = 0 V to -6 V 14 20 Qgs Total Gate Charge Qgd Gate to Drain “Miller” Charge VDD = -75 V, ID = -3 A, VGS = -10 V, RGEN = 6 : VDD = -75 V, ID = -3 A nC 5.7 nC 4.3 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = -3 A (Note 2) -0.80 -1.3 VGS = 0 V, IS = -1.9 A (Note 2) -0.78 -1.2 V 77 123 ns 208 333 nC IF = -3 A, di/dt = 100 A/Ps V NOTES: 1. RTJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RTJC is guaranteed by design while RTCA is determined by the user's board design. a) 53 °C/W when mounted on a 1 in2 pad of 2 oz copper b) 125 °C/W when mounted on a minimum pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 Ps, Duty cycle < 2.0%. 3. Starting TJ = 25 °C; P-ch: L = 3 mH, IAS = -11 A, VDD = -150 V, VGS = -10 V. 100% test at L = 0.1 mH, IAS = -34 A. ©2014 Fairchild Semiconductor Corporation FDMC86259P Rev.C 2 www.fairchildsemi.com FDMC86259P P-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted VGS = -10 V -ID, DRAIN CURRENT (A) VGS = -6 V 15 VGS = -5 V 10 VGS = -4.5 V 5 PULSE DURATION = 80 Ps DUTY CYCLE = 0.5% MAX VGS = -4 V 0 0 1 2 3 4 -VDS, DRAIN TO SOURCE VOLTAGE (V) 4 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 20 VGS = -4 V 3 VGS = -4.5 V 2 VGS = -5 V 1 PULSE DURATION = 80Ps DUTY CYCLE = 0.5% MAX 0 5 10 15 20 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 2.2 300 ID = -3 A VGS = -10 V 2.0 PULSE DURATION = 80 Ps DUTY CYCLE = 0.5% MAX SOURCE ON-RESISTANCE (m:) 250 1.8 rDS(on), DRAIN TO NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 5 -ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics 1.6 1.4 1.2 1.0 0.8 ID =-3 A 200 TJ = 125 oC 150 TJ = 25 oC 100 0.6 0.4 -75 -50 50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) -IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 Ps DUTY CYCLE = 0.5% MAX 15 VDS = -5 V 10 TJ = 150 oC TJ = 25 oC TJ = -55 oC 0 2 3 4 5 5 6 7 8 9 10 30 10 VGS = 0 V TJ = 150 oC 1 TJ = 25 oC 0.1 TJ = -55 oC 0.01 0.001 0.0 6 -VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics ©2014 Fairchild Semiconductor Corporation FDMC86259P Rev.C 4 Figure 4. On-Resistance vs Gate to Source Voltage 20 5 3 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs Junction Temperature -ID, DRAIN CURRENT (A) 0 VGS = -10 V VGS = -6 V Figure 6. Source to Drain Diode Forward Voltage vs Source Current 3 www.fairchildsemi.com FDMC86259P P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 10000 ID = -3 A Ciss VDD = -50 V 8 CAPACITANCE (pF) -VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = -75 V 6 VDD = -100 V 4 1000 Coss 100 Crss 10 2 0 f = 1 MHz VGS = 0 V 0 5 10 15 20 1 0.1 25 1 10 100 -VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 100 20 o -ID, DRAIN CURRENT (A) -IAS, AVALANCHE CURRENT (A) RTJC = 2.0 C/W TJ = 25 oC 10 TJ = 100 oC TJ = 125 oC 1 0.001 0.01 0.1 1 10 16 12 VGS = -10 V 8 4 0 25 100 50 150 20000 P(PK), PEAK TRANSIENT POWER (W) 10 Ps -ID, DRAIN CURRENT (A) 125 Figure 10. Maximum Continuous Drain Current vs Case Temperature 100 100 Ps THIS AREA IS LIMITED BY rDS(on) 1 ms SINGLE PULSE TJ = MAX RATED o RTJC = 2.0 C/W TC = 25 oC 10 ms DC CURVE BENT TO MEASURED DATA 1 10 100 500 TC = 25 oC 1000 100 10 -5 10 -4 10 -3 10 -2 10 -1 10 1 t, PULSE WIDTH (sec) -VDS, DRAIN to SOURCE VOLTAGE (V) Figure 12. Single Pulse Maximum Power Dissipation Figure 11. Forward Bias Safe Operating Area ©2014 Fairchild Semiconductor Corporation FDMC86259P Rev.C SINGLE PULSE RTJC = 2.0 oC/W 10000 10 0.01 0.1 100 TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability 0.1 75 o tAV, TIME IN AVALANCHE (ms) 1 VGS = -6 V Limited by Package 4 www.fairchildsemi.com FDMC86259P P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 DUTY CYCLE-DESCENDING ORDER 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: ZTJC(t) = r(t) x RTJC RTJC = 2.0 oC/W Peak TJ = PDM x ZTJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE 0.01 0.005 -5 10 -4 10 -3 -2 10 10 -1 10 1 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Case Transient Thermal Response Curve ©2014 Fairchild Semiconductor Corporation FDMC86259P Rev.C 5 www.fairchildsemi.com FDMC86259P P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 3.40 3.20 PKG CL 8 2.37 MIN A (0.45) 8 B 5 PKG CL 3.40 3.20 PKG CL SYM CL 5 2.15 MIN (0.40) (0.65) 0.70 MIN PIN 1 INDICATOR 1 4 1 4 0.65 1.95 SEE DETAIL A 0.42 MIN (8X) LAND PATTERN RECOMMENDATION 1.95 0.10 C A B 0.37 (8X) 0.27 0.65 1 4 0.50 0.30 PKG CL 2.05 1.85 8 (0.34) (0.52 TYP) NOTES: UNLESS OTHERWISE SPECIFIED A) PACKAGE STANDARD REFERENCE: JEDEC MO-240, ISSUE A, VAR. BA, DATED OCTOBER 2002. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM. D) DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994. E) DRAWING FILE NAME: PQFN08HREV1 5 (0.33) TYP (2.27) 0.10 C 0.80 0.70 0.08 C 0.25 0.15 0.05 0.00 C SEATING PLANE DETAIL A SCALE: 2X Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/dwg/PQ/PQFN08H.pdf. ©2014 Fairchild Semiconductor Corporation FDMC86259P Rev.C 6 www.fairchildsemi.com FDMC86259P P-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I66 ©2014 Fairchild Semiconductor Corporation7www.fairchildsemi.com FDMC86259P Rev.C FDMC86259P P-Channel PowerTrench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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