HP HSDL-3601/007 Irda compliant 4 mb/s 5 v infrared transceiver Datasheet

IrDA® Compliant 4 Mb/s 5 V
Infrared Transceiver
Technical Data
HSDL-3601#007
HSDL-3601#008
Features
Applications
• Fully Compliant to IrDA 1.1
Physical Layer Specifications
- 9.6 kb/s to 4 Mb/s operation
• Typical Link Distance
> 1.5 m
• Compatible with ASK, HPSIR, and TV Remote
• IEC825-Class 1 Eye Safe
• Low Power Operation
- 4.75 V to 5.25 V
• Small Module Size
- 4.0 x 12.2 x 5.1 mm
(HxWxD)
• Complete Shutdown
- TXD, RXD, PIN diode
• Low Shutdown Current
- 10 nA typical
• Adjustable Optical Power
Management
- Adjustable LED drive-current
to maintain link integrity
• Single Rx Data Output
- Speed select by FIR Select pin
• Integrated EMI Shield
- Excellent noise immunity
• Edge Detection Input
- Prevents the LED from long
turn-on time
• Interface to Various Super
I/O and Controller Devices
• Designed to Accommodate
Light Loss with Cosmetic
Window
• Only 2 External Components
are Required
• Digital Imaging
- Digital Still Cameras
- Photo-Imaging Printers
• Data Communication
- Notebook Computers
- Desktop PCs
- Win CE Handheld Products
- Personal Digital Assistants
(PDAs)
- Printers
- Fax Machines, Photocopiers
- Screen Projectors
- Auto PCs
- Dongles
- Set-Top Box
• Telecommunication
Products
- Cellular Phones
- Pagers
• Small Industrial & Medical
Instrumentation
- General Data Collection
Devices
- Patient & Pharmaceutical
Data Collection Devices
• IR LANs
Description
The HSDL-3601 is a low-profile
infrared transceiver module that
provides interface between logic
and IR signals for through-air,
serial, half-duplex IR data link.
The module is compliant to
IrDA Data Physical Layer
Specifications 1.1 and IEC825Class 1 Eye Safe.
Functional Block Diagram
VCC
R1
LEDA (10)
TXD (9)
SP
MD0 (4)
HSDL-3601
MD1 (5)
RXD (8)
FIR_SEL (3)
CX1
GND (7)
CX2
VCC (1)
AGND (2)
2
The HSDL-3601 contains a highspeed and high-efficiency 870 nm
LED, a silicon PIN diode, and
an integrated circuit. The IC
contains an LED driver and a
receiver providing a single
output (RXD) for all data rates
supported.
The HSDL-3601 can be
completely shut down to achieve
very low power consumption. In
the shut down mode, the PIN
diode will be inactive and thus
producing very little photocurrent even under very bright
ambient light. The HSDL–3601
also incorporated the capability
for adjustable optical power. With
two programming pins; MODE 0
and MODE 1, the optical power
output can be adjusted lower when
the nominal desired link distance
is one-third or two-third of the full
IrDA link.
The HSDL-3601 comes in two
package options; the front view
option (HSDL-3601#007/#017),
and the top view option
(HSDL-3601#008/#018). All
options come with integrated
shield that helps to ensure low
EMI emission and high immunity
to EMI field, thus enhancing
reliable performance.
Application Support
Information
The Application Engineering
group in Agilent is available to
assist you with the technical
understanding associated with
HSDL-3601 infrared transceiver
module. You can contact them
through your local sales
representatives for additional
details.
Ordering Information
Package Option
Package
Part Number
Standard Package
Increment
Front View
HSDL-3601#007
400
Front View
HSDL-3601#017
10
Top View
HSDL-3601#008
400
Top View
HSDL-3601#018
10
3
Functional Block Diagram
I/O Pins Configuration Table
VCC
Pin
R1
LEDA (10)
TXD (9)
SP
MD0 (4)
HSDL-3601
MD1 (5)
RXD (8)
Description
Symbol
1
2
Supply Voltage
Analog Ground
Vcc
AGND
3
4
FIR Select
Mode 0
FIR_SEL
MD0
5
6
Mode 1
No Connection
MD1
NC
7
8
Ground
Receiver Data Output
GND
RXD
9
10
Transmitter Data Input
LED Anode
TXD
LEDA
FIR_SEL (3)
CX1
GND (7)
CX2
VCC (1)
10
9
8
7
6
5
4
3
2
1
10
BACK VIEW (HSDL-3601 #007/#017)
AGND (2)
9
8
7
6
5
4
3
2
Transceiver Control Truth Table
Mode 0
Mode 1
FIR_SEL
RX Function
TX Function
1
0
0
0
X
0
Shutdown
SIR
Shutdown
Full Distance Power
0
1
1
1
0
0
SIR
SIR
2/3 Distance Power
1/3 Distance Power
0
0
0
1
1
1
MIR/FIR
MIR/FIR
Full Distance Power
2/3 Distance Power
1
1
1
MIR/FIR
1/3 Distance Power
X = Don’t Care
Transceiver I/O Truth Table
Transceiver
Mode
Active
FIR_SEL
X
TXD
1
EI
X
LED
On
RXD
Not Valid
Active
Active
0
1
0
0
High[1]
High[2]
Off
Off
Low[3]
Low[3]
Active
Shutdown
X
X
0
X[4]
Low
Low
Off
Not Valid
High
Not Valid
X= Don’t Care
1
BOTTOM VIEW (HSDL-3601 #008/#018)
Inputs
Outputs
EI = In-Band Infrared Intensity at detector
Notes :
1. In-Band EI ≤ 115.2 kb/s and FIR_SEL = 0.
2. In-Band EI ≥ 0.576 Mb/s and FIR_SEL = 1.
3. Logic Low is a pulsed response. The condition is maintained for duration dependent on the pattern and strength of the incident
intensity.
4. To maintain low shutdown current, TXD needs to be driven high or low and not left floating.
4
Recommended Application Circuit Components
Component
R1
Recommended Value
6.2 Ω ± 5%, 0.5 Watt, for 4.75 ≤ Vcc ≤ 5.25 V operation
0.47 µF ± 20%, X7R Ceramic
6.8 µF ± 20%, Tantalum
CX1[5]
CX2[6]
Notes:
5. CX1 must be placed within 0.7 cm of the HSDL-3601 to obtain optimum noise immunity.
6. In environments with noisy power supplies, supply rejection performance can be enhanced by
including CX2, as shown in “HSDL-3601 Functional Block Diagram” in page 3.
450
0.7
400
0.6
350
LOP (mW/sr)
ILED (A)
0.5
0.4
0.3
0.2
300
250
200
150
100
0.1
0
1.3
50
1.5
1.7
1.9
2.1
2.3
LEDA VOLTAGE (V)
ILED vs. LEDA.
Marking Information
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
ILED (A)
Light Output Power (LOP) vs. ILED.
Ma
The HSDL-3601#007/017 is marked
“3601YYWW’ on the shield where “YY”
indicates the unit’s manufacturing year,
and “WW” refers to the work week in
which the unit is tested.
The HSDL-3601#008/018 is marked a
“black” dot on the shield.
CAUTIONS: The BiCMOS inherent to the design of this component increases the component’s
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions
be taken in handling and assembly of this component to prevent damage and/or degradation which may
be induced by ESD.
5
Absolute Maximum Ratings [7]
Parameter
Symbol
Minimum
Maximum
Unit
Storage Temperature
Operating Temperature
TS
TA
-40
-20
+100
+70
°C
°C
165
650
mA
mA
750
mA
DC LED Current
Peak LED Current
LED Anode Voltage
Supply Voltage
Transmitter Data
Input Current
Receiver Data
Output Voltage
ILED(DC)
ILED (PK)
VLEDA
-0.5
7
V
Vcc
ITXD(DC)
0
-12
7
12
V
mA
VO
-0.5
Vcc+0.5
V
Conditions
≤ 90 µs pulse width,
≤ 25% duty cycle
≤ 2 µs pulse width,
≤ 10% duty cycle
|IO(RXD)| = 20 µA
Note:
7. For implementations where case to ambient thermal resistance ≤ 50°C/W.
Recommended Operating Conditions
Parameter
Operating Temperature
Symbol
TA
Min.
-20
Max.
+70
Unit
°C
Supply Voltage
Logic High Input Voltage
for TXD, MD0, MD1,
and FIR_SEL
Vcc
VIH
4.75
2 Vcc/3
5.25
Vcc
V
V
Logic Low Transmitter
Input Voltage
LED (Logic High) Current
Pulse Amplitude
VIL
0
Vcc/3
V
ILEDA
400
650
mA
0.0024
4
Mb/s
Receiver Signal Rate
Ambient Light
Conditions
See IrDA Serial Infrared
Physical Layer Link
Specification, Appendix A
for ambient levels
6
Electrical & Optical Specifications
Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test
conditions can be anywhere in their operating range. All typical values are at 25°C and 5 V unless otherwise
noted.
Parameter
Transceiver
Supply
Current
Digital Input
Current
Symbol
Min.
Shutdown
ICC1
Idle
Logic
Low/High
ICC2
IL/H
-1
IEH
100
Transmitter
Transmitter
Logic High
Radiant
Intensity
Intensity
Peak
Wavelength
Spectral
Line Half
Width
Viewing
Angle
Optical
Pulse Width
Max.
Unit
10
200
nA
VI(TXD) ≤ VIL or
VI(TXD) ≥ VIH
2.5
5
1
mA
µA
VI(TXD) ≤ VIL, EI = 0
0 ≤ VI ≤ VCC
250
400
mW/sr
λP
875
nm
∆λ1/2
35
nm
1.6
1.8
µs
tpw(TXD) = 1.6 µs at
115.2 kb/s
148
217
260
ns
115
125
135
ns
tpw(TXD) = 217 ns at
1.15 Mb/s
tpw(TXD) = 125 ns at
4.0 Mb/s
40
ns
50
µs
2.4
V
100
nA
tpw (IE)
1.5
Maximum
Optical
Pulse Width
tpw (max)
20
VON(LEDA)
ILK(LEDA)
VIH = 5 V
ILEDA = 400 mA
θ1/2 ≤ 15°
°
30
tr (IE),
tf (IE)
Conditions
60
2θ1/2
Rise and Fall
Times
LED Anode
On State Voltage
LED Anode
Off State Leakage Current
Typ.
1
tpw(TXD) = 125 ns at
4.0 Mb/s
tr/f(TXD) = 10 ns
TXD pin stuck high
ILEDA = 400 mA,
VI(TXD) ≥ VIH
VLEDA = VCC = 5.75 V,
VI(TXD) ≤ VIL
7
Electrical & Optical Specifications
Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test
conditions can be anywhere in their operating range. All typical values are at 25°C and 5 V unless otherwise
noted.
Parameter
Receiver
Symbol
Min.
Typ.
Max.
Unit
Logic Low[9]
VOL
0
-
0.4
V
Logic High
VOH
Vcc – 0.2
-
Vcc
V
Viewing
Angle
Logic High Receiver Input
Irradiance
2θ1/2
30
EIH
0.0036
500
0.0090
500
Receiver
Data Output
Voltage
µW/cm2
Receiver SIR Pulse Width
tpw (SIR)
1
4.0
µs
Receiver MIR Pulse Width
tpw (MIR)
100
500
ns
Receiver FIR Pulse Width
tpw (FIR)
85
165
ns
Receiver ASK Pulse Width
tpw (ASK)
1
tL (FIR)
tL (SIR)
40
20
tr/f (RXD)
tW
25
Receiver Rise/Fall Times
Receiver Wake Up Time
0.3
mW/cm2 For in-band signals ≤
115.2 kb/s[8]
2
mW/cm 0.576 Mb/s ≤ in-band
signals ≤ 4 Mb/s[8]
EIL
Receiver Latency Time for FIR
Receiver Latency Time for SIR
IOL = 1.0 mA,
EI ≥ 3.6 µW/cm2,
θ1/2 ≤ 15°
IOH = -20 µA,
EI ≤ 0.3 µW/cm2,
θ1/2 ≤ 15°
°
Logic Low Receiver Input
Irradiance
Receiver Peak Sensitivity
Wavelength
λP
Conditions
880
For in-band signals[8]
nm
µs
50
50
µs
µs
100
ns
µs
θ1/2 ≤ 15°[10],
CL =10 pF
θ1/2 ≤ 15°[11],
CL =10 pF
θ1/2 ≤ 15°[12],
CL =10 pF,
VCC = 4.75 - 5.25 V
500 kHz/50% duty cycle
carrier ASK[13]
[14]
Notes :
8. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 ≤ λp ≤ 900 nm, and the pulse
characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification.
9. Logic Low is a pulsed response. The condition is maintained for duration dependent on pattern and strength of the incident
intensity.
10. For in-band signals ≤ 115.2 kb/s where 3.6 µW/cm2 ≤ EI ≤ 500 mW/cm2.
11. For in-band signals at 1.15 Mb/s where 9.0 µW/cm2 ≤ EI ≤ 500 mW/cm2.
12. For in-band signals of 125 ns pulse width, 4 Mb/s, 4 PPM at recommended 400 mA drive current.
13. Pulse width specified is the pulse width of the second 500 kHz carrier pulse received in a data bit. The first 500 kHz carrier pulse
may exceed 2 µs in width, which will not affect correct demodulation of the data stream. An ASK or DASK system using the
HSDL-3601 has been shown to correctly receive all data bits for 9 µW/cm2 ≤ EI ≤ 500 mW/cm2 incoming signal strength. ASK
or DASK should use the FIR channel enabled.
14. Wake up time is the time between the transition from a shutdown state to an active state and the time when the receiver is active
and ready to receive infrared signals.
8
TXD “Stuck ON” Protection
RXD Output Waveform
TXD
VOH
tpw
90%
50%
VOL
LED
10%
tf
tpw (MAX.)
LED Optical Waveform
tr
Receiver Wake Up Time Definition
(when MD0 ≠ 1 and MD1 ≠ 0)
tpw
RX
LIGHT
LED ON
90%
50%
RXD
VALID DATA
10%
LED OFF
tw
tr
tf
9
HSDL-3601#007 and HSDL3601#017 Package Outline with Dimension
and Recommended PC Board Pad Layout
HSDL-3601#007/#017
(Front Option)
MOUNTING
CENTER
6.10
PIN
FUNCTION
PIN
FUNCTION
1
VCC
6
NC
2
AGND
7
GND
3
FIR_SEL
8
RXD
4
MD0
9
TXD
5
MD1
10
LEDA
1.15
4.60
5.09
TOP VIEW
2.55
R 2.00
R 1.77
4.00
1.90
1.90
PIN
1
0.80
1.68
3.24
4.05
PIN
10
0.82
1.20
3.84
12.20 +0.50
0
SIDE VIEW
FRONT VIEW
ALL DIMENSIONS IN MILLIMETERS (mm).
DIMENSION TOLERANCE IS 0.20 mm
UNLESS OTHERWISE SPECIFIED.
MOUNTING CENTER
MID OF LAND
PIN 1
PIN 10
0.70
0.43
1.05
PIN 10
2.40
PIN 1
2.08
0.45
0.70
2.35
4.95
10 CASTELLATION:
PITCH 1.1 ± 0.1
CUMULATIVE 9.90 ± 0.1
BACK VIEW
2.84
LAND PATTERN
10
HSDL-3601#008 and HSDL3601#018 Package Outline with Dimension
and Recommended PC Board Pad Layout
HSDL-3601#008/#018
(Top Option)
R 2.00
PIN
FUNCTION
PIN
R 1.78
FUNCTION
1
VCC
6
NC
2
AGND
7
GND
3
FIR_SEL
8
RXD
4
MD0
9
TXD
5
MD1
10
LEDA
1.35
4.89
4.40
LEGEND:
MC – MOUNTING CENTER
OC – OPTICAL CENTER
0.90
FRONT VIEW
SHIELD PAD
RECEIVE
5.00
2.40
2.50
TRANSMIT
0.30
0.85
OC
MC
2.08
1.46
1.50
4.16
OC
2.08
2.57
0.30
2.25
3.24
3.83
5.00
SIDE VIEW
5.10
12.20
ALL DIMENSIONS IN MILLIMETERS (mm).
DIMENSION TOLERANCE IS 0.20 mm
UNLESS OTHERWISE SPECIFIED.
TOP VIEW
5.70
1.60
2.85
1.70
PIN 10
PIN 1
1.95
1.30
0.43
0.70
PIN 1
10 CASTELLATION:
PITCH 1.1 ± 0.1
CUM. OF 9 PITCH – 9.9 ± 0.1
9.90
BOTTOM VIEW
PIN 10
0.20
PITCH 9 x 1.10
10 x 0.60 PAD
LAND PAD PATTERN
11
Tape and Reel Dimensions (HSDL-3601#007, #017)
All dimensions in millimeters (mm)
Quantity = 400 pieces per reel (HSDL-3601#007)
Quantity = 10 pieces per tape (HSDL-3601#017)
13.00 ± 0.50
R 1.00
(40 mm MIN.)
EMPTY
(400 mm MIN.)
LEADER
PARTS
MOUNTED
21.00 ± 0.80
EMPTY
(40 mm MIN.)
2.00 ± 0.50
DIRECTION OF PULLING
CONFIGURATION OF TAPE
LABEL
SHAPE AND DIMENSIONS OF REELS
4.00 ± 0.10
2.00 ± 0.10
1.75 ± 0.10
+ 0.10
1.50 0
11.50 ± 0.10
POLARITY
A
24.00 ± 0.20
12.40 ± 0.10
178.00 ± 2.00
60.00 ± 2.00
VDD
0.40 ± 0.05
5.50 ± 0.10
8.00 ± 0.10
4.20 ± 0.10
DIRECTION OF PULLING
+ 0.50
25.50 - 1.00
TAPE DIMENSIONS
1.60 ± 0.50
12
Tape and Reel Dimensions (HSDL-3601#008, #018)
All dimensions in millimeters (mm)
Quantity = 400 pieces per reel (HSDL-3601#008)
Quantity = 10 pieces per tape (HSDL-3601#018)
13.00 ± 0.50
R 1.00
(40 mm MIN.)
EMPTY
(400 mm MIN.)
LEADER
PARTS
MOUNTED
21.00 ± 0.80
EMPTY
(40 mm MIN.)
2.00 ± 0.50
DIRECTION OF PULLING
CONFIGURATION OF TAPE
LABEL
SHAPE AND DIMENSIONS OF REELS
4.00 ± 0.10
2.00 ± 0.10
1.75 ± 0.10
1.50 + 0.10
11.50 ± 0.10
POLARITY
VDD
24.00 ± 0.20
12.80 ± 0.10
178.00 ± 2.00
60.00 ± 2.00
A
4.80 ± 0.10
0.40 ± 0.05
5.30 ± 0.10
5.65 ± 0.10
8.00 ± 0.10
5.10 ± 0.10
DIRECTION OF PULLING
+ 0.50
25.50 - 1.00
TAPE DIMENSIONS
1.60 ± 0.50
13
Moisture Proof Packaging
All HSDL-3601 options are shipped in moisture proof package.
Once opened, moisture absorption begins.
UNITS IN A SEALED
MOISTURE-PROOF
PACKAGE
PACKAGE IS
OPENED (UNSEALED)
ENVIRONMENT
LESS THAN 25°C,
AND LESS THAN
60% RH?
YES
NO BAKING
IS NECESSARY
NO
PACKAGE IS
OPENED MORE
THAN 3 DAYS?
NO
YES
PERFORM RECOMMENDED
BAKING CONDITIONS
Baking Conditions
If the parts are not stored in dry conditions, they must be baked
before reflow to prevent damage to the parts.
Package
In Reel
In Bulk
Temperature
60°C
Time
≥ 48 hours
100°C
125°C
≥ 4 hours
≥ 2 hours
Baking should only be done once.
14
Reflow Profile
MAX. 245°C
T – TEMPERATURE – (°C)
230
R3
200
183
170
150
R2
90 sec.
MAX.
ABOVE
183°C
125
R1
100
R4
R5
50
25
0
50
100
150
200
250
300
t-TIME (SECONDS)
P1
HEAT
UP
P2
SOLDER PASTE DRY
P3
SOLDER
REFLOW
P4
COOL
DOWN
∆T
Maximum ∆T/∆time
Process Zone
Symbol
Heat Up
Solder Paste Dry
P1, R1
P2, R2
25°C to 125°C
125°C to 170°C
4°C/s
0.5°C/s
P3, R3
4°C/s
P3, R4
170°C to 230°C
(245°C at 10 seconds max.)
230°C to 170°C
P4, R5
170°C to 25°C
-3°C/s
Solder Reflow
Cool Down
The reflow profile is a straightline representation of a nominal
temperature profile for a
convective reflow solder process.
The temperature profile is divided
into four process zones, each
with different ∆T/∆time
temperature change rates. The
∆T/∆time rates are detailed in the
above table. The temperatures
are measured at the component
to printed circuit board
connections.
In process zone P1, the PC
board and HSDL-3601
castellation I/O pins are heated
to a temperature of 125°C to
activate the flux in the solder
paste. The temperature ramp up
rate, R1, is limited to 4°C per
second to allow for even heating
of both the PC board and
HSDL-3601 castellation I/O pins.
Process zone P2 should be of
sufficient time duration (> 60
seconds) to dry the solder paste.
The temperature is raised to a
level just below the liquidus point
of the solder, usually 170°C
(338°F).
Process zone P3 is the solder
reflow zone. In zone P3, the
temperature is quickly raised
above the liquidus point of solder
to 230°C (446°F) for optimum
results. The dwell time above the
liquidus point of solder should
be between 15 and 90 seconds. It
usually takes about 15 seconds
to assure proper coalescing of the
solder balls into liquid solder
and the formation of good solder
connections. Beyond a dwell time
of 90 seconds, the intermetallic
growth within the solder
connections becomes excessive,
- 4°C/s
resulting in the formation of weak
and unreliable connections.
The temperature is then rapidly
reduced to a point below the
solidus temperature of the solder,
usually 170°C (338°F), to allow
the solder within the connections
to freeze solid.
Process zone P4 is the cool
down after solder freeze. The
cool down rate, R5, from the
liquidus point of the solder to
25°C (77°F) should not exceed
-3°C per second maximum. This
limitation is necessary to allow
the PC board and HSDL-3601
castellation I/O pins to change
dimensions evenly, putting
minimal stresses on the
HSDL-3601 transceiver.
15
Appendix A: Test Method
A1. Background Light and
Electromagnetic Field
There are four ambient
interference conditions in which
the receiver is to operate
correctly. The conditions are to
be applied separately:
1. Electromagnetic field:
3 V/m maximum (please refer to
IEC 801-3, severity level 3 for
details).
2. Sunlight:
10 kilolux maximum at the
optical port. This is simulated
with an IR source having a peak
wavelength within the range of
850 nm to 900 nm and a spectral
width of less than 50 nm biased
to provide 490 µW/cm2 (with no
modulation) at the optical port.
The light source faces the optical
port.
3. Incandescent Lighting:
1000 lux maximum. This is
produced with general service,
tungsten-filament, gas-filled,
inside frosted lamps in the 60
Watt to 100 Watt range to
generate 1000 lux over the
horizontal surface on which the
equipment under test rests. The
light sources are above the test
area. The source is expected to
have a filament temperature in
the 2700 to 3050 Kelvin range
and a spectral peak in the 850 to
1050 nm range.
4. Fluorescent Lighting:
1000 lux maximum. This is
simulated with an IR source
having a peak wavelength within
the range of 850 nm to 900 nm
and a spectral width of less than
50 nm biased and modulated to
provide an optical square wave
signal (0 µW/cm2 minimum and
0.3 µW/cm2 peak amplitude with
10% to 90% rise and fall times
less than or equal to 100 ns) over
the horizontal surface on which
the equipment under test rests.
The light sources are above the
test area. The frequency of the
optical signal is swept over the
frequency range from 20 kHz to
200 kHz.
Due to the variety of fluorescent
lamps and the range of IR
emissions, this condition is not
expected to cover all
circumstances. It will provide a
common floor for IrDA operation.
This simulates sunlight within the
IrDA spectral range. The effect of
longer wavelength radiation is
covered by the incandescent
condition.
All IR transceivers operating under the recommended drive conditions are classified as CENELEC
EN60825-1 Accessible Emission Limit (AEL) Class 1. This standard is in effect in Europe as of
January 1, 1997. AEL Class 1 LED devices are considered eye safe. Please see Application Note 1094
for more information.
16
Appendix B : HSDL-3601#007/#017 SMT Assembly Application Note
1.0 Solder Pad, Mask and Metal Solder Stencil Aperture
METAL STENCIL
FOR SOLDER PASTE
PRINTING
STENCIL
APERTURE
LAND PATTERN
SOLDER
MASK
PCBA
Figure 1.0. Stencil and PCBA.
1.1 Recommended Land Pattern for HSDL-3601#007/#017
Dim.
mm
Inches
a
b
2.40
0.70
0.095
0.028
c (pitch)
d
1.10
2.35
0.043
0.093
e
f
2.80
3.13
0.110
0.123
g
4.31
0.170
SHIELD SOLDER PAD
Rx LENS
Tx LENS
e
d
g
b
Y
f
a
X
theta
FIDUCIAL
10x PAD
Figure 2.0. Top View of Land Pattern.
c
FIDUCIAL
17
1.2 Adjacent Land Keep-out
and Solder Mask Areas
Dim.
mm
Inches
h
j
min. 0.2
13.4
min. 0.008
0.528
k
l
4.7
3.2
0.185
0.126
Note: Wet/Liquid Photo-Imaginable solder resist/mask is recommended.
j
• Adjacent land keep-out is the
maximum space occupied by
the unit relative to the land
pattern. There should be no
other SMD components within
this area.
• “h” is the minimum solder
resist strip width required to
avoid solder bridging adjacent
pads.
• It is recommended that
2 fiducial cross be placed at
mid-length of the pads for unit
alignment.
2.0 Recommended Solder
Paste/cream Volume for
Castellation Joints
Based on calculation and
experiment, the printed solder
paste volume required per
castellation pad is 0.30 cubic
mm (based on either no-clean or
aqueous solder cream types with
typically 60 to 65% solid content
by volume).
Tx LENS
LAND
Rx LENS
SOLDER
MASK
h
k
Y
l
Figure 3.0. HSDL-3601#007/#017 PCBA – Adjacent Land Keep-out
and Solder Mask.
18
2.1 Recommended Metal
Solder Stencil Aperture
It is recommended that only
0.152 mm (0.006 inches) or
0.127 mm (0.005 inches) thick
stencil be used for solder paste
printing. This is to ensure
adequate printed solder paste
volume and no shorting. The
following combination of metal
stencil aperture and metal stencil
thickness should be used:
See Fig 4.0
t, nominal stencil thickness
mm
0.152
0.127
l, length of aperture
inches
0.006
mm
2.8 ± 0.05
inches
0.110 ± 0.002
0.005
3.4 ± 0.05
0.134 ± 0.002
w, the width of aperture is fixed at 0.70 mm (0.028 inches)
Aperture opening for shield pad is 2.8 mm x 2.35 mm as per land dimensions
APERTURE AS PER
LAND DIMENSIONS
t (STENCIL THICKNESS)
SOLDER
PASTE
w
l
Figure 4.0 Solder Paste Stencil Aperture.
3.0 Pick and Place
Misalignment Tolerance and
Product Self-Alignment after
Solder Reflow
If the printed solder paste volume
is adequate, the unit will selfalign in the X-direction after
solder reflow. Units should be
properly reflowed in IR Hot
Air convection oven using the
recommended reflow profile.
The direction of board travel
does not matter.
Allowable Misalignment Tolerance
X – direction
Theta – direction
≤ 0.2 mm (0.008 inches)
± 2 degrees
19
3.1 Tolerance for X-axis
Alignment of Castellation
Misalignment of castellation to
the land pad should not exceed
0.2 mm or approximately half the
width of the castellation during
placement of the unit. The
castellations will completely selfalign to the pads during solder
reflow as seen in the pictures
below.
Photo 1.0. Castellation misaligned to land pads in x-axis
before reflow.
3.2 Tolerance for Rotational
(Theta) Misalignment
Units when mounted should not
be rotated more than ± 2 degrees
with reference to center X-Y as
specified in Fig 2.0. Pictures 3.0
and 4.0 show units before and
Photo 3.0. Unit is rotated before reflow.
Photo 2.0. Castellation self-align to land pads after
reflow.
after reflow. Units with a Theta
misalignment of more than 2
degrees do not completely self
align after reflow. Units with
± 2 degree rotational or Theta
misalignment self-aligned
completely after solder reflow.
Photo 4.0. Unit self-aligns after reflow.
20
3.3 Y-axis Misalignment of
Castellation
In the Y-direction, the unit does
not self-align after solder reflow.
It is recommended that the unit
be placed in line with the fiducial
mark (mid-length of land pad.)
This will enable sufficient land
length (minimum of 1/2 land
length.) to form a good joint.
See Fig 5.0.
LENS
EDGE
FIDUCIAL
Y
MINIMUM 1/2 THE LENGTH
OF THE LAND PAD
Figure 5.0. Section of a Castellation in Y-axis.
3.4 Example of Good
HSDL-3601#007/#017
Castellation Solder Joints
4.0 Solder Volume Evaluation and Calculation
Geometry of an HSDL-3601#007/#017 solder fillet.
0.425
0.20
0.8
Photo 5.0. Good Solder Joint.
This joint is formed when the
printed solder paste volume is
adequate, i.e. 0.30 cubic mm and
reflowed properly. It should be
reflowed in IR Hot-air convection
reflow oven. Direction of board
travel does not matter.
0.4
1.2
0.70
0.7
21
Appendix C: HSDL-3601#008/#018 SMT Assembly Application Note
1.0 Solder Pad, Mask and Metal Solder Stencil Aperture
METAL STENCIL
FOR SOLDER PASTE
PRINTING
STENCIL
APERTURE
LAND PATTERN
SOLDER
MASK
PCBA
Figure 1.0. Stencil and PCBA.
1.1 Recommended Land Pattern for HSDL-3601#008/#018
Dim.
mm
Inches
a
b
1.95
0.60
0.077
0.024
c (pitch)
d
1.10
1.60
0.043
0.063
e
f
5.70
3.80
0.224
0.150
g
h
2.40
0.80
0.094
0.032
SHIELD SOLDER PAD
e
d
g
Y
Rx LENS
b
Tx LENS
theta
f
X
h
a
FIDUCIAL
10x PAD
Figure 2.0. Top View of Land Pattern.
c
FIDUCIAL
22
1.2 Adjacent Land Keep-out
and Solder Mask Areas
Dim.
h
mm
min. 0.2
Inches
min. 0.008
j
k
13.4
5.8
0.528
0.228
l
3.5
0.130
Note: Wet/Liquid Photo-Imaginable solder resist/mask is recommended.
j
Rx LENS
• Adjacent land keep-out is
the maximum space occupied
by the unit relative to the land
pattern. There should be no
other SMD components within
this area.
LAND
Tx LENS
SOLDER
MASK
h
k
Y
• “h” is the minimum solder
resist strip width required
to avoid solder bridging
adjacent pads.
l
• It is recommended that
2 fiducial cross be placed at
mid-length of the pads for
unit alignment.
Figure 3.0. HSDL-3601#008/#018 PCBA – Adjacent Land Keep-out
and Solder Mask.
2.0 Recommended Solder
Paste/cream Volume for
Castellation Joints
Based on calculation and
experiment, the printed solder
paste volume required per
castellation pad is 0.28 cubic
mm (based on either no-clean or
aqueous solder cream types with
typically 60 to 65% solid content
by volume).
23
2.1 Recommended Metal
Solder Stencil Aperture
It is recommended that only
0.152 mm (0.006 inches) or
0.127 mm (0.005 inches) thick
stencil be used for solder paste
printing. This is to ensure
adequate printed solder paste
volume and no shorting. The
following combination of metal
stencil aperture and metal stencil
thickness should be used:
See Fig 4.0
t, nominal stencil thickness
mm
0.152
0.127
l, length of aperture
inches
0.006
mm
3.1 ± 0.05
inches
0.122 ± 0.002
0.005
3.7 ± 0.05
0.147 ± 0.002
w, the width of aperture is fixed at 0.60 mm (0.024 inches)
Aperture opening for shield pad is 5.7 mm x 1.6 mm as per land dimensions
APERTURE AS PER
LAND DIMENSIONS
t (STENCIL THICKNESS)
SOLDER
PASTE
w
l
Figure 4.0. Solder Paste Stencil Aperture.
3.0 Pick and Place
Misalignment Tolerance and
Product Self-Alignment after
Solder Reflow
If the printed solder paste volume
is adequate, the unit will selfalign in X-direction after solder
reflow. Units should be properly
reflowed in IR Hot Air convection
oven using the recommended
reflow profile. The direction of
board travel does not matter.
Allowable Misalignment Tolerance
X – direction
≤ 0.2 mm (0.008 inches)
24
3.1 Tolerance for X-axis
Alignment of Castellation
Misalignment of castellation to
the land pad should not exceed
0.2 mm or approximately half the
width of the castellation during
placement of the unit. The
castellations will completely selfalign to the pads during solder
reflow as seen in the pictures
below.
§
§
Solder
Castellation
Photo 1.0. Castellation mis-aligned to land pads in X-axis
before reflow.
3.2 Tolerance for Rotational
(Theta) Misalignment
Units when mounted should not
be rotated more than ± 1 degrees
with reference to center X-Y as
specified in Fig. 2.0. Photos 3.0
Photo 3.0. Unit is rotated before reflow.
Photo 2.0. Castellation self-aligned to land pads after
reflow.
and 4.0 show that unit cannot
be self-aligned back due to the
small wetting force. Units with a
Theta misalignment of more than
1 degree do not completely self
align after reflow.
Photo 4.0. Unit not self-aligned after reflow.
25
3.3 Y-axis Misalignment of
Castellation
In the Y-direction, the unit does
not self align after solder reflow.
It is recommended that the unit
be placed in line with the fiducial
mark. This will enable sufficient
land length to form a good joint.
See Fig. 5.0.
Tx LENS
Rx LENS
FIDUCIAL
EDGE
Y
Figure 5.0. Section of a Castellation in Y-axis.
3.4 Example of Good Castellation Solder Joints
Photo 6.0. Good Attachment before Reflow.
This joint is formed when the
printed solder paste volume is
adequate, i.e. 0.30 cubic mm and
reflowed properly. It should be
Photo 7.0. Good Solder Joint after Reflow.
reflowed in IR Hot-air convection
reflow oven. Direction of board
travel does not matter.
26
4.0 Solder Volume Evaluation and Calculation
Geometry of an HSDL-3601#008/#018 solder fillet.
0.46
0.6
0.6
0.1
0.8
1.15
Vsolder = (0.8 x 0.6 x 0.1) + (0.5 x 0.6 x 0.46 (0.6 + 1.15)/2) = 0.1662 mm3
Vpaste = Vsolder/0.6 = 0.277 mm3
27
Appendix D: General Application Guide for the HSDL-3601
Infrared IrDA® Compliant 4 Mb/s Transceiver
Description The HSDL-3601
wide voltage operating range
infrared transceiver is a low-cost
and small form factor that is
designed to address the mobile
computing market such as
notebooks, printers and LAN
access as well as small embedded
mobile products such as digital
cameras, cellular phones, and
PDAs. It is fully compliant to
IrDA 1.1 specification up to 4
Mb/s, and supports HP-SIR,
Sharp ASK, and TV Remote
modes. The design of the
HSDL-3601 also includes the
following unique features:
• Low passive component count.
• Adjustable Optical Power
Management (full, 2/3, 1/3
power).
• Shutdown mode for low power
consumption requirement.
• Single-receive output for all
data rates.
Adjustable Optical Power
Management The HSDL-3601
transmitter offers user-adjustable
optical power levels. The use of
two logic-level mode-select input
pins, MODE 0 and MODE 1,
offers shutdown mode as well
as three transmit power levels
as shown in the Table below.
The power levels are setup
to correspond nominally to
maximum, two-third, and
one-third of the transmission
distance. This unique feature
allows lower optical power to
be transmitted at shorter link
distances to reduce power
consumption.
MODE
1
MODE 1
0
Transmitter
Shutdown
0
0
0
1
Full Power
2/3 Power
1
1
1/
There are 2 basic means to
adjust the optical power of the
HSDL-3601:
Dynamic: This implementation
enables the transceiver pair to
adjust their transmitter power
according to the link distance.
However, this requires the IrDA
protocol stack (mainly the IrLAP
layer) to be modified. Please
contact Hewlett Packard
Application group for further
details.
Static: Pre-program the ROM
BIOS of the system (e.g. notebook
PC, digital camera, cell phones,
or PDA) to allow the end user to
select the desired optical power
during the system setup stage.
Selection of Resistor R1
Resistor R1 should be selected
to provide the appropriate peak
pulse LED current over different
ranges of Vcc. The recommended
R1 for the voltage range of
4.75 V to 5.25 V is 6.2 Ω. The
HSDL-3601 typically provides
250 mW/sr of intensity at the
recommended minimum peak
pulse LED current of 400 mA.
3
Power
Interface to Recommended
I/O Chips The HSDL-3601’s
TXD data input is buffered to
allow for CMOS drive levels. No
peaking circuit or capacitor is
required.
Data rate from 9.6 kb/s up to
4 Mb/s is available at the RXD
pin. The FIR_SEL pin selects the
data rate that is receivable
through RXD. Data rates up to
115.2 kb/s can be received if
FIR_SEL is set to logic low.
Data rates up to 4 Mb/s can be
received if FIR_SEL is set to logic
high. Software driver is necessary
to program the FIR_SEL to low
or high at a given data rate.
4 Mb/s IR link distance of greater
than 1.5 meters have been
demonstrated using typical
HSDL-3601 units with National
Semiconductor’s PC87108 Endec
and Super I/Os, and the SMC
Super I/O chips.
28
(A) National Semiconductor
Super I/O and Infrared
Controller
For National Semiconductor
Super I/O and Infrared Controller
chips, IR link can be realized with
the following connections:
• Connect IRTX of the National
Super I/O or IR Controller
to TXD (pin 9) of the
HSDL-3601.
• Connect IRRX1 of the National
Super I/O or IR Controller
to RXD (pin 8) of the
HSDL-3601.
Please refer to the table below for
the IR pin assignments for the
National Super I/O and IR
Controllers that support IrDA 1.1
up to 4 Mb/s:
IRTX
IRRX1
IRSL0
PC97/87338VJG
PC87308VUL
63
81
65
80
66
79
PC87108AVHG
39
38
37
Please refer to the National Semiconductor data
sheets and application notes for updated information.
• Connect IRSL0 of the National
Super I/O or IR Controller
to FIR_SEL (pin 3) of the
HSDL-3601.
Functional Block Diagram
VCC
R1
LEDA (10)
TXD (9)
SP
IRTX
NATIONAL
SEMICONDUCTOR
SUPER I/O
OR
IR CONTROLLER
MD0 (4)
IRRX1
HSDL-3601
MD1 (5)
*
*
RXD (8)
IRSL0
FIR_SEL (3)
CX1
GND (7)
* MODE GROUND FOR
FULL POWER OPERATION
CX2
VCC (1)
AGND (2)
29
(B) HSDL-3601
Interoperability with National
Semiconductor PC97338VJG
SIO Evaluation Report
Introduction
The objective of this report is to
demonstrate the interoperability
of the HSDL-3601 IR transceiver
IR module as wireless
communication ports at the speed
of 2.4 kb/s - 4 Mb/s with NS’s
PC97338VJG Super I/O under
typical operating conditions.
Test Procedures
1. Two PC97338VJG evaluation
boards were connected to the
ISA Bus of two PCs (Pentium
200 MHz) running Microsoft’s
DOS operating system. One
system with an HSDL-3601 IR
transceiver connected to
the PC97338VJG evaluation
board will act as the master
device. Another system with
an HSDL-3601 IR transceiver
connected to the PC97338VJG
will act as the slave device
(i.e. Device Under Test).
2. The test software used in
this interoperability test
is provided by National
Semiconductor. A file size of
1.7M byte from the master
device, with the PC97338VJG
performing the framing,
encoding is transmitted to the
slave device. The slave device,
with the PC97338VJG
performing the decoding, and
CRC checksum, will receive
the file. The file is then
checked for error by
comparing the received file
with the original file using
the DOS “fc” command.
3. The link distance is measured
by adjusting the distance
between the master and
slave for errorless data
communications.
HSDL-3601
Interoperability with
NS PC97338 Report
(i) Test Conditions
Vcc = 4.75 – 5.25 V
RLED = 6.2 Ω
Optical transmitter pulse
width = 125 ns
Mode set to full power
(ii) Test Result
The interoperability test
results show that HSDL-3601
IR transceiver can operate
≥ 1.5 meter link distance
from 4.75 V to 5.25 V with
NS’s PC97338 at any IrDA
1.1 data rate without error.
Functional Block Diagram
VCC
14.314 MHz
CLOCK
R1
LEDA (10)
A0 - A3
TXD (9)
SP
IRTX (63)
SYSTEM BUS
RD, WR, CS
D0 - D7
DRQ
DACK, TC
IRQ
NATIONAL
SEMICONDUCTOR
PC97338VJG
SUPER I/O
MD0 (4)
IRRX1 (65)
HSDL-3601
MD1 (5)
*
*
RXD (8)
IRSL0 (66)
FIR_SEL (3)
CX1
GND (7)
* MODE GROUND FOR
FULL POWER OPERATION
CX2
VCC (1)
AGND (2)
HSDL-3601
FUNCTIONAL BLOCK DIAGRAM
VCC
(C) Standard Micro System
Corporation (SMC) Super and
Ultra I/O Controllers
For SMC Super and Ultra I/O
Controller chips, IR link can
be realized with the following
connections:
R1
LEDA (10)
IRRX
STANDARD
MICROSYSTEM
CORPORATION
SUPER I/O
OR
IR CONTROLLER
• Connect IRTX of the SMC
Super or Ultra I/O Controller
to TXD (pin 9) of the
HSDL-3601.
IRMODE
TXD (9)
SP
MD0
MD1
CX1
GND (7)
• Connect IRMODE of the Super
or Ultra I/O Controller to
FIR_SEL (pin 3) of the
HSDL-3601.
Please refer to the table below
for the IR pin assignments for
the SMC Super or Ultra I/O
Controllers that support IrDA 1.1
up to 4Mb/s:
FIR_SEL (3)
HSDL-3601
IRTX
• Connect IRRX of the SMC
Super or Ultra I/O Controller
to RXD (pin 8) of the
HSDL-3601.
RXD (8)
MODE GROUND
FOR FULL POWER
OPERATION
CX2
4
5
VCC (1)
AGND (2)
Note that the buffer in the TXD line to IRRX and RXD line to IRTX is used only
when interfacing the FDC37C669FR to HSDL-3601. This is not required with
the other SMC Super and Ultra I/O Controllers. Please refer to the SMC
datasheets and applications notes for updated information.
IRTX
IRRX
IRMODE
FDC37C669FR
FDC37N769
89
87
88
86
23
21
FDC37C957/8FR
CAM35C44
204
4
203
32
5
HSDL-3601
Interoperability with
SMC 669 Report
(i) Test Conditions
Vcc = 4.75 – 5.25 V
RLED = 6.2 Ω
Optical transmitter pulse
width = 125 ns
Mode set to full power
(ii) Test Result
The interoperability test
results show that HSDL-3601
IR transceiver can operate
≥ 1.5 meter link distance
from 4.75 V to 5.25 V with
SMC 669 at any IrDA 1.1 data
rate without error.
www.semiconductor.agilent.com
Data subject to change.
Copyright © 2000 Agilent Technologies Inc.
Obsoletes 5968-7601E (9/99)
5980-0877E (7/00)
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