CYSTEKEC MTA50P01SN3 14v p-channel enhancement mode mosfet Datasheet

Spec. No. : C101N3
Issued Date : 2015.09.09
Revised Date : 2016.10.11
Page No. : 1/9
CYStech Electronics Corp.
-14V P-Channel Enhancement Mode MOSFET
MTA50P01SN3
BVDSS
ID @ VGS=-10V, TA=25°C
RDSON@VGS=-4.5V, ID=-3.6A
RDSON@VGS=-2.5V, ID=-3.2A
-14V
-4.3A
42.3mΩ(typ)
62.9mΩ(typ)
Features
• Low gate charge
• Compact and low profile SOT-23 package
• Advanced trench process technology
• High density cell design for ultra low on resistance
• Pb-free lead plating package
Symbol
Outline
MTA50P01SN3
SOT-23
D
G：Gate
S：Source
D：Drain
G
S
Ordering Information
Device
MTA50P01SN3-0-T1-G
Package
SOT-23
(Pb-free lead plating and halogen-free package)
Shipping
3000 pcs / tape & reel
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant
and green compound products
Packing spec, T1 : 3000 pcs / tape & reel, 7” reel
Product rank, zero for no rank products
Product name
MTA50P01SN3
CYStek Product Specification
Spec. No. : C101N3
Issued Date : 2015.09.09
Revised Date : 2016.10.11
Page No. : 2/9
CYStech Electronics Corp.
Absolute Maximum Ratings (Ta=25C)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ TA=25C, VGS=-4.5V (Note 3)
Continuous Drain Current @ TA=70C, VGS=-4.5V (Note 3)
Pulsed Drain Current (Notes 1, 2)
Maximum Power Dissipation (Note 3)
Linear Derating Factor
Operating Junction and Storage Temperature Range
Symbol
VDS
VGS
Limits
-14
±8
-4.3
-3.4
-20
1.38
0.01
-55~+150
ID
IDM
PD
Tj ; Tstg
Unit
V
A
W
W/C
C
Note : 1. Pulse width limited by maximum junction temperature.
2. Pulse width≤ 300μs, duty cycle≤2%.
3. Surface mounted on 1 in² copper pad of FR-4 board; 270C/W when mounted on minimum copper pad
Thermal Performance
Parameter
Thermal Resistance, Junction-to-Ambient(PCB mounted)
Symbol
Limit
Unit
Rth,ja
90
C/W
Note : Surface mounted on 1 in² copper pad of FR-4 board; 270C/W when mounted on minimum copper pad
Electrical Characteristics (Tj=25C, unless otherwise noted)
Symbol
Static
BVDSS
∆BVDSS/∆Tj
VGS(th)
IGSS
IDSS
*RDS(ON)
*GFS
Dynamic
Ciss
Coss
Crss
td(ON)
tr
td(OFF)
tf
MTA50P01SN3
Min.
Typ.
Max.
Unit
-14
-0.4
-
8
42.3
62.9
6.5
-1.0
±100
-1
-10
56.5
83.5
-
V
mV/C
V
nA
-
559
163
149
11
21
40
23
-
Test Conditions
S
VGS=0V, ID=-250μA
Reference to 25C, ID=-250μA
VDS=VGS, ID=-250μA
VGS=±8V, VDS=0V
VDS=-12V, VGS=0V
VDS=-10V, VGS=0V (Tj=70C)
VGS=-4.5V, ID=-3.6A
VGS=-2.5V, ID=-3.2A
VDS=-5V, ID=-3A
pF
VDS=-10V, VGS=0V, f=1MHz
ns
VDS=-10V, ID=-1A, VGS=-5V, RG=3.3Ω
μA
m
CYStek Product Specification
CYStech Electronics Corp.
Qg
Qgs
Qgd
Source-Drain Diode
*VSD
Trr
Qrr
Spec. No. : C101N3
Issued Date : 2015.09.09
Revised Date : 2016.10.11
Page No. : 3/9
-
7.7
1
2.7
-
nC
VDS=-10V, ID=-2A, VGS=-4.5V
-
-0.9
28
8
-1.2
-
V
ns
nC
VGS=0V, IS=-3.4A
VGS=0V, IF=-2A, dIF/dt=100A/μs
*Pulse Test : Pulse Width 300μs, Duty Cycle2%
Recommended Soldering Footprint
MTA50P01SN3
CYStek Product Specification
Spec. No. : C101N3
Issued Date : 2015.09.09
Revised Date : 2016.10.11
Page No. : 4/9
CYStech Electronics Corp.
Typical Characteristics
Brekdown Voltage vs Ambient Temperature
Typical Output Characteristics
1.4
20
-BVDSS, Normalized Drain-Source
Breakdown Voltage
10V,9V,8V,7V,6V,5V,4V
-ID, Drain Current(A)
16
3V
12
-VGS=2.5V
8
-VGS=2V
4
-VGS=1.5V
1.2
1.0
0.8
0.6
ID=-250μA,
VGS=0V
0.4
0
0
1
2
3
4
-VDS, Drain-Source Voltage(V)
-75 -50 -25
5
Static Drain-Source On-State resistance vs Drain Current
Reverse Drain Current vs Source-Drain Voltage
1.2
180
VGS=-1.5V VGS=-1.8V VGS=-2.5V
160
-VSD, Source-Drain Voltage(V)
RDS(ON), Static Drain-Source On-State
Resistance(mΩ)
200
140
120
VGS=-4.5V
100
80
60
40
20
Tj=25°C
VGS=0V
1.0
0.8
Tj=150°C
0.6
0.4
VGS=-10V
0.2
0
0.01
0.1
1
-ID, Drain Current(A)
0
10
2
4
6
8
-IDR, Reverse Drain Current(A)
10
Drain-Source On-State Resistance vs Junction Tempearture
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
1000
1.6
R DS(ON), Normalized Static DrainSource On-State Resistance
R DS(ON), Static Drain-Source OnState Resistance(mΩ)
0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
ID=-3.6A
800
600
400
200
1.4
VGS=-4.5V, ID=-3.6A
1.2
1.0
0.8
0.6
RDS(ON) @Tj=25°C : 42.3 mΩ typ
0.4
0
0
MTA50P01SN3
2
4
6
8
-VGS, Gate-Source Voltage(V)
10
-75 -50 -25 0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
CYStek Product Specification
Spec. No. : C101N3
Issued Date : 2015.09.09
Revised Date : 2016.10.11
Page No. : 5/9
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Threshold Voltage vs Junction Tempearture
Capacitance vs Drain-to-Source Voltage
1.4
-VGS(th), Normalized Threshold Voltage
1000
Ciss
Capacitance---(pF)
f=1MHz
Coss
Crss
1.2
ID=-1mA
1.0
0.8
0.6
0.4
ID=-250μA
0.2
100
0.1
1
-VDS, Drain-Source Voltage(V)
-75 -50 -25
10
Gate Charge Characteristics
Maximum Safe Operating Area
10
100
100μs
-VGS, Gate-Source Voltage(V)
-ID, Drain Current (A)
RDS(ON)
Limited
10
1ms
10ms
1
TA=25°C, Tj=150°C,
VGS=-4.5V, RθJA=90°C/W,
single pulse
0.1
100ms
1s
DC
8
6
4
2
VDS=-10V
ID=-2A
0
0.01
0.1
1
10
-VDS, Drain-Source Voltage(V)
0
100
2
4
6
8
10
12
14
16
18
20
Qg, Total Gate Charge(nC)
Maximum Drain Current vs Junction Temperature
Typical Transfer Characteristics
20
5
VDS=-5V
4.5
4
-ID, Drain Current(A)
-ID, Maxim um Drain Current(A)
0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
3.5
3
2.5
2
1.5
1
12
8
4
VGS=-4.5V, Tj(max)=150°C,
RθJA=90°C/W, single pulse
0.5
16
0
0
25
MTA50P01SN3
50
75
100
125
150
Tj, Junction Temperature(°C)
175
0
1
2
3
4
5
-VGS, Gate-Source Voltage(V)
CYStek Product Specification
Spec. No. : C101N3
Issued Date : 2015.09.09
Revised Date : 2016.10.11
Page No. : 6/9
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Forward Transfer Admittance vs Drain Current
Power Derating Curve
GFS, Forward Transfer Admittance(S)
10
1.6
PD, Power Dissipation(W)
1.4
1
0.1
VDS=-10V
Pulsed
Ta=25°C
Mounted on FR-4 board
with 1 in² pad area
1.2
1
0.8
0.6
0.4
0.2
0
0.01
0.001
0.01
0.1
1
-ID, Drain Current(A)
10
0
20
40
60
80 100 120
TA, Ambient Temperature(℃)
140
160
Transient Thermal Response Curves
1
r(t), Normalized Effective Transient
Thermal Resistance
D=0.5
0.2
0.1
1.RθJA(t)=r(t)*RθJA
2.Duty Factor, D=t1/t2
3.TJM-TA=PDM*RθJA(t)
4.RθJA=90°C/W
0.1
0.05
0.02
0.01
0.01
Single Pulse
0.001
1.E-04
MTA50P01SN3
1.E-03
1.E-02
1.E-01
1.E+00
t1, Square Wave Pulse Duration(s)
1.E+01
1.E+02
1.E+03
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C101N3
Issued Date : 2015.09.09
Revised Date : 2016.10.11
Page No. : 7/9
Reel Dimension
Carrier Tape Dimension
MTA50P01SN3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C101N3
Issued Date : 2015.09.09
Revised Date : 2016.10.11
Page No. : 8/9
Recommended wave soldering condition
Product
Pb-free devices
Peak Temperature
260 +0/-5 C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5C of actual peak
temperature(tp)
Ramp down rate
Time 25 C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3C/second max.
3C/second max.
100C
150C
60-120 seconds
150C
200C
60-180 seconds
183C
60-150 seconds
240 +0/-5 C
217C
60-150 seconds
260 +0/-5 C
10-30 seconds
20-40 seconds
6C/second max.
6 minutes max.
6C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTA50P01SN3
CYStek Product Specification
Spec. No. : C101N3
Issued Date : 2015.09.09
Revised Date : 2016.10.11
Page No. : 9/9
CYStech Electronics Corp.
SOT-23 Dimension
Marking:
A
3
B
TE
A5P1
S
Date Code: Year+Month
Year: 5→2015, 6→2016
Month: 1→1, 2→2,‧‧‧
2
1
XX
L
9→9, A→10, B→11, C→12
G
V
3-Lead SOT-23 Plastic
Surface Mounted Package
CYStek Package Code: N3
C
D
DIM
H
Inches
Min.
Max.
0.1063 0.1220
0.0472 0.0630
0.0335 0.0512
0.0118 0.0197
0.0669 0.0910
0.0000 0.0040
A
B
C
D
G
H
K
Millimeters
Min.
Max.
2.70
3.10
1.20
1.60
0.89
1.30
0.30
0.50
1.70
2.30
0.00
0.10
J
DIM
J
K
L
S
V
Style: Pin 1.Gate 2.Source 3.Drain
Inches
Min.
Max.
0.0034
0.0079
0.0128
0.0266
0.0335
0.0453
0.0830
0.1161
0.0098
0.0256
Millimeters
Min.
Max.
0.085
0.20
0.32
0.67
0.85
1.15
2.10
2.95
0.25
0.65
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
 Lead: Pure tin plated.
 Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
 CYStek reserves the right to make changes to its products without notice.
 CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
 CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTA50P01SN3
CYStek Product Specification