ETC2 MC3256 Axis accelerometer Datasheet

MC3256 3-Axis Accelerometer
Preliminary Datasheet
GENERAL DESCRIPTION
FEATURES
The MC3256 is a low-noise, integrated
digital output 3-axis accelerometer with a
feature set optimized for cell phones and
consumer product motion sensing.
Applications include user interface control,
gaming motion input, electronic compass tilt
compensation for cell phones, game
controllers, remote controls and portable
media products.
Range, Sampling & Power




Event Detection


Low noise and low power are inherent in
the monolithic fabrication approach, where
the MEMS accelerometer is integrated in a
single-chip with the electronics integrated
circuit.
In the MC3256 the internal sample rate can
be set from 0.25 to 256 samples / second.
Specific tap or sample acquisition
conditions can trigger an interrupt to a
remote MCU. Alternatively, the device
supports the reading of sample and event
status via polling.
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±2,4,8,12 or ±16g ranges
8, 10 or 14-bit resolution
0.25 - 256 samples/sec
50 - 130 μA typical current
Low-noise architecture minimizes
false triggering
Independent X,Y,Z Tap
Simple System Integration


I2C interface, up to 400 kHz
3 × 3 × 1 mm 16-pin package
‒


APS-048-0027v1.6
Pin-compatible to MMA845x,
ADXL346, LIS3DH, KXCJK, KXTIK
accelerometers
Single-chip 3D silicon MEMS
<200µg / √Hz noise
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
TABLE OF CONTENTS
1
Order Information............................................................................................................. 4
2
Functional Block Diagram ................................................................................................ 5
3
Packaging and Pin Description ........................................................................................ 6
3.1
Package Outline ................................................................................................................... 6
3.2
Package Orientation ............................................................................................................. 7
3.3
Pin Description ..................................................................................................................... 8
3.4
Typical Application Circuit .................................................................................................... 9
3.5
Tape and Reel ................................................................................................................... 10
4
Specifications................................................................................................................. 12
4.1
Absolute Maximum Ratings ................................................................................................ 12
4.2
Sensor Characteristics ....................................................................................................... 13
4.3
Electrical and Timing Characteristics.................................................................................. 14
4.3.1
Electrical Power and Internal Characteristics ....................................................... 14
4.3.2
I2C Electrical Characteristics ............................................................................... 15
4.3.3
I2C Timing Characteristics ................................................................................... 16
5
General Operation ......................................................................................................... 17
5.1
Sensor Sampling ................................................................................................................ 17
5.2
Offset and Gain Calibration ................................................................................................ 17
5.3
Tap Detection ..................................................................................................................... 17
6
Operational States ......................................................................................................... 18
7
Operational State Flow .................................................................................................. 19
8
Interrupts........................................................................................................................ 20
8.1
Enabling and Clearing Interrupts ........................................................................................ 20
8.2
ACQ_INT Interrupt ............................................................................................................. 20
9
Sampling ........................................................................................................................ 21
9.1
10
Continuous Sampling ......................................................................................................... 21
I2C Interface .................................................................................................................. 22
10.1
Physical Interface ............................................................................................................... 22
10.2
Timing ................................................................................................................................ 23
10.3
I2C Message Format .......................................................................................................... 23
10.4
Watchdog Timer ................................................................................................................. 24
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MC3256 3-Axis Accelerometer
11
Preliminary Datasheet
Register Interface .......................................................................................................... 25
11.1
Register Summary ............................................................................................................. 26
11.2
SR: Status Register ............................................................................................................ 28
11.3
OPSTAT: Device Status Register ....................................................................................... 29
11.4
INTEN: Interrupt Enable Register ....................................................................................... 30
11.5
MODE: Mode Control Register ........................................................................................... 31
11.6
SRTFR: Sample Rate and Tap Feature Register ............................................................... 32
11.7
TAPEN: Tap Control Register ............................................................................................ 33
11.8
TTTRX,TTTRY, TTTRZ: X, Y and Z Tap Duration and Threshold Registers ...................... 34
11.9
XOUT_EX, YOUT_EX & ZOUT_EX: X, Y, Z-Axis Acceleration Registers .......................... 35
11.10
OUTCFG: Output Configuration Register ........................................................................... 36
11.11
X-Axis Offset Registers ...................................................................................................... 37
11.12
Y-Axis Offset Registers ...................................................................................................... 38
11.13
Z-Axis Offset Registers ...................................................................................................... 39
11.14
X-Axis Gain Registers ........................................................................................................ 40
11.15
Y-Axis Gain Registers ........................................................................................................ 41
11.16
Z-Axis Gain Registers ........................................................................................................ 42
11.17
PCODE: Product Code....................................................................................................... 43
12
Index of Tables .............................................................................................................. 44
13
Revision History ............................................................................................................. 45
14
Legal .............................................................................................................................. 46
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
1 ORDER INFORMATION
Part Number
Resolution
Order Number
Package
Shipping
MC3256
8 to 14-bit
MC3256
LGA-16
Tape & Reel, 5Ku
Table 1. Order Information
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
2 FUNCTIONAL BLOCK DIAGRAM
VDD/VDDIO
Regulators
and Bias
Sensors
Oscillator/
Clock
Generator
Mode Logic
Interrupt
X
Event
Detection
Y
C to V
A/D Converter
(Sigma Delta)
SCL
I2C Slave
Interface
Offset/
Gain
Adjust
SDA
Range &
Scale
GND
Z
INTN
Registers
(64 x 8)
X,Y,Z
data paths
OTP
Memory
VPP
Figure 1. Block Diagram
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
3 PACKAGING AND PIN DESCRIPTION
3.1 PACKAGE OUTLINE
SYMBOL
A
D
E
W
L
n
e
D1
E1
aaa
bbb
ddd
DIMENSION (MM)
MIN. NOM. MAX.
----1
3 BSC
3 BSC
0.2
0.25
0.3
0.417 0.467 0.517
16
0.5 BSC
2 BSC
1 BSC
0.1
0.2
0.08
Figure 2. Package Outline and Mechanical Dimensions
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
3.2 PACKAGE ORIENTATION
Top View
Direction of
Earth gravity
acceleration
Top
Pin 1
XOUT = 0g
YOUT = -1g
ZOUT = 0g
XOUT = -1g
YOUT = 0g
ZOUT = 0g
Side View
XOUT = 0g
YOUT = 0g
ZOUT = +1g
XOUT = +1g
YOUT = 0g
ZOUT = 0g
XOUT = 0g
YOUT = 0g
ZOUT = -1g
XOUT = 0g
YOUT = +1g
ZOUT = 0g
Figure 3. Package Orientation
+Z
-X
-Y
+Y
+X
-Z
Figure 4. Package Axis Reference
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
3.3 PIN DESCRIPTION
Pin
Name
Function
1
VDD/VDDIO
Power supply
2
NC
No connect
3
NC
No connect
4
SCL 1
I2C serial clock input
5
GND
Ground
6
SDA 1
I2C serial data input/output
7
NC
No connect
8
NC
No connect
9
NC
No connect
10
GND
Ground
11
INTN 2
Interrupt input/output, active
LOW 3
12
GND
Ground
13
NC
No connect
14
NC
No connect
15
NC
No connect
16
VPP
Factory program (GND)
Table 2. Pin Description
Notes:
1) This pin requires a pull-up resistor, typically 4.7kΩ to pin VDD/VDDIO. Refer to I2C
Specification for Fast-Mode devices. Higher resistance values can be used (typically
done to reduce current leakage) but such applications are outside the scope of this
datasheet.
2) This pin can be configured by software to operate either as an open-drain output or
push-pull output (MODE: Mode Control Register). If set to open-drain, then it requires a
pull-up resistor, typically 4.7kΩ to pin VDD/VDDIO.
3) INTN pin polarity is programmable in the MODE: Mode Control Register.
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
3.4 TYPICAL APPLICATION CIRCUIT
16
Place cap close
to VDD and
0.1µF
GND on PCB
14
VPP NC NC
1
2
Rp
Rp
}
To Fast-Mode
I2C circuitry1
15
3
4
5
VDD/VDDIO
Rp
NC
NC
GND
NC
INTN
SCL
GND
GND
NC
13
12
11
(optional) To MCU
interrupt input2
10
9
SDA NC NC
6
7
8
NOTE1: Rp are typically 4.7 kΩ pull-up resistors to pin VDD/VDDIO, per I2C specification. When
VDD is powered down, SDA and SCL will be driven low by internal ESD diodes.
NOTE2: Attach typical 4.7 kΩ pull-up resistor if INTN is defined as open-drain.
Figure 5. Typical Application Circuit
In typical applications, the interface power supply may contain significant noise from external
sources and other circuits which should be kept away from the sensor. Therefore, for some
applications a lower-noise power supply might be desirable to power the VDD/VDDIO pin.
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
3.5 TAPE AND REEL
Devices are shipped in reels, in standard cardboard box packaging. See the figures below.





Dimensions in mm.
10 sprocket hole pitch cumulative tolerance ±0.2.
Pocket position relative to sprocket hole measured as true position of pocket, not pocket
hole.
Ao and Bo measured on a plane 0.3mm above the bottom of the pocket.
Ko measured from a plane on the inside bottom of the pocket to the top surface of the
carrier.
Figure 6. MC3256 Tape Dimensions
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MC3256 3-Axis Accelerometer

Preliminary Datasheet
Dimensions in mm.
Figure 7. MC3256 Tape Dimensions
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
4 SPECIFICATIONS
4.1 ABSOLUTE MAXIMUM RATINGS
Parameters exceeding the Absolute Maximum Ratings may permanently damage the device.
Minimum / Maximum
Value
Unit
Rating
Symbol
Supply Voltages
Pin
VDD/VDDIO
-0.3 / +3.6
V
Acceleration, any axis, 100 µs
g MAX
10000
g
Ambient operating temperature
TOP
-40 / +85
⁰C
Storage temperature
TSTG
-40 / +125
⁰C
ESD human body model
HBM
± 2000
V
Latch-up current at Top = 25 ⁰C
ILU
200
mA
Input voltage to non-power pin
Pins INTN, SCL
and SDA
-0.3 / (VDD + 0.3) or 3.6
whichever is lower
V
Table 3. Absolute Maximum Ratings
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
4.2 SENSOR CHARACTERISTICS
VDD = 2.8V, Top = 25 ⁰C unless otherwise noted
Parameter
Conditions
Min
Typ
Max
Unit
±2
±4
Resolution and range set in
OUTCFG: Output Configuration
Register
Acceleration range
±8
g
±12
±16
Sensitivity
Depends on settings in
OUTCFG: Output Configuration
Register
Sensitivity Temperature
Coefficient 1
-10 ≤ Top ≤ +55 ⁰C
Zero-g Offset
Zero-g Offset
Temperature Coefficient 1
-10 ≤ Top ≤ +55 ⁰C
8
4096
± 0.025
%/⁰C
± 80
mg
±1
mg/⁰C
X,Y: 125
Noise Density 1
Z: 200
Nonlinearity 1
Cross-axis Sensitivity
1
Between any two axes
LSB/g
μg/√Hz
2
% FS
2
%
Table 4. Sensor Characteristics
1
Values are based on device characterization, not tested in production.
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
4.3 ELECTRICAL AND TIMING CHARACTERISTICS
4.3.1 ELECTRICAL POW ER AND INTERNAL CHARACTERISTICS
Parameter
Conditions
Symbol
Min
Supply voltage 2
VDD
Sample Rate Tolerance 3
Tclock
Typ
Max
Unit
1.7
3.6
V
-10
10
%
Max
Unit
Test condition: VDD = 2.8V, Top = 25 ⁰C unless otherwise noted
Parameter
Conditions
Symbol
Standby current
Min
Typ
I ddsb
4
WAKE state supply
current
(highly dependent on
sample rate)
I dd1
50
I dd256
130
Pad Leakage
Per I/O pad
I pad
-1
0.01
μA
μA
1
μA
Table 5. Electrical Characteristics
2
Min and Max limits are hard limits without additional tolerance.
3
Values are based on device characterization, not tested in production.
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4.3.2 I2C ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Min
Max
Unit
LOW level input voltage
VIL
-0.5
0.3*VDD
V
HIGH level input voltage
VIH
0.7*VDD
-
V
Hysteresis of Schmitt trigger inputs
Vhys
0.05*VDD
-
V
Output voltage, pin INTN, Iol ≤ 2 mA
Vol
0
0.4
V
Voh
0
0.9*VDD
V
Vols
-
0.1*VDD
V
Ii
-10
10
µA
Ci
-
10
pF
Output voltage, pin SDA (open drain),
Iol ≤ 1 mA
Input current, pins SDA and SCL (input voltage
between 0.1*VDD and 0.9*VDD max)
Capacitance, pins SDA and SCL 4
Table 6. I2C Electrical and Timing Characteristics
NOTES:



4
If multiple slaves are connected to the I2C signals in addition to this device, only 1 pullup resistor on each of SDA and SCL should exist. Also, care must be taken to not
violate the I2C specification for capacitive loading.
When pin VDD/VDDIO is not powered and set to 0V, INTN, SDA and SCL will be held
to VDD plus the forward voltage of the internal static protection diodes, typically about
0.6V.
When pin VDD/VDDIO is disconnected from power or ground (e.g. Hi-Z), the device
may become inadvertently powered up through the ESD diodes present on other
powered signals.
Values are based on device characterization, not tested in production.
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MC3256 3-Axis Accelerometer
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4.3.3 I2C TIMING CHARACTERISTICS
Figure 8. I2C Interface Timing
Standard
Mode
Parameter
Description
fSCL
Fast Mode
Min
Max
Min
Max
SCL clock frequency
0
100
0
400
kHz
tHD; STA
Hold time (repeated) START condition
4.0
-
0.6
-
μs
tLOW
LOW period of the SCL clock
4.7
-
1.3
-
μs
tHIGH
4.0
-
0.6
-
μs
4.7
-
0.6
-
μs
tHD;DAT
HIGH period of the SCL clock
Set-up time for a repeated START
condition
Data hold time
5.0
-
-
-
μs
tSU;DAT
Data set-up time
250
-
100
-
ns
tSU;STO
Set-up time for STOP condition
4.0
-
0.6
-
μs
tBUF
Bus free time between a STOP and
START
4.7
tSU;STA
-
1.3
-
Units
μs
Table 7. I2C Timing Characteristics
NOTE: Values are based on I2C Specification requirements, not tested in production.
See also Section 10.3 I2C Message Format.
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
5 GENERAL OPERATION
The device supports the reading of samples and device status upon interrupt or via polling.
5.1 SENSOR SAMPLING
Measurement data is stored in the “extended” registers XOUT_EX, YOUT_EX, and ZOUT_EX.
The byte with the lower address of the byte pair is the least significant byte while the byte with
the next higher address is the most significant byte. The measurement data is represented as
2’s complement format.
The desired resolution and full scale acceleration range are set in OUTCFG: Output
Configuration Register.
5.2 OFFSET AND GAIN CALIBRATION
Digital offset and gain calibration can be performed on the sensor, if necessary, in order to
reduce the effects of post-assembly influences and stresses which may cause the sensor
readings to be offset from their factory values.
5.3 TAP DETECTION
The device supports directional tap detection in ±X, ±Y or ±Z. Each axis is independent,
although only one direction per axis is supported simultaneously. The threshold, duration, and
dead-time of tap detection can be set for each axis, and six flag/status bits are maintained in a
status register. The tap hardware uses a second order high-pass filter to detect fast
impulse/transition acceleration events. The external interrupt pin can be used to indicate that a
tap event has been detected.
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MC3256 3-Axis Accelerometer
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6 OPERATIONAL STATES
The device has two states of operation: STANDBY (the default state after power-up), and
WAKE.
The STANDBY state offers the lowest power consumption. In this state, the I2C interface is
active and all register reads and writes are allowed. There is no event detection, sampling, or
acceleration measurement in the STANDBY state. Internal clocking is halted. Complete access
to the register set is allowed in this state, but interrupts cannot be serviced. The device
defaults to the STANDBY state following power-up. The time to change states from STANDBY
to WAKE is less than 10uSec.
Registers can be written (and therefore resolution, range. thresholds and other settings
changed) only when the device is in STANDBY state.
The I2C interface allows write access to all registers only in the STANDBY state. In WAKE
state, the only I2C register write access permitted is to the MODE: Mode Control Register. Full
read access is allowed in all states.
State
I2C Bus
Description
STANDBY
Device responds to
I2C bus (R/W)
Device is powered; Registers can be accessed via I2C. Lowest
power state. No interrupt generation, internal clocking disabled.
Default power-on state.
WAKE
Device responds to
I2C bus (Read)
Continuous sampling and reading of sense data. All registers except
the MODE: Mode Control Register are read-only.
Table 8. Operational States
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MC3256 3-Axis Accelerometer
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7 OPERATIONAL STATE FLOW
Figure 9. Operational State Flow shows the operational state flow for the device. The device
defaults to STANDBY following power-on.
WAKE
OPCON=00
OPCON=01
STANDBY
Figure 9. Operational State Flow
The operational state may be forced to a specific state by writing into the OPCON bits, as
shown below. Two bits are specified in order to promote software compatibility with other
mCube devices. The operational state will stay in the mode specified until changed:
Action
Setting
Force Wake State
OPCON[1:0] = 01
Force Standby State
OPCON[1:0] = 00




Effect
Switch to WAKE state and stay there
Continuous sampling
Switch to STANDBY state and stay
there
Disable sensor and event sampling
Table 9. Forcing Operational States
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MC3256 3-Axis Accelerometer
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8 INTERRUPTS
The sensor device utilizes output pin INTN to signal to an external microprocessor that an
event has been sensed. The microprocessor would contain an interrupt service routine which
would perform certain tasks after receiving this interrupt and reading the associated status bits,
perhaps after a sample was made ready. If interrupts are to be used, the microprocessor must
set up the registers in the sensor so that when a specific event is detected, the microprocessor
would receive the interrupt and the interrupt service routine would be executed. If polling is
used there is no need for the interrupt registers to be set up.
For products that will instead use polling, the method of reading sensor data would be slightly
different. Instead of receiving an interrupt when an event occurs, the microprocessor must
periodically poll the sensor and read status data (the INTN pin is not used). For most
applications, this is likely best done at the sensor sampling rate or faster.
Note that at least one I2C STOP condition must be present between samples in order for
the sensor to update the sample data registers.
8.1 ENABLING AND CLEARING INTERRUPTS
The SR: Status Register contains the flag bits for the sample acquisition interrupt ACQ_INT
and tap interrupts. The INTEN: Interrupt Enable Register determines if a flag event generates
interrupts. The flags (and interrupts) are cleared and rearmed each time the SR: Status
Register is read. When an event is detected, it is masked with a flag bit in the INTEN: Interrupt
Enable Register and then the corresponding status bit is set in the SR: Status Register.
Multiple interrupt events might be reported at the same time in the SR: Status Register, so
software must interpret and prioritize the results. The polarity and driving mode of the external
interrupt signal may be chosen by setting the IPP and IAH bits in the MODE: Mode Control
Register.
The pin INTN is cleared during the next I2C bus cycle after the device ID has been
recognized by the device.
8.2 ACQ_INT INTERRUPT
The ACQ_INT flag bit in the SR: Status Register is always active. This bit is cleared when it is
read. When a sample has been produced, an interrupt will be generated only if the
ACQ_INT_EN bit in the INTEN: Interrupt Enable Register is active. Note that the frequency of
this ACQ_INT bit being set active is always the same as the sample rate.
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9 SAMPLING
9.1 CONTINUOUS SAMPLING
The device has the ability to read all sampled readings in a continuous sampling fashion. The
device always updates the XOUT, YOUT, and ZOUT registers at the chosen ODR.
An optional interrupt can be generated each time the sample registers have been updated
(ACQ_INT interrupt bit in the INTEN: Interrupt Enable Register).
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MC3256 3-Axis Accelerometer
10
Preliminary Datasheet
I2C INTERFACE
10.1 PHYSICAL INTERFACE
The I2C slave interface operates at a maximum speed of 400 kHz. The SDA (data) is an opendrain, bi-directional pin and the SCL (clock) is an input pin.
The device always operates as an I2C slave.
An I2C master initiates all communication and data transfers and generates the SCL clock that
synchronizes the data transfer. The I2C device address depends upon the state of the VPP pin
during power-up as shown in the table below.
An optional I2C watchdog timer reset can be enabled to prevent bus stall conditions. When
enabled, the sensor I2C circuitry will reset itself if the master takes too long to issue clocks to
the sensor during a read cycle (i.e. if there is a gap in SCL clocks of more than about
200mSec). A status bit can be read to observe if this condition has occurred.
7-bit Device ID
8-bit Address –
Write
8-bit Address –
Read
VPP level upon
power-up
0x4C
(0b1001100)
0x98
0x99
GND
0x6C
(0b1101100)
0xD8
0xD9
VDD
Table 10. I2C Address Selection
The I2C interface remains active as long as power is applied to the VDD/VDDIO pin. In
STANDBY state the device responds to I2C read and write cycles, but interrupts cannot be
serviced or cleared. All registers can be written in the STANDBY state, but in WAKE only the
MODE: Mode Control Register can be modified.
Internally, the registers which are used to store samples are clocked by the sample clock gated
by I2C activity. Therefore, in order to allow the device to collect and present samples in the
sample registers at least one I2C STOP condition must be present between samples.
Refer to the I2C specification for a detailed discussion of the protocol. Per I2C requirements,
SDA is an open drain, bi-directional pin. SCL and SDA each require an external pull-up
resistor, typically 4.7kΩ.
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10.2 TIMING
See Section 4.3.3 I2C Timing Characteristics for I2C timing requirements.
10.3 I2C MESSAGE FORMAT
Note that at least one I2C STOP condition must be present between samples in order for
the sensor to update the sample data registers.
The device uses the following general format for writing to the internal registers. The I2C
master generates a START condition, and then supplies the 7-bit device ID. The 8th bit is the
R/W# flag (write cycle = 0). The device pulls SDA low during the 9 th clock cycle indicating a
positive ACK.
The second byte is the 8-bit register address of the device to access, and the last byte is the
data to write.
START
I2C Master
(To Sensor)
S
Device ID
1
1
0
1
R/W#
1
1
0
I2C Slave
(From Sensor)
Register Address
0
R7
R6
R5
R4
R3
R2
Register Data to Write
R1
R0
D7
D6
D5
D4
D4
D2
D1
Stop
D0
P
ACK
ACK
ACK
ACK/NAK
ACK/NAK
ACK/NAK
Figure 10. I2C Message Format, Write Cycle, Single Register Write
In a read cycle, the I2C master writes the device ID (R/W#=0) and register address to be read.
The master issues a RESTART condition and then writes the device ID with the R/W# flag set
to ‘1’. The device shifts out the contents of the register address.
START
I2C Master
(To Sensor)
I2C Slave
(from Sensor)
S
Device ID
1
1
0
1
1
R/W#
1
0
Register Address
0
R7
R6
R5
R4
R3
R2
Restart
R1
R0
R
Device ID
1
1
0
1
1
R/W#
1
0
NAK
NAK
1
ACK
ACK
ACK
ACK/NAK
ACK/NAK
ACK/NAK
D7
D6
D5
D4
D3
D2
D1
STOP
P
D0
Read Data Byte
Figure 11. I2C Message Format, Read Cycle, Single Register Read
The I2C master may write or read consecutive register addresses by writing or reading
additional bytes after the first access. The device will internally increment the register address.
If an I2C burst read operation reads past register address 0x12 the internal address
pointer “wraps” to address 0x03 and the contents of the SR: Status Register are
returned. This allows application software to burst read the contents of the six extended
registers and the relevant device state registers in a single I2C cycle.
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
10.4 WATCHDOG TIMER
When enabled (see MODE: Mode Control Register), the I2C watchdog timer prevents bus stall
conditions in cases where the master does not provide enough clocks to the slave to complete
a read cycle.
During a read cycle, the slave that is actively driving the bus (SDA pin) will not release the bus
until 9 SCL clock edges are detected. While the SDA pin is held low by a slave open-drain
output, any other I2C devices attached to the sample bus will be unable to communicate. If the
slave does not see 9 SCL clocks from the master within the timeout period, the slave will
assume a system problem has occurred and so the I2C circuitry will be reset, the SDA pin
released and the sensor made ready for additional I2C commands.
No other changes to registers are made.
When enabled, the I2C watchdog timer does not resolve why the master did not provide
enough clocks to complete a read cycle, but it does prevent a slave from holding the bus
indefinitely.
When enabled, the timeout period is about 200mSec.
When an I2C watchdog timer event is triggered, the I2C_WDT bit in register will be set active
by the Watchdog timer hardware. External software can detect this status by noticing this bit is
active. The act of reading register 0x04 will clears the status.
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MC3256 3-Axis Accelerometer
11
Preliminary Datasheet
REGISTER INTERFACE
The device has a simple register interface which allows a MCU or I2C master to configure and
monitor all aspects of the device. This section lists an overview of user programmable
registers. By convention, Bit 0 is the least significant bit (LSB) of a byte register.
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.1 REGISTER SUMMARY
Addr
Name
Description
Bit 7
Bit 6
Bit 5
0x00-0x02
0x03
SR
Bit 2
Bit 1
Bit 0
POR
Value
R/
5
W
RESERVED
ACQ_INT
Resv
TAP_ZN
TAP_ZP
TAP_YN
TAP_YP
TAP_XN
TAP_XP
0x00
R
Operational Device
Status Register
OTPA
Resv
Resv
I2C_WDT
Resv
Resv
OPSTAT
[1]
OPSTAT
[0]
0x00
R
TIYNEN
TIYPEN
TIXNEN
TIXPEN
0x00
W
Resv
0
OPCON
[1]
OPCON
[0]
0x00
W
RATE[2]
RATE[2]
RATE[0]
0x00
W
0x09 TAPEN Tap Control Register TAP_EN THRDUR TAPZNEN TAPZPEN TAPYNEN TAPYPEN TAPXNEN TAPXPEN
0x00
W
0x0A TTTRX
X Tap Duration and
TTTRX[7] TTTRX[6] TTTRX[5] TTTRX[4] TTTRX[3] TTTRX[2] TTTRX[1] TTTRX[0]
Threshold Register
0x00
W
0x0B
TTTRY
Y Tap Duration and
TTTRY[7] TTTRY[6] TTTRY[5] TTTRY[4] TTTRY[3] TTTRY[2] TTTRY[1] TTTRY[0]
Threshold Register
0x00
W
0x0C
TTTRZ
0x00
W
0x0D
XOUT
_EX_L
0x00
R
0x00
R
0x00
R
0x00
R
0x00
R
0x05
0x06
RESERVED
INTEN
0x07 MODE
0x08
SRTFR
Interrupt Enable
Register
ACQ_INT_
EN
Resv
Mode Register
IAH
IPP
TIZNEN
TIZPEN
I2C_WDT I2C_WDT_
_POS
NEG
Sample Rate and Tap
TAP_LATCH FLIP_TAPZ FLIP_TAPY FLIP_TAPX RATE[3]
Feature Register
6
Z Tap Duration and
TTTRZ[7] TTTRZ[6] TTTRZ[5] TTTRZ[4] TTTRZ[3] TTTRZ[2] TTTRZ[1] TTTRZ[0]
Threshold Register
XOUT Extended
XOUT
XOUT
XOUT
XOUT
XOUT
XOUT
XOUT
XOUT
Register
_EX[7]
_EX[6]
_EX[5]
_EX[4]
_EX[3]
_EX[2]
_EX[1]
_EX[0]
XOUT
_EX_H
YOUT
0x0F
_EX_L
YOUT
0x10 _EX_H
ZOUT
0x11 _EX_L
XOUT Extended
Register
YOUT Extended
Register
YOUT Extended
Register
ZOUT Extended
Register
XOUT
_EX[15]
YOUT
_EX[7]
YOUT
_EX[15]
ZOUT
_EX[7]
XOUT
_EX[14]
YOUT
_EX[6]
YOUT
_EX[14]
ZOUT
_EX[6]
XOUT
_EX[13]
YOUT
_EX[5]
YOUT
_EX[13]
ZOUT
_EX[5]
XOUT
_EX[12]
YOUT
_EX[4]
YOUT
_EX[12]
ZOUT
_EX[4]
XOUT
_EX[11]
YOUT
_EX[3]
YOUT
_EX[11]
ZOUT
_EX[3]
XOUT
_EX[10]
YOUT
_EX[2]
YOUT
_EX[10]
ZOUT
_EX[2]
XOUT
_EX[9]
YOUT
_EX[1]
YOUT
_EX[9]
ZOUT
_EX[1]
XOUT
_EX[8]
YOUT
_EX[0]
YOUT
_EX[8]
ZOUT
_EX[0]
ZOUT
0x12 _EX_H
ZOUT Extended
Register
ZOUT
_EX[15]
ZOUT
_EX[14]
ZOUT
_EX[13]
ZOUT
_EX[12]
ZOUT
_EX[11]
ZOUT
_EX[10]
ZOUT
_EX[9]
ZOUT
_EX[8]
0x00
R
Resv
RES[2]
RES[1]
RES[0]
0x00
W
XOFF[3]
XOFF[2]
XOFF[1]
XOFF[0] Per chip W
0x0E
0x13-0x1F
0x20 OUTCFG
0x21
6
Bit 3
Status Register
0x04 OPSTAT
5
Bit 4
XOFFL
RESERVED
Output
Configuration
Register
X-Offset
LSB Register
6
0
XOFF[7]
RANGE[2] RANGE[1] RANGE[0]
XOFF[6]
XOFF[5]
XOFF[4]
0x22 XOFFH
X-Offset
MSB Register
XGAIN[8] XOFF[14] XOFF[13] XOFF[12] XOFF[11] XOFF[10] XOFF[9]
XOFF[8] Per chip W
0x23
Y-Offset
LSB Register
YOFF[7]
YOFF[0]
YOFFL
YOFF[6]
YOFF[5]
YOFF[4]
YOFF[3]
YOFF[2]
YOFF[1]
Per chip W
‘R’ registers are read-only, via external I2C access. ‘W’ registers are read-write, via external I2C access.
Software must always write a zero ‘0’ to this bit.
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MC3256 3-Axis Accelerometer
Addr
Name
Description
Bit 7
Preliminary Datasheet
Bit 6
Bit 5
Bit 2
Bit 1
Bit 0
POR
Value
R/
5
W
Y-Offset
MSB Register
YGAIN[8] YOFF[14] YOFF[13] YOFF[12] YOFF[11] YOFF[10] YOFF[9]
YOFF[8]
Per chip W
0x25
ZOFFL
Z-Offset
LSB Register
ZOFF[7]
ZOFF[1]
ZOFF[0]
Per chip W
0x26 ZOFFH
Z-Offset
MSB Register
ZGAIN[8] ZOFF[14] ZOFF[13] ZOFF[12] ZOFF[11] ZOFF[10] ZOFF[9]
ZOFF[8]
Per chip W
0x27 XGAIN
X Gain Register
XGAIN[7] XGAIN[6] XGAIN[5] XGAIN[4] XGAIN[3] XGAIN[2] XGAIN[1] XGAIN[0] Per chip W
0x28 YGAIN
Y Gain Register
YGAIN[7] YGAIN[6] YGAIN[5] YGAIN[4] YGAIN[3] YGAIN[2] YGAIN[1] YGAIN[0] Per chip W
0x29
Z Gain Register
ZGAIN[7] ZGAIN[6] ZGAIN[5] ZGAIN[4] ZGAIN[3] ZGAIN[2] ZGAIN[1] ZGAIN[0] Per chip W
ZGAIN
0x3B PCODE
ZOFF[6]
ZOFF[5]
ZOFF[4]
ZOFF[3]
ZOFF[2]
RESERVED
Product Code
Register
0
0x3C to 0x3F
Table 11. Register Summary
8
Bit 3
0x24 YOFFH
0x2A-0x3A
7
Bit 4
0
0
1
*7
7
*
7
*
0
Per chip
R
RESERVED
8
Bits denoted with ‘*’ might be any value, set by the factory. Software should ignore these bits.
No registers are updated with new event status or samples while a I2C cycle is in process.
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MC3256 3-Axis Accelerometer
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11.2 SR: STATUS REGISTER
This register contains the flag/event bits for tap detection and sample acquisition. The TAP bits
will only transition if the corresponding enable bit has been set in register 0x09, the TAP
control register. Each read to this register will clear the latched event(s) and re-arm the flag for
the next event.
Addr
Name
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
POR
Value
R/
W
0x03
SR
Status Register
ACQ_INT
Resv
TAP_ZN
TAP_ZP
TAP_YN
TAP_YP
TAP_XN
TAP_XP
0x00
R
TAP_XP
TAP_XN
TAP_YP
TAP_YN
TAP_ZP
TAP_ZN
ACQ_INT
Positive X-axis TAP detected, flag is set in polling mode or interrupt mode.
Negative X-axis TAP detected, flag is set in polling mode or interrupt mode.
Positive Y-axis TAP detected, flag is set in polling mode or interrupt mode.
Negative Y-axis TAP detected, flag is set in polling mode or interrupt mode.
Positive Z-axis TAP detected, flag is set in polling mode or interrupt mode.
Negative Z-axis TAP detected, flag is set in polling mode or interrupt mode.
Sample has been acquired, flag bit is set in polling mode or interrupt mode. This bit cannot
be disabled and is always set be hardware when a sample is ready. The host must poll at the
sample rate or faster to see this bit transition.
Table 12. SR Status Register
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.3 OPSTAT: DEVICE STATUS REGISTER
The device status register reports various conditions of the sensor circuitry.
Addr
Name
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
POR
Value
R/
W
0x04
OPSTAT
Operational
Device Status
Register
OTPA
Resv
Resv
I2C_WDT
Resv
Resv
OPSTAT
[1]
OPSTAT
[0]
0x00
R
OPSTAT[1:0]
I2C_WDT
OTPA
Sampling State Register Status, Wait State Register Status
00: Device is in STANDBY state, no sampling
01: Device is in WAKE state, sampling at set sample rate
10: Reserved
11: Reserved
I2C watchdog timeout
0: No watchdog event detected
1: Watchdog event has been detected by hardware, I2C slave state machine reset to
idle. This flag is cleared by reading this register.
One-time Programming (OTP) activity status
0: Internal memory is idle and the device is ready for use
1: Internal memory is active and the device is not yet ready for use
Table 13. OPSTAT Device Status Register
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.4 INTEN: INTERRUPT ENABLE REGISTER
The interrupt enable register allows the flag bits for specific TAP and sample events to also
trigger a transition of the external INTN pin. This is the only effect these bits have as the flag
bits will be set/cleared in the SR: Status Register regardless of which interrupts are enabled in
this register.
Addr
Name
0x06
INTEN
TIXPEN
TIXNEN
TIYPEN
TIYNEN
TIZPEN
TIZNEN
ACQ_INT_EN
Description
Bit 7
Interrupt Enable ACQ_INT_
Register
EN
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
POR
Value
R/
W
Resv
TIZNEN
TIZPEN
TIYNEN
TIYPEN
TIXNEN
TIXPEN
0x00
W
Positive X-axis TAP interrupt enable
0: Disabled (default)
1: Enabled. The corresponding TAP enable bit in register 0x09 must be enabled. The INTN
pad will transition.
Negative X-axis TAP interrupt enable
0: Disabled (default)
1: Enabled. The corresponding TAP enable bit in register 0x09 must be enabled. The INTN
pad will transition.
Positive Y-axis TAP interrupt enable
0: Disabled (default)
1: Enabled. The corresponding TAP enable bit in register 0x09 must be enabled. The INTN
pad will transition.
Negative Y-axis TAP interrupt enable
0: Disabled (default)
1: Enabled. The corresponding TAP enable bit in register 0x09 must be enabled. The INTN
pad will transition.
Positive Z-axis TAP interrupt enable
0: Disabled (default)
1: Enabled. The corresponding TAP enable bit in register 0x09 must be enabled. The INTN
pad will transition.
Negative Z-axis TAP interrupt enable
0: Disabled (default)
1: Enabled. The corresponding TAP enable bit in register 0x09 must be enabled. The INTN
pad will transition.
Generate Interrupt
0: Disable automatic interrupt on INTN pad after each sample (default).
1: Enable automatic interrupt on INTN pad after each sample.
Table 14. INTEN Interrupt Enable Register Settings
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.5 MODE: MODE CONTROL REGISTER
The MODE register controls the active operating state of the device. This register can be
written from either operational state (STANDBY or WAKE).
Addr
Name
Description
Bit 7
Bit 6
0x07
MODE
Mode Register
IAH
IPP
Bit 5
Bit 4
I2C_WDT_ I2C_WDT_
POS
NEG
Bit 3
Bit 2
Resv
0
*
Bit 1
Bit 0
POR
Value
R/
W
OPCON
[1]
OPCON
[0]
0x00
W
NOTE*: Software must always write a zero ‘0’ to Bit 2.
OPCON
[1:0]
I2C_WDT_NEG
I2C_WDT_POS
IPP
IAH
00: STANDBY state (default)
01: WAKE state
10: Reserved
11: Reserved
0: I2C watchdog timer for negative SCL stalls
are disabled (default)
1: I2C watchdog timer for negative SCL stalls
are enabled
0: I2C watchdog timer for positive SCL stalls
are disabled (default)
1: I2C watchdog timer for positive SCL stalls
are enabled
0: Interrupt pin INTN is open drain (default)
and requires an external pull-up to pin
VDD/VDDIO.
1: Interrupt pin INTN is push-pull. No external
pull-up resistor should be installed.
0: Interrupt pin INTN is active low (default)
1: Interrupt pin INTN is active high
Set Device Operational State.
WAKE or STANDBY
WDT for negative SCL stalls
WDT for positive SCL stalls
Interrupt Push Pull
Interrupt Active High
Table 15. MODE Register Functionality
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.6 SRTFR: SAMPLE RATE AND TAP FEATURE REGISTER
This register sets the sampling output data rate (ODR) for sensor. The upper 4 bit control
functions related to tap hardware. The lower 4 bits control the rate, as shown in the table
below.
Addr
Name
0x08
SRTFR
RATE[3:0]
FLIP_TAPX
FLIP_TAPY
FLIP_TAPZ
TAP_LATCH
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Sample Rate and
TAP_LATC
Tap Feature
FLIP_TAPZ FLIP_TAPY FLIP_TAPX RATE[3]
H
Register
Bit 2
Bit 1
Bit 0
POR
Value
R/
W
RATE[2]
RATE[1]
RATE[0]
0x00
W
0000: 32 Hz (default)
0001: 16 Hz
0010: 8 Hz
0011: 4 Hz
0100: 2 Hz
0101: 1 Hz
0110: 0.5 Hz
0111: 0.25 Hz
1000: 64 Hz
1001: 128 Hz
1010: 256 Hz
1011: Reserved
1100: Reserved
1101: Reserved
1110: Reserved
1111: Reserved
0: X positive and X negative tap are not switched (default)
1: X positive and X negative tap are switched
0: Y positive and Y negative tap are not switched (default)
1: Y positive and Y negative tap are switched
0: Z positive and Z negative tap are not switched (default)
1: Z positive and Z negative tap are switched
0: Multiple TAPs (of those which are enabled) are detected and latched (default)
1: First TAP detected (e.g. of those enabled) is latched, all others ignored until serviced by
reading register 0x03.
Table 16. SRTFR Register Functionality
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.7 TAPEN: TAP CONTROL REGISTER
This register allows the enabling and disabling of tap detection for axes and direction. Bit 7
disables tap detection completely. Bit 6, switches the feature controlled by registers 0xA, 0xB,
and 0xC. When bit 6 is ‘0’, the tap duration and quiet parameters are accessed in 0xA to 0xC,
and when ‘1’ the tap detection threshold is accessed.
Addr
Name
Description
0x09
TAPEN
Tap Control
Register
TAPXPEN
TAPXNEN
TAPYPEN
TAPYNEN
TAPZPEN
TAPZNEN
THRDUR
TAP_EN
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TAP_EN THRDUR TAPZNEN TAPZPEN TAPYNEN TAPYPEN TAPXNEN TAPXPEN
POR
Value
R/
W
0x00
W
0: Disable positive tap detection on X-axis (default)
1: Enable positive tap detection on X-axis
0: Disable negative tap detection on X-axis (default)
1: Enable negative tap detection on X-axis
0: Disable positive tap detection on Y-axis (default)
1: Enable positive tap detection on Y-axis
0: Disable negative tap detection on Y-axis (default)
1: Enable negative tap detection on Y-axis
0: Disable positive tap detection on Z-axis (default)
1: Enable positive tap detection on Z-axis
0: Disable negative tap detection on Z-axis (default)
1: Enable negative tap detection on Z-axis
0: Registers 0xA, 0xB, 0xC point to tap duration and quiet period (default)
1: Registers 0xA, 0xB, 0xC point to tap threshold settings.
See description of TTTRX, TTTRY and TTTRZ.
0: All tap detection is disabled, regardless of bits [5:0] (default)
1: Tap detection is enabled, individual enables control detection (bits 5-0)
Table 17. TAPEN Register Settings
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.8 TTTRX,TTTRY, TTTRZ: X, Y AND Z TAP DURATION AND THRESHOLD
REGISTERS
These 3 registers allow control of both the tap duration settings and tap threshold settings,
depending upon the setting of the THRDUR bit (bit 6) in the TAPEN register (0x09).
When THRDUR=0, the register meaning is as follows:
Addr
0x0A
0x0B
0x0C
Name
Description
Tap X
QuietDuration
Tap Y
QuietDuration
Tap Z
QuietDuration
TTTRX[7] TTTRX[6] TTTRX[5] TTTRX[4] TTTRX[3] TTTRX[2] TTTRX[1] TTTRX[0]
POR
Value
R/
W
TAP X Duration
Register
TAP_X_
QUIET[3]
TAP_X_
QUIET[2]
TAP_X_
QUIET[1]
TAP_X_
QUIET[0]
TAP_X_
DUR[3]
TAP_X_
DUR[2]
TAP_X_
DUR[1]
TAP_X_
DUR[0]
0x00
W
TAP Y Duration
Register
TAP_Y_
QUIET[3]
TAP_Y_
QUIET[2]
TAP_Y_
QUIET[1]
TAP_Y_
QUIET[0]
TAP_Y_
DUR[3]
TAP_Y_
DUR[2]
TAP_Y_
DUR[1]
TAP_Y_
DUR[0]
0x00
W
TAP Z Duration
Register
TAP_Z_
QUIET[3]
TAP_Z_
QUIET[2]
TAP_Z_
QUIET[1]
TAP_Z_
QUIET[0]
TAP_Z_
DUR[3]
TAP_Z_
DUR[2]
TAP_Z_
DUR[1]
TAP_Z_
DUR[0]
0x00
W
When THRDUR=1, the register meaning is as follows:
Addr
Name
Description
TTTRX[7] TTTRX[6] TTTRX[5] TTTRX[4] TTTRX[3] TTTRX[2] TTTRX[1] TTTRX[0]
POR
Value
R/
W
0x0A
Tap X
Thresh
TAP X Threshold
Register
TAP_X_TH TAP_X_TH TAP_X_TH TAP_X_TH TAP_X_TH TAP_X_TH TAP_X_TH TAP_X_TH
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
0x00
W
0x0B
Tap Y
Thresh
TAP Y Threshold
Register
TAP_Y_TH TAP_Y_TH TAP_Y_TH TAP_Y_TH TAP_Y_TH TAP_Y_TH TAP_Y_TH TAP_Y_TH
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
0x00
W
0x0C
Tap Z
Thresh
TAP Z Threshold
Register
TAP_Z_TH TAP_Z_TH TAP_Z_TH TAP_Z_TH TAP_Z_TH TAP_Z_TH TAP_Z_TH TAP_Z_TH
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
0x00
W
TAP_X_DUR[3:0]
TAP_Y_DUR[3:0]
This 4-bit value (0 to 15) sets the maximum number of samples an event must qualify as a tap
before it is rejected. For example, if the value is 4, a fast acceleration event which exceeded the
threshold for more than 4 consecutive samples would not trigger a tap event.
TAP_Z_DUR[3:0]
TAP_X_QUIET[3:0]
TAP_Y_QUIET[3:0]
This 4-bit value (0 to 15) sets the number of samples to be ignored after successful tap detection.
Detection is rearmed after the specific number of samples has passed.
TAP_Z_QUIET[3:0]
TAP_X_TH[7:0]
TAP_Y_TH[7:0]
TAP_Z_TH[7:0]
This 8-bit unsigned value sets the minimum magnitude a snap event must reach before a tap is
considered detected. Setting this parameter to a higher value will effectively reject all but the
largest acceleration events as tap. Some experimentation in the final form-factor may be needed to
find an appropriate setting for a particular product.
Table 18. TTTRX, TTTRY and TTTRZ Register Settings
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.9 XOUT_EX, YOUT_EX & ZOUT_EX: X, Y, Z-AXIS ACCELERATION
REGISTERS
The measurements from sensors for the 3-axes are available in these 3 registers. The mostsignificant bit of the value is the sign bit, and is sign extended to the higher bits. Note that all 3
axes are sampled and updated simultaneously. If an I2C burst read operation reads past
register address 0x12 the internal address pointer “wraps” to address 0x03 and the contents of
the SR: Status Register are returned. This allows application software to burst read the
contents of the six extended registers and relevant device state registers in a single I2C read
cycle.
Once an I2C start bit has been recognized by the sensor, registers will not be updated until an
I2C stop bit has occurred. Therefore, if software desires to read the low and high byte registers
‘atomically’, knowing that the values have not been changed, it should do so by issuing a start
bit, reading one register, then reading the other register then issuing a stop bit. Note that all 6
registers may be read in one burst with the same effect.
Addr
POR
Value
R/
W
0x00
R
0x00
R
0x00
R
0x00
R
ZOUT
_EX[0]
0x00
R
ZOUT
_EX[8]
0x00
R
Name
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x10
XOUT
_EX_L
XOUT
_EX_H
YOUT
_EX_L
YOUT
_EX_H
XOUT Extended
Register
XOUT Extended
Register
YOUT Extended
Register
YOUT Extended
Register
XOUT
_EX[7]
XOUT
_EX[15]
YOUT
_EX[7]
YOUT
_EX[15]
XOUT
_EX[6]
XOUT
_EX[14]
YOUT
_EX[6]
YOUT
_EX[14]
XOUT
_EX[5]
XOUT
_EX[13]
YOUT
_EX[5]
YOUT
_EX[13]
XOUT
_EX[4]
XOUT
_EX[12]
YOUT
_EX[4]
YOUT
_EX[12]
XOUT
_EX[3]
XOUT
_EX[11]
YOUT
_EX[3]
YOUT
_EX[11]
XOUT
_EX[2]
XOUT
_EX[10]
YOUT
_EX[2]
YOUT
_EX[10]
XOUT
_EX[1]
XOUT
_EX[9]
YOUT
_EX[1]
YOUT
_EX[9]
XOUT
_EX[0]
XOUT
_EX[8]
YOUT
_EX[0]
YOUT
_EX[8]
0x11
ZOUT
_EX_L
ZOUT Extended
Register
ZOUT
_EX[7]
ZOUT
_EX[6]
ZOUT
_EX[5]
ZOUT
_EX[4]
ZOUT
_EX[3]
ZOUT
_EX[2]
ZOUT
_EX[1]
0x12
ZOUT
_EX_H
ZOUT Extended
Register
ZOUT
_EX[15]
ZOUT
_EX[14]
ZOUT
_EX[13]
ZOUT
_EX[12]
ZOUT
_EX[11]
ZOUT
_EX[10]
ZOUT
_EX[9]
0x0D
0x0E
0x0F
Table 19. Extended Accelerometer Registers
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.10 OUTCFG: OUTPUT CONFIGURATION REGISTER
This register can be used to set the range and resolution of the accelerometer measurements.
Addr
Name
Description
Bit 7
0x20
OUTCFG
Output
Configuration
Register
0*
Bit 6
Bit 5
Bit 4
RANGE[2] RANGE[1] RANGE[0]
Bit 3
Bit 2
Bit 1
Bit 0
POR
Value
R/
W
Resv
RES[2]
RES[1]
RES[0]
0x00
W
NOTE*: Software must always write a zero ‘0’ to Bit 7.
RES[2:0]
RANGE[2:0]
Accelerometer g Resolution
000: Select 6-bits for accelerometer measurements (Default)
001: Select 7-bit for accelerometer measurements
010: Select 8-bit for accelerometer measurements
011: Select 10-bit for accelerometer measurements
100: Select 12-bit for accelerometer measurements
101: Select 14-bit for accelerometer measurements
110: Reserved
111: Reserved
Accelerometer g Range
000: Select +/- 2g range (Default)
001: Select +/- 4g range
010: Select +/- 8g range
011: Select +/- 16g range
100: Select +/- 12g range
101: Reserved
111: Reserved
Table 20. OUTCFG Resolution and Range Select Register Settings
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.11 X-AXIS OFFSET REGISTERS
This register contains a signed 2’s complement 15-bit value applied as an offset adjustment to
the output of the sensor values, prior to being sent to the OUT_EX registers. The Power-OnReset value for each chip is unique and is set as part of factory calibration. If necessary, this
value can be overwritten by software.
NOTE: When modifying these registers with new gain or offset values, software should
perform a read-modify-write type of access to ensure that unrelated bits do not get
changed inadvertently.
R/
W
Name
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
0x21
XOFFL
X-Offset
LSB Register
XOFF[7]
XOFF[6]
XOFF[5]
XOFF[4]
XOFF[3]
XOFF[2]
XOFF[1]
XOFF[0] Per chip W
0x22 XOFFH
X-Offset
MSB Register
XGAIN[8] XOFF[14] XOFF[13] XOFF[12] XOFF[11] XOFF[10] XOFF[9]
XOFF[8] Per chip W
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Bit 0
POR
Value
Addr
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.12 Y-AXIS OFFSET REGISTERS
This register contains a signed 2’s complement 15-bit value applied as an offset adjustment to
the output of the sensor values, prior to being sent to the OUT_EX registers. The Power-OnReset value for each chip is unique and is set as part of factory calibration. If necessary, this
value can be overwritten by software.
NOTE: When modifying these registers with new gain or offset values, software should
perform a read-modify-write type of access to ensure that unrelated bits do not get
changed inadvertently.
R/
W
Name
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
0x23
YOFFL
Y-Offset
LSB Register
YOFF[7]
YOFF[6]
YOFF[5]
YOFF[4]
YOFF[3]
YOFF[2]
YOFF[1]
YOFF[0] Per chip W
0x24 YOFFH
Y-Offset
MSB Register
YGAIN[8] YOFF[14] YOFF[13] YOFF[12] YOFF[11] YOFF[10] YOFF[9]
YOFF[8] Per chip W
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Bit 0
POR
Value
Addr
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.13 Z-AXIS OFFSET REGISTERS
This register contains a signed 2’s complement 15-bit value applied as an offset adjustment to
the output of the sensor values, prior to being sent to the OUT_EX registers. The Power-OnReset value for each chip is unique and is set as part of factory calibration. If necessary, this
value can be overwritten by software.
NOTE: When modifying these registers with new gain or offset values, software should
perform a read-modify-write type of access to ensure that unrelated bits do not get
changed inadvertently.
R/
W
Name
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
0x25
ZOFFL
Z-Offset
LSB Register
ZOFF[7]
ZOFF[6]
ZOFF[5]
ZOFF[4]
ZOFF[3]
ZOFF[2]
ZOFF[1]
ZOFF[0] Per chip W
0x26 ZOFFH
Z-Offset
MSB Register
ZGAIN[8] ZOFF[14] ZOFF[13] ZOFF[12] ZOFF[11] ZOFF[10] ZOFF[9]
ZOFF[8] Per chip W
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Bit 0
POR
Value
Addr
39 / 46
MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.14 X-AXIS GAIN REGISTERS
The gain value is an unsigned 9-bit number.
NOTE: When modifying these registers with new gain or offset values, software should
perform a read-modify-write type of access to ensure that unrelated bits do not get
changed inadvertently.
Addr
Name
Description
0x22 XOFFH
X-Offset
MSB Register
0x27 XGAIN
X Gain Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
XGAIN[8] XOFF[14] XOFF[13] XOFF[12] XOFF[11] XOFF[10] XOFF[9]
Bit 0
POR
Value
R/
W
XOFF[8] Per chip W
XGAIN[7] XGAIN[6] XGAIN[5] XGAIN[4] XGAIN[3] XGAIN[2] XGAIN[1] XGAIN[0] Per chip W
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.15 Y-AXIS GAIN REGISTERS
The gain value is an unsigned 9-bit number.
NOTE: When modifying these registers with new gain or offset values, software should
perform a read-modify-write type of access to ensure that unrelated bits do not get
changed inadvertently.
Addr
Name
Description
0x24 YOFFH
Y-Offset
MSB Register
0x28 YGAIN
Y Gain Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
YGAIN[8] YOFF[14] YOFF[13] YOFF[12] YOFF[11] YOFF[10] YOFF[9]
Bit 0
YOFF[8]
POR
Value
R/
W
Per chip W
YGAIN[7] YGAIN[6] YGAIN[5] YGAIN[4] YGAIN[3] YGAIN[2] YGAIN[1] YGAIN[0] Per chip W
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.16 Z-AXIS GAIN REGISTERS
The gain value is an unsigned 9-bit number.
NOTE: When modifying these registers with new gain or offset values, software should
perform a read-modify-write type of access to ensure that unrelated bits do not get
changed inadvertently.
Addr
Name
0x26 ZOFFH
0x29
ZGAIN
Description
Z-Offset
MSB Register
Z Gain Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
ZGAIN[8] ZOFF[14] ZOFF[13] ZOFF[12] ZOFF[11] ZOFF[10] ZOFF[9]
Bit 0
ZOFF[8]
POR
Value
R/
W
Per chip W
ZGAIN[7] ZGAIN[6] ZGAIN[5] ZGAIN[4] ZGAIN[3] ZGAIN[2] ZGAIN[1] ZGAIN[0] Per chip W
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MC3256 3-Axis Accelerometer
Preliminary Datasheet
11.17 PCODE: PRODUCT CODE
This register returns a value specific to the part number of this mCube device, noted below.
Addr
Name
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x3B
PCODE
Product Code
Register
0
0
0
1
*
*
*
0
POR
Value
R/
W
Per chip R
Note: Bits denoted with ‘*’ might be any value, set by the factory. Software should ignore these
bits.
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MC3256 3-Axis Accelerometer
12
Preliminary Datasheet
INDEX OF TABLES
Table 1. Order Information.........................................................................................................................................4
Table 2. Pin Description ..............................................................................................................................................8
Table 3. Absolute Maximum Ratings ....................................................................................................................... 12
Table 4. Sensor Characteristics................................................................................................................................ 13
Table 5. Electrical Characteristics ............................................................................................................................ 14
Table 6. I2C Electrical and Timing Characteristics ................................................................................................... 15
Table 7. I2C Timing Characteristics.......................................................................................................................... 16
Table 8. Operational States ..................................................................................................................................... 18
Table 9. Forcing Operational States ........................................................................................................................ 19
Table 10. I2C Address Selection .............................................................................................................................. 22
Table 11. Register Summary .................................................................................................................................... 27
Table 12. SR Status Register .................................................................................................................................... 28
Table 13. OPSTAT Device Status Register ................................................................................................................ 29
Table 14. INTEN Interrupt Enable Register Settings ................................................................................................ 30
Table 15. MODE Register Functionality ................................................................................................................... 31
Table 16. SRTFR Register Functionality ................................................................................................................... 32
Table 17. TAPEN Register Settings........................................................................................................................... 33
Table 18. TTTRX, TTTRY and TTTRZ Register Settings .............................................................................................. 34
Table 19. Extended Accelerometer Registers.......................................................................................................... 35
Table 20. OUTCFG Resolution and Range Select Register Settings ......................................................................... 36
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MC3256 3-Axis Accelerometer
13
Preliminary Datasheet
REVISION HISTORY
Date
2014-04
2014-04
2014-04
Revision
APS-048-0027v1.0
APS-048-0027v1.1
APS-048-0027v1.2
2014-05
2014-07
2014-09
APS-048-0027v1.3
APS-048-0027v1.4
APS-048-0027v1.5
2015-08
APS-048-0027v1.6
mCube Proprietary.
© 2015 mCube Inc. All rights reserved.
Description
First release.
Corrected resolution and range, added tap.
Cleaned up white space. Corrected first page descriptions. Corrected bits of
registers 0x0B and 0x0C.
Changed ODRs
Updated current and noise. Corrected I2C address.
Clarified settings and notes on unused bits. Clarified order number and
package. Cleaned up whitespace. Clarified text on interrupt operations.
Added Watchdog Timer. Cleaned up bit definitions in Register summary.
Clarified name of pin VDD/VDDIO.
Added Tape and Reel
APS-048-0027v1.6
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MC3256 3-Axis Accelerometer
14
Preliminary Datasheet
LEGAL
1. M-CUBE reserves the right to make corrections, modifications, enhancements, improvements and other changes to its
products and to this document at any time and discontinue any product without notice. The information contained in this
document has been carefully checked and is believed to be accurate. However, M-CUBE shall assume no responsibilities for
inaccuracies and make no commitment to update or to keep current the information contained in this document.
2. M-CUBE products are designed only for commercial and normal industrial applications and are not suitable for other
purposes, such as: medical life support equipment; nuclear facilities; critical care equipment; military / aerospace;
automotive; security or any other applications, the failure of which could lead to death, personal injury or environmental or
property damage. Use of the products in unsuitable applications are at the customer’s own risk and expense.
3. M-CUBE shall assume no liability for incidental, consequential or special damages or injury that may result from
misapplication or improper use of operation of the product.
4. No license, express or implied, by estoppel or otherwise, to any intellectual property rights of M-CUBE or any third
party is granted under this document.
5. M-CUBE makes no warranty or representation of non-infringement of intellectual property rights of any third party with
respect to the products. M-CUBE specifically excludes any liability to the customers or any third party regarding
infringement of any intellectual property rights, including the patent, copyright, trademark or trade secret rights of any third
party, relating to any combination, machine, or process in which the M-CUBE products are used.
6. Examples of use described herein are provided solely to guide use of M-CUBE products and merely indicate targeted
characteristics, performance and applications of products. M-CUBE shall assume no responsibility for any intellectual
property claims or other problems that may result from applications based on the examples described herein
7. Information described in this document including parameters, application circuits and its constants and calculation
formulas, programs and control procedures are provided for the purpose of explaining typical operation and usage. “Typical”
parameters that may be provided in M-CUBE data sheets and/or specifications can and do vary in different applications and
actual performance may vary over time. All operating parameters including “Typicals,” must be validated for each customer
application by customer’s technical experts. In no event shall the information described be regarded as a guarantee of
conditions or characteristics of the products. Therefore, the customer should evaluate the design sufficiently as whole system
under the consideration of various external or environmental conditions and determine their application at the customer’s
own risk. M-CUBE shall assume no responsibility or liability for claims, damages, costs and expenses caused by the
customer or any third party, owing to the use of the above information.
is a trademark of M-CUBE, Inc.
M-CUBE and the M-CUBE logo are trademarks of M-CUBE, Inc.,
All other product or service names are the property of their respective owners.
© M-CUBE, Inc. 2015. All rights reserved.
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