Rohm BR9016ARFV 8k, 16k bit eeproms for direct connection to serial port Datasheet

Memory ICs
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
8k, 16k bit EEPROMs for direct
connection to serial ports
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
The BR9080A and BR9016A series are serial EEPROMs that can be connected directly to a serial port and can be
erased and written electrically. Writing and reading is performed in word units, using four types of operation commands.
Communication occurs though CS, SK, DI, and DO pins, WC pin control is used to initiate a write disabled state, enabling
these EEPROMs to be used as one-time ROMs. During writing, operation is checked via the internal status check.
!Applications
Movie, camera, cordless telephones, car stereos, VCRs, TVs, DIP switches, and other battery-powered equipment
requiring low voltage and low current
!Features
1) BR9080AF-W / ARFV-W / ARFVM-W (8k bit) : 512 words ×16 bits
BR9016AF-W / ARFV-W / ARFVM-W (16k bit) : 1024 words × 16bits
2) Single power supply operation
3) Serial data input and output
4) Automatic erase-before-write
5) Low current consumption
Active (5V) : 5mA (max.)
Standby (5V) : 3µA (max.)
6) Noise filter built into SK pin
7) Write protection when VCC is low
Inhibition on inadvertant write with the WC pin.
8) SOP8 / SSOP-B8 / MSOP8
9) High reliability CMOS process
10) 100,000 ERASE / WRITE cycles
11) 10 years Data Retention
1/12
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
Memory ICs
!Block diagram
R/B
INSTRUCTION DECODE
CS
CONTROL
DETECT
SUPPLY
VOLTAGE
CLOCK GENERATION
WRITE
DISABLE
SK
INSTRACTION
REGISTER
DI
∗
ADD
BUFFER
DATA
REGISTER
DO
ADD
DECORDER
9bit
R/W
AMPS
16bit
HIGH
VOLTAGE
GENERATOR
WC
∗
∗
9bit
8,192 bit
EEPROM
16bit
∗ BR9016A is 10bit, 16,384bit
BR9080A is 9bit, 8,192bit
!Pin descriptions
VCC
R/B
WC
GND
WC
CS
SK
DI
DO
R/B
BR9080ARFVM
: MSOP8
BR9016ARFVM
GND
DO
VCC
CS
DI
VCC
SK
CS
BR9080AF
: SOP8
BR9016AF
R / B WC GND
SK
DI
DO
BR9080ARFV
: SSOP-B8
BR9016ARFV
Fig.1
Pin No.
Pin name
Function
MSOP / SSOP
SOP
1
3
CS
Chip Select Control
2
4
SK
Serial Data Clock Input
3
5
DI
Op code, address, Serial Data Input
4
6
DO
Serial Data Output
5
7
GND
Ground 0V
6
8
WC
Write Control Input
7
1
R/B
READY / BUSY Output
8
2
VCC
Power supply
2/12
Memory ICs
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
!Absolute maximum ratings (Ta=25°C)
Parameter
Symbol
Limits
−0.3∼+7.0
VCC
Supply voltage
Power dissipation
Pd
SOP8
450∗1
SSOP-B8
300∗2
MSOP8
310∗3
V
mW
−65∼+125
°C
Topr
−40∼+85
°C
−
−0.3∼VCC+0.3
V
Storage temperature
Tstg
Operation temperature
Input voltage
Unit
∗1 Reduced by 4.5mW for each increase in Ta of 1°C over 25°C.
∗2 Reduced by 3.0mW for each increase in Ta of 1°C over 25°C.
∗3 Reduced by 3.1mW for each increase in Ta of 1°C over 25°C.
!Recommended operating conditions (Ta=25°C)
Parameter
Power supply voltage
Symbol
WRITE
VCC
READ
Input voltage
VIN
Min.
Typ.
Max.
Unit
2.7
−
5.5
V
2.7
−
5.5
V
0
−
VCC
V
3/12
Memory ICs
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
!Electrical characteristics
BR9080AF-W / ARFV-W / ARFVM-W, BR9016AF-W / ARFV-W / ARFVM-W : 5V
(Unless otherwise noted, Ta=−40∼85°C, VCC=2.7V∼5.5V)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Input low level voltage 1
VIL1
−
−
0.3×VCC
V
DI pin
Input high level voltage 1
VIH1
0.7×VCC
−
−
V
DI pin
Input low level voltage 2
VIL2
−
−
0.2×VCC
V
CS, SK, WC pin
Input high level voltage 2
VIH2
0.8×VCC
−
−
V
CS, SK, WC pin
IOL=2.1mA
IOH=−0.4mA
Output low level voltage
VOL
0
−
0.4
V
Output high level voltage
VOH
VCC−0.4
−
VCC
V
Input leak current
ILI
−1
−
1
µA
VIN=0V∼VCC
Output leak current
ILO
−1
−
1
µA
VOUT=0V∼VCC, CS=VCC
ICC1
−
−
5
mA
fSK=2MHz tE / W=10ms (WRITE)
Operating current
ICC2
−
−
3
mA
fSK=2MHz (READ)
Standby current
ISB
−
−
3
µA
CS / SK / DI / WC=VCC DO, R / B=OPEN
SK frequency
fSK
−
−
2
MHz
−
BR9080AF-W / ARFV-W / ARFVM-W, BR9016AF-W / ARFV-W / ARFVM-W : 3V
(Unless otherwise noted, Ta=−40∼85°C, VCC=2.7V∼3.3V)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Input low level voltage 1
VIL1
−
−
0.3×VCC
V
DI pin
Input high level voltage 1
VIH1
0.7×VCC
−
−
V
DI pin
Input low level voltage 2
VIL2
−
−
0.2×VCC
V
CS, SK, WC pin
Input high level voltage 2
VIH2
0.8×VCC
−
−
V
CS, SK, WC pin
Output low level voltage
VOL
0
−
0.4
V
IOL=100µA
Output high level voltage
VOH
VCC−0.4
−
VCC
V
IOH=−100µA
Input leak current
ILI
−1
−
1
µA
VIN=0V∼VCC
Output leak current
ILO
−1
−
1
µA
VOUT=0V∼VCC, CS=VCC
ICC1
−
−
3
mA
fSK=2MHz tE / W=10ms (WRITE)
ICC2
−
−
0.75
mA
fSK=2MHz (READ)
Standby current
ISB
−
−
2
µA
CS / SK / DI / WC=VCC DO, R / B=OPEN
SK frequency
fSK
−
−
2
MHz
Operating current
Conditions
−
Not designed for radiation resistance
4/12
Memory ICs
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
!Operating timing characteristics
BR9080AF-W / ARFV-W / ARFVM-W, BR9016AF-W / ARFV-W / ARFVM-W
(Unless otherwise noted, Ta=−40∼85°C, VCC=2.7V∼5.5V)
Parameter
Symbol
Min.
Typ.
Max.
Unit
CS setup time
fCSS
100
−
−
ns
CS hold time
tCSH
100
−
−
ns
Data setup time
tDIS
100
−
−
ns
Data hold time
tDIH
100
−
−
ns
DO rise delay time
ns
tPD1
−
−
150
DO fall delay time
tPD0
−
−
150
ns
Self-timing programming cycle
tE / W
−
−
10
ms
CS minimum high level time
tCS
250
−
−
ns
READY / BUSY display valid time
tSV
−
−
150
ns
Time when DO goes HIGH-Z (via CS)
tOH
0
−
150
ns
Data clock high level time
tWH
230
−
−
ns
Data clock low level time
tWL
230
−
−
ns
Write control setup time
tWCS
0
−
−
ns
Write control hold time
tWCH
0
−
−
ns
!Timing chart
Synchronous Data Input Output Timing
CS
tCS
tWH
tCSS
tCSH
tDIH
SK
tWL
tDIS
DI
tPD
tPD
tOH
DO
WC
Fig.2
· Input data are clocked in to DI at the rising edge of the clock (SK).
· Output data will toggle on the falling edge of the SK clock.
· The WC pin does not have any effect on the READ, EWEN and EWDS operations.
5/12
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
Memory ICs
!Circuit operation
(1) Command mode
BR9080A
Start Bit
Op Code
Address
Read (READ)
Instruction
1010
100 A0
A1 A2 A3 A4 A5 A6 A7 A8
Write (WRITE)
1010
010 A0
A1 A2 A3 A4 A5 A6 A7 A8
Write enable (WEN)
1010
0011
Write disable (WDS)
1010
0000
∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗
∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗
Data
D0 D1 − D14 D15
∗ : Means either VIH or VIL
Address and data are transferred from LSB.
BR9016A
Start Bit
Op Code
Address
Read (READ)
Instruction
1010
10 A0 A1
A2 A3 A4 A5 A6 A7 A8 A9
Write (WRITE)
1010
01 A0 A1
A2 A3 A4 A5 A6 A7 A8 A9
∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗
∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗
Write enable (WEN)
1010
0011
Write disable (WDS)
1010
0000
Data
D0 D1 − D14 D15
∗ : Means either VIH or VIL
Address and data are transferred from LSB.
(2) Writing enabled / disabled
H
SK
1
4
12
8
16
L
ENABLE = 11
DISABLE = 00
H
CS
L
H
1
DI
0
1
0
0
0
L
HIGH-Z
DO
H
R/B
WC
High or LOW
Fig.3
1) When CS is “HIGH” during power up, BR9080AF-W / ARFV-W / ARFVM-W, BR9016AF-W / ARFV-W / ARFVM-W
comes up in the write disabled (WDS) state. In order to be programmable, it must receive a write enable (WEN)
instruction.
The device remains programmable until a disable (WDS) instruction is entered, or until it is powered down.
2) It is unnecessary to add the clock after 16th clock.
6/12
Memory ICs
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
(3) Read cycle
BR9080AF-W / ARFV-W / ARFVM-W
SK
H
4
1
8
16
32
48
L
tCS
H
CS
L
STANDBY
H
0
1
DI
1
0
1
0
0
A1
A0
A7
A8
L
HIGH-Z
HIGH-Z
D0
DO
D15
D0
D15
tOH
H
Read Data (n)
R/B
Read Data (n+1)
High or LOW
WC
Fig.4 BR9080AF-W / ARFV-W / ARFVM-W
BR9016 AF-W / ARFV-W / ARFVM-W
SK
H
4
1
8
16
32
48
L
tCS
H
CS
L
STANDBY
H
1
DI
0
1
0
1
0
A0
A1
A2
A8
A9
L
HIGH-Z
HIGH-Z
D0
DO
D15
D0
D15
tOH
H
Read Data (n)
R/B
WC
Read Data (n+1)
High or LOW
Fig.5 BR9016AF-W / ARFV-W / ARFVM-W
1) After the fall of the 16th clock pulse, 16-bit data is output from the DO pin in synchronization with the falling edge of the
SK signal.
(DO output changes at a time lag of tPD0, tPD1 because of internal circuit delay following the falling edge of the SK signal.
During the tPD0 and tPD1 timing, the tPD time should be assured before data is read, to avoid the previous data being lost.
See the synchronized data input / output timing chart in Fig.2.)
2) The data stored in the next address is clocked out of the device on the falling edge of 32nd clock. The data stored in
the upper address every 16 clocks is output sequentially by the continual SK input. Also the read operation is reset by
CS High.
7/12
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
Memory ICs
(4) Write cycle
BR9080AF-W / ARFV-W / ARFVM-W
SK
H
1
4
8
16
32
L
H
CS
L
tCS
H
0
1
DI
1
0
0
1
0
A0
A1
A7
A8
D0
D15
L
HIGH-Z
HIGH-Z
DO
tSV
tE-W
H
R/B
tWCS
WC
tWCH
Fig.6 BR9080AF-W / ARFV-W / ARFVM-W
BR9016 AF-W / ARFV-W / ARFVM-W
SK
H
1
4
8
16
32
L
H
CS
L
tCS
H
1
DI
0
1
0
0
1
A0
A1
A2
A8
A9
D0
D15
L
HIGH-Z
HIGH-Z
DO
tSV
tE-W
H
R/B
WC
tWCS
tWCH
Fig.7 BR9016AF-W / ARFV-W / ARFVM-W
1) At the rising edge of 32nd clock, R / B pin will be come out “LOW” after the specified time delay (tSV).
2) From above edge R / B will indicate the ready / busy status of the chip: “LOW” indicated programming is all in
progress: “HIGH” indicates the write cycle is complete and this part is ready for another instruction.
3) During the input of Write command, CS must be “LOW”. However, once the write operation started, CS could be either
“HIGH” or “LOW”.
4) If WC becomes “HIGH” during Write Cycle, the write operation is halted. In this case, the address data in writing is no
guaranteed. It is necessary to rewrite it.
8/12
Memory ICs
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
(5) READY / BUSY display
(R / B pin and DO pin: BR9080AF-W / ARFV-W / ARFVM-W, BR9016AF-W / ARFV-W / ARFVM-W)
1) This display outputs the internal status signal; the R / B pin outputs the HIGH or LOW status at all times. The display
can also be output from the DO pin. Following completion of the writing command, if CS falls while SK is LOW, either
HIGH or LOW is output. (The display can also be output without using the R / B pin, leaving it open.)
2) When writing data to a memory cell, the READY / BUSY display is output from the rise of the 32nd clock pulse of the
SK signal after tSV, from the R / B pin.
R / B display = LOW: writing in progress
(The internal timer circuit is activated, and after the tE / W timing has been created, the timer circuit stops automatically.
Writing of data to the memory cell is done during the tE / W timing, during which time other commands cannot be
received.)
R / B display = HIGH: command standby state
(Writing of data to the memory cell has been completed and the next command can be received.)
CS
SK
Clock
DI
Write command
tPD
tOH
HIGH-Z
READY
DO
HIGH-Z
BUSY
R/B
READY
BUSY
READY
Fig.8 R / B Status Output timing chart
1) DO will output R / B status after CS is held low during SK=L, until CS is held high.
Note : The document may be strategic technical data subject to COCOM regulations.
9/12
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
Memory ICs
!Operation notes
(1) Turning the power supply on and off
1) When the power supply is turned on and off, CS should be set to HIGH (=VCC).
2) When CS is LOW, the command input reception state (active) is entered. If the power supply is turned on in this state,
erroneous operations and erroneous writing can occur because of noise and other factors. To avoid this, make sure
CS is set to HIGH (=VCC) before turning on the power supply.
(Good example) Here, the CS pin is pulled up to VCC.
When turning off the power supply, wait at least 10msec before turning it on again. Failing to
observe this condition can result in the internal circuit failing to be reset when the power supply is
turned on.
(Bad example) CS is LOW when the power supply is turned on or off.
In this case, because CS remains LOW, the EEPROM may perform erroneous operations or
write erroneous data because of noise or other factors.
* Please be aware that the case shown in this example can also occur if CS input is HIGH-Z.
VCC
VCC
GND
VCC
CS
GND
Good example
Bad example
Fig.9
(2) Noise countermeasures
1) SK noise
If noise occurs at the rise of the SK clock input, the clock is assumed to be excessive, and this can cause malfunction
because the bits are out of alignment.
2) WC noise
During a writing operation, noise at the WC pin can be erroneously judged to be data, and this can cause writing to be
forcibly interrupted.
3) VCC noise
Noise and surges on the power supply line can cause malfunction. We recommend installing a bypass capacitor
between the power supply and ground to eliminate this problem.
10/12
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
Memory ICs
(3) Canceling modes
1) Read commands
32 Clock
SK
CS
DI
Start bit
Operating code
Address
4 bits
4 bits
8 bits
16 bits
DO
DO
Data
D15
Cancel can be performed for the entire read mode space
WC
HIGH or LOW
Fig.10
Cancellation method: CS HIGH
2) Write commands
32 Clock
SK
CS
DI
Start bit
Operating code
Address
4 bits
4 bits
8 bits
DO
Data
D15
16 bits
tE / W
R/B
a
b
c
d
WC
Fig.11
Canceling methods
a : Canceled by setting CS HIGH. The WC pin is not involved.
b : If the WC pin goes HIGH for even a second, writing is forcibly interrupted. Cancellation occurs even if the CS pin is
HIGH. At this point, data has not been written to the memory, so the data in the designated address has not yet
been changed.
c : The operation is forcibly canceled by setting the WC pin to HIGH or turning off the power supply (although we do
not recommend using this method). The data in the designated address is not guaranteed and should be written
once again.
d : If CS is set to HIGH while the R / B signal is HIGH (following the tE / W timing), the IC is reset internally, and waits
for the next command to be input.
11/12
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
Memory ICs
!External dimension (Units : mm)
BR9080ARFVM-W
BR9016ARFVM-W
BR9080AF
BR9016AF
5.0 ± 0.2
0.9Max.
0.75±0.05
0.08±0.05
5
1
4
0.15 ± 0.1
4.4 ± 0.2
8
+0.05
0.145−0.03
0.22+0.05
−0.04
0.65
6.2 ± 0.3
4
0.08 M
0.11
1
0.475
1.5 ± 0.1
5
0.29±0.15
0.6±0.2
8
2.8±0.1
4.0±0.2
2.9±0.1
1.27 0.4 ± 0.1
0.3Min.
0.08 S
0.15
MSOP8
SOP8
BR9080ARFV
BR9016ARFV
8
5
1
4
0.22 ± 0.1
(0.52)
0.15 ± 0.1
0.1
1.15 ± 0.1
4.4 ± 0.2
6.4 ± 0.3
3.0 ± 0.2
0.3Min.
0.65
0.1
SSOP-B8
12/12
Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any
means without prior permission of ROHM CO.,LTD.
The contents described herein are subject to change without notice. The specifications for the
product described in this document are for reference only. Upon actual use, therefore, please request
that specifications to be separately delivered.
Application circuit diagrams and circuit constants contained herein are shown as examples of standard
use and operation. Please pay careful attention to the peripheral conditions when designing circuits
and deciding upon circuit constants in the set.
Any data, including, but not limited to application circuit diagrams information, described herein
are intended only as illustrations of such devices and not as the specifications for such devices. ROHM
CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any
third party's intellectual property rights or other proprietary rights, and further, assumes no liability of
whatsoever nature in the event of any such infringement, or arising from or connected with or related
to the use of such devices.
Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or
otherwise dispose of the same, no express or implied right or license to practice or commercially
exploit any intellectual property rights or other proprietary rights owned or controlled by
ROHM CO., LTD. is granted to any such buyer.
Products listed in this document use silicon as a basic material.
Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices
(such as audio visual equipment, office-automation equipment, communications devices, electrical
appliances and electronic toys).
Should you intend to use these products with equipment or devices which require an extremely high level of
reliability and the malfunction of with would directly endanger human life (such as medical instruments,
transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other
safety devices), please be sure to consult with our sales representative in advance.
About Export Control Order in Japan
Products described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade Control
Order in Japan.
In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause)
on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction.
Appendix1-Rev1.0
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