BCM8112 PRODUCT Brief 1 6 - B I T LV D S A N D 6 4 - B I T LV P E C L I N T E R FA C E B C M 8 1 1 2 F E AT U R E S 64:16 MUX with single-ended LVPECL • 155.52/166.65-Mbps data inputs and LVDS S U M M A R Y O F Compliant with industry standards such as: Optical • Internetworking Forum (OIF), Telcordia, and ITU-T 622.08/644.45-Mbps differential data outputs 16:64 DEMUX with LVDS 622.08/644.45 Mbps • differential data inputs and 155.52/166.65 Mbps series terminated logic (STL) single-ended data outputs • On-chip 64 x 9 FIFO to eliminate system timing issues • Core power supply: 1.8V I/O power supplies: 1.8V LVDS, 3.3V STL, and 3.3V • CMOS • Power consumption: 1700 mW typical • Standard CMOS fabrication process • 452-pin BGA package standards. High level of integration allows for higher port density • solutions. CMOS-based device uses the most effective silicon • economy of scale. Low power consumption eliminates the need for • external cooling sources. • Target applications: • OC-192/STM-64 transmission equipment • SONET/SDH optical modules • ADD/DROP multiplexers • Digital cross-connects • ATM switch backbone • SONET test equipment • Terabit routers • Edge routers OTX 622.08/666.51 Mbps BCM8110 155.52/ 166.63 Mbps OC-192 ASIC 9.953/10.664 Gbps BCM8111 BCM8112 Application Block Diagram ORX B E N E F I T S