ON NCV8537ML500R2G High accuracy low dropout linear regulator Datasheet

NCV8537
500 mA High Accuracy Low
Dropout Linear Regulator,
with Power Good Function
The NCV8537 is a high performance low dropout linear voltage
regulator. Based on the popular NCV8535, the device retains all the
best features of its predecessor which includes high accuracy,
excellent stability, low noise performance and reverse bias protection
but now includes a Power Good output signal to enable monitoring of
the supply system. The device is available with fixed or adjustable
outputs and is packaged in a 10 pin 3x3 mm DFN package.
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DFN10
MN SUFFIX
CASE 485C
Features
• High Accuracy Output Over Line and Load Variances (±0.9% at
•
•
•
•
•
•
•
•
•
•
•
•
•
25°C)
Operating Temperature Range: −40°C to 125°C
Power Good Output to Indicate the Regulator is Within Specified
Limits
Stable Output with Low Value Capacitors of any type and with no
Minimum Load Current Requirement
Incorporates Current Limiting and Reverse Bias Protection
Thermal Shutdown Protection
Low Dropout Voltage at Full Load (340 mV typ at Vo = 3.3 V)
Low Noise (33 mVrms w/ 10 nF Cnr and 52 mVrms w/out Cnr)
Low Shutdown Current (< 1 mA)
Reverse Bias Protected
2.9 V to 12 V Supply Range
Available in 1.8 V, 2.5 V, 3.3 V, 5.0 V and Adjustable Output
Voltages
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These are Pb−Free Devices
Applications
•
•
•
•
PIN CONFIGURATION
Pin 1, 2. Vout
3. Sense / ADJ
4. GND
5. PWRG
6. NC
7. NR
8. SD
9, 10. Vin
EP, GND
MARKING DIAGRAM
1
xxx
A
L
Y
W
G
V8537
xxx
ALYWG
G
= Specific Device Marking
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
Networking Systems, DSL/Cable Modems
Audio Systems for Automotive Applications
Navigation Systems
Satellite Receivers
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 15 of this data sheet.
This document contains information on some products that are still under development.
ON Semiconductor reserves the right to change or discontinue these products without
notice.
© Semiconductor Components Industries, LLC, 2017
October, 2017 − Rev. 4
1
Publication Order Number:
NCV8537/D
NCV8537
ON
7
6
OFF
9
NR
NC
8
SD
SENSE
IN
OUT
IN
OUT
Vout
1
+
Cin
1.0 mF
3
2
10
Vin
Cnr
(Optional)
R1 PWRG EP
100k 5
EP
Cout
1.0 mF
GND
+
4
PWRG
Figure 1. Typical Fixed Version Application Schematic
ON
7
6
OFF
9
NR
NC
8
SD
ADJ
IN
OUT
IN
OUT
+
Cin
1.0 mF
R2
3
2
R3
1
10
Vin
Cnr
(Optional)
R1 PWRG EP
100k 5
EP
GND
Vout
Cout
1.0 mF
+
4
PWRG
Figure 2. Typical Adjustable Version Application Schematic
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2
NCV8537
Comp.
PWRG
Vin
SD
Enable
Block
Voltage
Reference
Current and
Thermal
Protection
Circuit
NR
Error
Amplifier
Series Pass
Element with
Reverse Bias
Protection
Vout
ADJ
NCV8537 Adjustable
GND
Figure 3. Block Diagram, Adjustable Output Version
Comp.
PWRG
Vin
SD
Enable
Block
Voltage
Reference
Current and
Thermal
Protection
Circuit
NR
Error
Amplifier
Series Pass
Element with
Reverse Bias
Protection
Vout
SENSE
NCV8537 Fix
GND
Figure 4. Block Diagram, Fixed Output Version
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3
NCV8537
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
1, 2
Vout
Description
3
SENSE/ADJ
4
GND
5
PWRG
6
NC
Not Connected
7
NR
Noise Reduction Pin. This is an optional pin used to further reduce noise.
8
SD
Shutdown pin. When not in use, this pin should be connected to the input pin.
9, 10
Vin
Power Supply Input Voltage
EPAD
EPAD
Regulated output voltage. Bypass to ground with Cout w 1.0 mF
For output voltage sensing, connect to Pins 1 and 2.at Fixed output Voltage version
Adjustable pin at Adjustable output version
Power Supply Ground
Power Good
Exposed thermal pad should be connected to ground.
MAXIMUM RATINGS
Symbol
Value
Unit
Input Voltage
Rating
Vin
−0.3 to +16
V
Output Voltage
Vout
−0.3 to Vin +0.3 or 10 V*
V
VPWRG
−0.3 to +16
V
Shutdown Pin Voltage
Vsh
−0.3 to +16
V
Junction Temperature Range
TJ
−40 to +150
°C
Storage Temperature Range
Tstg
−50 to +150
°C
PWRG Pin Voltage
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
NOTE: This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) tested per AEC−Q100−002 (EIA/JESD22−A114)
Machine Model (MM) tested per AEC−Q100−003 (EIA/JESD22−A115)
Charged Device Model (CDM) tested per EIA/JESD22−C101.
*Which ever is less. Reverse bias protection feature valid only if (Vout − Vin) ≤ 7 V.
THERMAL CHARACTERISTICS
Test Conditions (Typical Value)
Min Pad Board (Note 1)
1, Pad Board (Note 1)
Unit
Junction−to−Air, qJA
215
66
°C/W
Junction−to−Pin, J−L4
58
18
°C/W
Characteristic
1. As mounted on a 35 x 35 x 1.5 mm FR4 Substrate, with a single layer of a specified copper area of 2 oz (0.07 mm thick) copper traces and
heat spreading area. JEDEC 51 specifications for a low and high conductivity test board recommend a 2 oz copper thickness. Test conditions
are under natural convection or zero air flow.
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4
NCV8537
ELECTRICAL CHARACTERISTICS − 1.8 V
(Vout = 1.8 V typical, Vin = 2.9 V, TA = −40°C to +125°C, unless otherwise noted, Note 2)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (Accuracy)
Vin = 2.9 V to 5.8 V, Iload = 0.1 mA to 500 mA, TA = 25°C
Vout
−0.9%
1.783
1.8
+0.9%
1.817
V
Output Voltage (Accuracy)
Vin = 2.9 V to 5.8 V, Iload = 0.1 mA to 500 mA, TA = 0°C to +85°C
Vout
−1.4%
1.774
1.8
+1.4%
1.826
V
Output Voltage (Accuracy)
Vin = 2.9 V to 5.8 V, Iload = 0.1 mA to 500 mA, TA = −40°C to +125°C
Vout
−1.5%
1.773
1.8
+1.5%
1.827
V
Minimum Input Voltage
Vinmin
2.9
V
Line Regulation
Vin = 2.9 V to 12 V, Iload = 0.1 mA
LineReg
0.04
mV/V
Load Regulation
Vin = 2.9 V, Iload = 0.1 mA to 500 mA
LoadReg
0.04
mV/mA
Dropout Voltage (See Figure 9)
Iload = 500 mA (Notes 3, 4)
Iload = 300 mA (Notes 3, 4)
Iload = 50 mA (Notes 3, 4)
VDO
mV
620
230
95
Peak Output Current (See Figures 14 and 17)
Ipk
Short Output Current (See Figure 14) Vin < 7 V, TA = 25°C
Isc
Thermal Shutdown / Hysteresis
TJ
Ground Current
In Regulation
Iload = 500 mA (Note 3)
Iload = 300 mA (Note 3)
Iload = 50 mA
Iload = 0.1 mA
500
700
830
mA
900
mA
°C
160/10
IGND
9.0
4.6
0.8
−
In Dropout
Vin = 2.2 V, Iload = 0.1 mA
In Shutdown
VSD = 0 V
IGNDsh
Output Noise
Cnr = 0 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF
Cnr = 10 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF
14
7.5
2.5
220
mA
500
mA
1.0
mA
Vnoise
mA
mVrms
mVrms
52
33
Power Good Voltage
Low Threshold
Hysteresis
High Threshold
Velft
Power Good Pin Voltage Saturation (Ief − 1.0 mA)
Vefdo
200
mV
Power Good Pin Leakage
Iefleak
1.0
mA
tef
50
ms
93
Power Good Blanking Time (Note 7)
Shutdown
Threshold Voltage ON
Threshold Voltage OFF
VSD
SD Input Current, VSD = 0 V to 0.4 V or VSD = 2.0 V to Vin
ISD
Output Current In Shutdown Mode, Vout = 0 V
Reverse Bias Protection, Current Flowing from the Output Pin to GND
(Vin = 0 V, Vout_forced = 1.8 V)
95
2
97
% of
Vout
99
2.0
0.4
V
V
0.07
1.0
mA
IOSD
0.07
1.0
mA
IOUTR
10
mA
2. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
3. TA must be greater than 0°C.
4. Maximum dropout voltage is limited by minimum input voltage Vin = 2.9 V recommended for guaranteed operation.
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NCV8537
ELECTRICAL CHARACTERISTICS − 2.5 V
(Vout = 2.5 V typical, Vin = 2.9 V, TA = −40°C to +125°C, unless otherwise noted, Note 5)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (Accuracy)
Vin = 2.9 V to 6.5 V, Iload = 0.1 mA to 500 mA, TA = 25°C
Vout
−0.9%
2.477
2.5
+0.9%
2.523
V
Output Voltage (Accuracy)
Vin = 2.9 V to 6.5 V, Iload = 0.1 mA to 500 mA, TA = 0°C to +85°C
Vout
−1.4%
2.465
2.5
+1.4%
2.535
V
Output Voltage (Accuracy)
Vin = 2.9 V to 6.5 V, Iload = 0.1 mA to 500 mA, TA = −40°C to +125°C
Vout
−1.5%
2.462
2.5
+1.5%
2.538
V
Minimum Input Voltage
Vinmin
2.9
V
Line Regulation
Vin = 2.9 V to 12 V, Iload = 0.1 mA
LineReg
0.04
mV/V
Load Regulation
Vin = 2.9 V, Iload = 0.1 mA to 500 mA
LoadReg
0.04
mV/mA
Dropout Voltage (See Figure 10)
Iload = 500 mA (Note 6)
Iload = 300 mA (Note 6)
Iload = 50 mA
Iload = 0.1mA
VDO
mV
340
230
110
10
Peak Output Current (See Figures 14 and 18)
Ipk
Short Output Current (See Figure 14) Vin < 7 V, TA = 25°C
Isc
Thermal Shutdown / Hysteresis
TJ
Ground Current
In Regulation
Iload = 500 mA (Note 6)
Iload = 300 mA (Note 6)
Iload = 50 mA
Iload = 0.1 mA
500
700
800
mA
900
mA
°C
160/10
IGND
9.0
4.6
0.8
−
In Dropout
Vin = 2.4 V, Iload = 0.1 mA
In Shutdown
VSD = 0 V
IGNDsh
Output Noise
Cnr = 0 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF
Cnr = 10 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF
14
7.5
2.5
220
mA
500
mA
1.0
mA
Vnoise
mVrms
mVrms
56
35
Power Good Voltage
Low Threshold
Hysteresis
High Threshold
Velft
93
95
2
97
mA
% of
Vout
99
Power Good Pin Voltage Saturation (Ief − 1.0 mA)
Vefdo
200
mV
Power Good Pin Leakage
Iefleak
1.0
mA
tef
50
ms
Power Good Blanking Time (Note 7)
Shutdown
Threshold Voltage ON
Threshold Voltage OFF
VSD
SD Input Current, VSD = 0 V to 0.4 V or VSD = 2.0 V to Vin
ISD
Output Current In Shutdown Mode, Vout = 0 V
Reverse Bias Protection, Current Flowing from the Output Pin to GND
(Vin = 0 V, Vout_forced = 2.5 V)
2.0
0.4
V
V
0.07
1.0
mA
IOSD
0.07
1.0
mA
IOUTR
10
mA
5. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
6. TA must be greater than 0°C.
7. Can be disabled per customer request.
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6
NCV8537
ELECTRICAL CHARACTERISTICS − 3.3 V
(Vout = 3.3 V typical, Vin = 3.7 V, TA = −40°C to +125°C, unless otherwise noted, Note 8)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (Accuracy) Vin
Vin = 3.7 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = 25°C
Vout
−0.90%
3.27
3.3
0.90%
3.33
V
Output Voltage (Accuracy)
Vin = 3.7 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = 0°C to +85°C
Vout
−1.40%
3.254
3.3
1.40%
3.346
V
Output Voltage (Accuracy)
Vin = 3.7 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = −40°C to +125°C
Vout
−1.50%
3.25
3.3
1.50%
3.35
V
Line Regulation
Vin = 3.7 V to 12 V, Iload = 0.1 mA
LineReg
0.04
mV/V
Load Regulation
Vin = 3.7 V, Iload = 0.1 mA to 500 mA
LoadReg
0.04
mV/mA
Dropout Voltage
Iload = 500 mA
Iload = 300 mA
Iload = 50 mA
Iload = 0.1 mA
VDO
mV
340
230
110
10
Peak Output Current (See Figure 14)
Ipk
Short Output Current (See Figure 14) Vin < 7 V, TA = 25°C
Isc
Thermal Shutdown / Hysteresis
TJ
Ground Current
In Regulation
Iload = 500 mA (Note 8)
Iload = 300 mA
Iload = 50 mA
Iload = 0.1 mA
In Dropout
Vin = 3.7 V, Iload = 0.1 mA
In Shutdown
VSD = 0 V
IGND
500
700
mA
900
mA
°C
160/10
9
4.6
0.8
−
IGNDsh
Output Noise
Cnr = 0 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF
Cnr = 10 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF
800
14
7.5
2.5
220
mA
500
mA
1
mA
mA
mVrms
Vnoise
69
46
Power Good Voltage
Low Threshold
Hysteresis
High Threshold
Velft
Power Good Pin Voltage Saturation (Ief = 1.0 mA)
Vefdo
Power Good Pin Leakage
93
Power Good Blanking Time (Note 9)
95
2
97
% of
Vout
99
200
mV
Iefleak
1
mA
tef
50
ms
Shutdown
Threshold Voltage ON
Threshold Voltage OFF
VSD
V
SD Input Current, VSD = 0 V to 0.4 V or VSD = 2.0 V to Vin
ISD
0.07
1
mA
Output Current In Shutdown Mode, Vout = 0 V
IOSD
0.07
1
mA
Reverse Bias Protection, Current Flowing from the Output Pin to GND
(Vin = 0 V, Vout_forced = 3.3 V)
IOUTR
10
2
0.4
mA
8. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
9. Can be disabled per customer request.
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NCV8537
ELECTRICAL CHARACTERISTICS − 5 V
(Vout = 5.0 V typical, Vin = 5.4 V, TA = −40°C to +125°C, unless otherwise noted, Note 10)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (Accuracy) Vin
Vin = 5.4 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = 25°C
Vout
−0.90%
4.955
5
0.90%
5.045
V
Output Voltage (Accuracy)
Vin = 5.4 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = 0°C to +85°C
Vout
−1.40%
4.93
5
1.40%
5.07
V
Output Voltage (Accuracy)
Vin = 5.4 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = −40°C to +125°C
Vout
−1.50%
4.925
5
1.50%
5.075
V
Line Regulation
Vin = 5.4 V to 12 V, Iload = 0.1 mA
LineReg
0.04
mV/V
Load Regulation
Vin = 5.4 V, Iload = 0.1 mA to 500 mA
LoadReg
0.04
mV/mA
Dropout Voltage
Iload = 500 mA
Iload = 300 mA
Iload = 50 mA
Iload = 0.1 mA
VDO
mV
340
230
110
10
Peak Output Current (See Figure 14)
Ipk
Short Output Current (See Figure 14) Vin < 7 V, TA = 25°C
Isc
Thermal Shutdown / Hysteresis
TJ
Ground Current
In Regulation
Iload = 500 mA (Note 10)
Iload = 300 mA
Iload = 50 mA
Iload = 0.1 mA
In Dropout
Vin = 3.2 V, Iload = 0.1 mA
In Shutdown
VSD = 0 V
IGND
500
700
mA
930
mA
°C
160/10
9
4.6
0.8
−
IGNDsh
Output Noise
Cnr = 0 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF
Cnr = 10 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF
830
14
7.5
2.5
220
mA
500
mA
1
mA
mA
mVrms
Vnoise
93
58
Power Good Voltage
Low Threshold
Hysteresis
High Threshold
Velft
Power Good Pin Voltage Saturation (Ief = 1.0 mA)
Vefdo
200
mV
Power Good Pin Leakage
Iefleak
1
mA
tef
50
ms
93
Power Good Blanking Time (Note 11)
95
2
97
% of
Vout
99
Shutdown
Threshold Voltage ON
Threshold Voltage OFF
VSD
V
SD Input Current, VSD = 0 V to 0.4 V or VSD = 2.0 V to Vin
ISD
0.07
1
mA
Output Current In Shutdown Mode, Vout = 0 V
IOSD
0.07
1
mA
Reverse Bias Protection, Current Flowing from the Output Pin to GND
(Vin = 0 V, Vout_forced = 5 V)
IOUTR
10
2
0.4
mA
10. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
11. Can be disabled per customer request.
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NCV8537
ELECTRICAL CHARACTERISTICS − ADJUSTABLE
(Vout = 1.25 V typical, Vin = 2.9 V, TA = −40°C to +125°C, unless otherwise noted, Note 12)
Characteristic
Symbol
Min
Typ
Max
Unit
Reference Voltage (Accuracy)
Vin = 2.9 V to Vout +4.0 V, Iload = 0.1 mA to 500 mA, TA = 25°C
Vref
−0.90%
1.239
1.25
0.90%
1.261
V
Reference Voltage (Accuracy)
Vin = 2.9 V to Vout + 4.0 V, Iload = 0.1 mA to 500 mA, TA = 0°C to +85°C
Vref
−1.40%
1.233
1.25
1.40%
1.268
V
Reference Voltage (Accuracy)
Vin = 2.9 V to Vout + 4.0 V, Iload = 0.1 mA to 500 mA, TA = −40°C to
+125°C
Vref
−1.50%
1.231
1.25
1.50%
1.269
V
Line Regulation
Vin = 2.9 V to 12 V, Iload = 0.1 mA
LineReg
0.04
mV/V
Load Regulation
Vin = 2.9 V to 12 V, Iload = 0.1 mA to 500 mA
LoadReg
0.04
mV/mA
Dropout Voltage (Vout = 2.5 V − 10 V)
Iload = 500 mA
Iload = 300 mA
Iload = 50 mA
Iload = 0.1 mA
VDO
Peak Output Current (See Figure 14)
Ipk
Short Output Current (See Figure 14) Vin < 7 V, TA = 25°C
Vout v 3.3 V
Vout > 3.3 V
Isc
Thermal Shutdown / Hysteresis
TJ
mV
340
230
110
10
500
700
830
mA
mA
900
930
Ground Current
In Regulation
Iload = 500 mA (Note 12)
Iload = 300 mA
Iload = 50 mA
Iload = 0.1 mA
In Dropout
Vin = Vout + 0.1 V or 2.9 V (whichever is higher), Iload = 0.1 mA
In Shutdown
VSD = 0 V
Output Noise
Cnr = 0 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF
Cnr = 10 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF
°C
160/
10
IGND
9
4.6
0.8
IGNDsh
14
7.5
2.5
220
mA
500
mA
1
mA
mA
mVrms
Vnoise
69
46
Power Good Voltage
Low Threshold
Hysteresis
High Threshold
Velft
Power Good Pin Voltage Saturation (Ief = 1.0 mA)
Vefdo
200
mV
Power Good Pin Leakage
Iefleak
1
mA
tef
50
ms
93
Power Good Pin Blanking Time (Note 13)
Shutdown
Threshold Voltage ON
Threshold Voltage OFF
VSD
SD Input Current, VSD = 0 V to 0.4 V or VSD = 2.0 V to Vin
Vin v 5.4 V
Vin > 5.4 V
ISD
95
2
97
% of
Vout
99
V
2
0.4
mA
0.07
1
5
1
Output Current In Shutdown Mode, Vout = 0 V
IOSD
0.07
Reverse Bias Protection, Current Flowing from the Output Pin to GND
(Vin = 0 V, Vout_forced = Vout (nom) v 7 V)
IOUTR
1
mA
mA
12. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
13. Can be disabled per customer request.
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NCV8537
2.52
VIN = 2.9 V
IOUT = 0
1.84
1.83
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
1.85
1.82
1.81
1.8
VOUT = 1.8 V
1.79
1.78
1.77
2.51
2.505
2.5
1.75
−40
2.49
2.485
2.48
−20
0
20
40
60
80
100
120
2.47
−40
140
0
20
40
60
80
100
120
140
TA, TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature
1.8 V Version
Figure 6. Output Voltage vs. Temperature
2.5 V Version
5.1
3.310
VOUT, OUTPUT VOLTAGE (V)
VIN = 3.7 V
IOUT = 0
3.315
VOUT, OUTPUT VOLTAGE (V)
−20
TA, TEMPERATURE (°C)
3.320
3.305
3.300
VOUT = 3.3 V
3.295
3.290
3.285
3.280
3.275
3.270
−40
−20
0
20
40
60
80
100
120
VIN = 5.4 V
IOUT = 0
5.05
5
VOUT = 5.0 V
4.95
4.9
4.85
−40
140
−20
0
20
40
60
80
100
120
140
TA, TEMPERATURE (°C)
TA, TEMPERATURE (°C)
Figure 7. Output Voltage vs. Temperature 3.3 V
Version
Figure 8. Output Voltage vs. Temperature 5.0 V
Version
900
400
VDO, DROPOUT VOLTAGE (mV)
VDO, DROPOUT VOLTAGE (mV)
VOUT = 2.5 V
2.495
2.475
1.76
800
700
600
500 mA
500
400
300 mA
300
200
50 mA
100
0
VIN = 2.9 V
IOUT = 0
2.515
0
20
40
60
80
100
120
350
300
300 mA
200
150
50 mA
100
50
0
140
500 mA
250
0
20
40
60
80
100
120
140
TA, TEMPERATURE (°C)
TA, TEMPERATURE (°C)
Figure 9. Dropout Voltage vs. Temperature
1.8 V Version
Figure 10. Dropout Voltage vs. Temperature
2.5 V Version
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10
NCV8537
350
VDO, DROPOUT VOLTAGE (mV)
VDO, DROPOUT VOLTAGE (mV)
400
350
300
500 mA
250
300 mA
200
150
50 mA
100
50
0
0
20
40
60
80
100
120
300
500 mA
250
300 mA
200
150
50 mA
100
50
0
140
0
20
40
60
80
100
120
140
TA, TEMPERATURE (°C)
TA, TEMPERATURE (°C)
Figure 11. Dropout Voltage vs. Temperature
3.3 V Version
Figure 12. Dropout Voltage vs. Temperature
5.0 V Version
1000
900
0.97 Vout
Isc
700
Ipk
600
Vout (V)
Ipk (mA), Isc (mA)
800
500
400
300
200
VIN = 2.9 V
VOUT = 1.8 V
100
0
0
20
40
60
80
100
120
Ipk
Isc
Iout (mA)
(For specific values of Ipk and Isc, please refer to Figure 13)
140
TA, TEMPERATURE (°C)
Figure 13. Peak and Short Current
vs. Temperature
Figure 14. Output Voltage vs. Output Current
12
VIN = 2.9 V
VOUT = 1.8 V
10
IGND, GROUND CURRENT (mA)
IGND, GROUND CURRENT (mA)
12
500 mA
8
6
300 mA
4
2
50 mA
0
0
20
40
60
80
100
TA, TEMPERATURE (°C)
120
8
6
4
2
0
140
VIN = 2.9 V
VOUT = 1.8 V
TA = 25°C
10
0
0.1
0.2
0.3
0.4
IOUT, OUTPUT CURRENT (A)
Figure 15. Ground Current vs. Temperature
Figure 16. Ground Current vs. Output Current
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11
0.5
NCV8537
0.8
25°C
0.7
25°C
0°C
IOUT, OUTPUT CURRENT (A)
IOUT, OUTPUT CURRENT (A)
0.8
0.6
0.5
−20°C
−40°C
0.4
0.3
0.2
VIN = 2.9 V
VOUT = 1.8 V
0.1
0.0
3.6
3.4
3.2
3
2.8
2.6
2.4
0.5
−40°C
−20°C
0.4
0.3
0.2
0.1
VIN = 2.9 V
VOUT = 2.5 V
3.4
3.3
3.2
3.1
3
2.9
2.8
VIN, INPUT VOLTAGE (V)
VIN, INPUT VOLTAGE (V)
Figure 17. Output Current Capability for the
1.8 V Version
Figure 18. Output Current Capability for the
2.5 V Version
2.7
90
90
PSRR, RIPPLE REJECTION (dB)
PSRR, RIPPLE REJECTION (dB)
0.6
0.0
3.5
2.2
100
80
Iout = 50 mA
70
60
Iout = 0.5 A
50
40
Iout = 0.25 A
30
VIN = 2.9 V +0.5 VPP Modulation
VOUT = 1.25 V
TA = 25°C
20
10
0
100
1k
10k
100k
F, FREQUENCY (Hz)
70
VIN = 3.4 V +0.5 VPP Modulation
VOUT = 2.5 V
TA = 25°C
60
Iout = 50 mA
80
50
40
20
0
100
1M
500
NOISE DENSITY (nV/√HZ)
500
400
Cnr = 0 nF
300
0
10
Cnr = 10 nF
VIN = 2.9 V
VOUT = 1.25 V
TA = 25°C
100
1k
10k
100k
1k
10k
100k
F, FREQUENCY (Hz)
1M
Figure 21. PSRR vs. Frequency 2.5 V Version
600
100
Iout = 0.25 A
10
600
200
Iout = 0.5 A
30
Figure 20. PSRR vs. Frequency Adjustable
Version
NOISE DENSITY (nV/√HZ)
0°C
0.7
400
Cnr = 0 nF
300
200
100
0
10
1M
Cnr = 10 nF
VIN = 2.9 V
VOUT = 2.5 V
TA = 25°C
100
1k
10k
100k
1M
F, FREQUENCY (Hz)
F, FREQUENCY (Hz)
Figure 22. Output Noise Density Adjustable
Version
Figure 23. Output Noise Density 2.5 V Version
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12
NCV8537
Figure 24. Power Good Activation
Figure 25. Power Good Inactivation
300
15
250
10
qJA (°C/W)
MAXIMUM ESR (W)
Vin at Data Sheet Test Conditions,
25°C, 1 mF Capacitance
Unstable Area
5.0
200
150
1 oz CF
100
2 oz CF
50
Stable Area
0
0
100
200
300
400
0
500
0
100
200
300
400
500
600
700
OUTPUT CURRENT (mA)
COPPER HEAT SPREADING AREA (mm2)
Figure 26. Stability with ESR vs. Output
Current
Figure 27. DFN10 Self−Heating Thermal
Characterstics as a Function of Copper Area
on the PCB
NOTE: Typical characteristics were measured with the same conditions as electrical characteristics.
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13
NCV8537
APPLICATIONS INFORMATION
Reverse Bias Protection
temperature is exceeded. This feature provides protection
from a catastrophic device failure due to accidental
overheating. This protection feature is not intended to be used
as a substitute to heat sinking. The maximum power that can
be dissipated, can be calculated with the equation below:
Reverse bias is a condition caused when the input voltage
goes to zero, but the output voltage is kept high either by a
large output capacitor or another source in the application
which feeds the output pin.
Normally in a bipolar LDO all the current will flow from
the output pin to input pin through the PN junction with
limited current capability and with the potential to destroy
the IC.
Due to an improved architecture, the NCV8537 can
withstand up to 7.0 V on the output pin with virtually no
current flowing from output pin to input pin, and only
negligible amount of current (tens of mA) flowing from the
output pin to ground for infinite duration.
PD +
TJ(max) * TA
RqJA
(eq. 1)
For improved thermal performance, contact the factory
for the DFN package option. The DFN package includes an
exposed metal pad that is specifically designed to reduce the
junction to air thermal resistance, RqJA.
Adjustable Operation
The output voltage can be set by using a resistor divider
as shown in Figure 2 with a range of 1.25 to 10 V. The
appropriate resistor divider can be found by solving the
equation below. The recommended current through the
resistor divider is from 10 mA to 100 mA. This can be
accomplished by selecting resistors in the kW range. As
result, the Iadj * R2 becomes negligible in the equation and
can be ignored.
Input Capacitor
An input capacitor of at least 1.0 mF, any type, is
recommended to improve the transient response of the
regulator and/or if the regulator is located more than a few
inches from the power source. It will also reduce the circuit’s
sensitivity to the input line impedance at high frequencies.
The capacitor should be mounted with the shortest possible
track length directly across the regular’s input terminals.
V out + 1.25 * (1 ) R3ńR2) ) I adj * R2
Output Capacitor
(eq. 2)
Power Good Operation
The NCV8537 remains stable with any type of capacitor
as long as it fulfills its 1.0 mF requirement. There are no
constraints on the minimum ESR and it will remain stable up
to an ESR of 5.0 W. Larger capacitor values will improve the
noise rejection and load transient response.
The Power Good pin on the NCV8537 will produce a
logic Low when it drops below the nominal output voltage.
Refer to the electrical characteristics for the threshold values
at which point the Power Good goes Low. When the
NCV8537 is above the nominal output voltage, the
Power Good will remain at logic High.
The external pullup resistor needs to be connected
between Vin and the Power Good pin. A resistor of
approximately 100 kW is recommended to minimize the
current consumption. No pullup resistor is required if the
Power Good output is not being used. The Power Good does
not function during thermal shutdown and when the part is
disabled.
Noise Reduction Pin
Output noise can be greatly reduced by connecting a 10 nF
capacitor (Cnr) between the noise reduction pin and ground
(see Figure 1). In applications where very low noise is not
required, the noise reduction pin can be left unconnected.
Dropout Voltage
The voltage dropout is measured at 97% of the nominal
output voltage.
Thermal Considerations
Internal thermal limiting circuitry is provided to protect the
integrated circuit in the event that the maximum junction
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14
NCV8537
ORDERING INFORMATION
Device*
Voltage Option
Marking
NCV8537MN180R2G
1.8 V
V8537 180
NCV8537MN250R2G
2.5 V
V8537 250
NCV8537MN330R2G
3.3 V
V8537 330
NCV8537MN500R2G
5.0 V
V8537 500
NCV8537MNADJR2G
Adj
V8537 ADJ
NCV8537ML180R2G**
1.8 V
L8537 180
NCV8537ML250R2G**
2.5 V
L8537 250
NCV8537ML330R2G**
3.3 V
L8537 330
NCV8537ML500R2G**
5.0 V
L8537 500
NCV8537MLADJR2G**
Adj
L8537 ADJ
Package
Package
Shipping†
DFN10
(Pb−Free)
Non−Wettable
Flank
3000 / Tape & Reel
DFN10
(Pb−Free)
Wettable Flank
SLP Process
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
**In Development.
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15
NCV8537
PACKAGE DIMENSIONS
DFN10, 3x3, 0.5P
CASE 485C
ISSUE E
D
A
B
L
L
L1
PIN ONE
REFERENCE
2X
2X
0.15 C
0.15 C
ALTERNATE A−1
ÇÇÇ
ÇÇÇ
ÇÇÇ
E
ALTERNATE TERMINAL
CONSTRUCTIONS
TOP VIEW
A1
(A3)
DETAIL B
ALTERNATE A−2
DETAIL A
ÉÉ
ÇÇ
ÇÇ
C
D2
DETAIL A
10X
1
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
ALTERNATE B−2
ALTERNATE
CONSTRUCTIONS
0.08 C
A1
MOLD CMPD
DETAIL B
A
SIDE VIEW
ÉÉ
ÇÇ
EXPOSED Cu
ALTERNATE B−1
0.10 C
10X
A3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS
MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS
THE TERMINALS.
5. TERMINAL b MAY HAVE MOLD COMPOUND MATERIAL ALONG
SIDE EDGE. MOLD FLASHING MAY NOT EXCEED 30 MICRONS
ONTO BOTTOM SURFACE OF TERMINAL b.
6. FOR DEVICE OPN CONTAINING W OPTION, DETAIL A AND B
ALTERNATE CONSTRUCTION ARE NOT APPLICABLE. WETTABLE FLANK CONSTRUCTION IS DETAIL B AS SHOWN ON
SIDE VIEW OF PACKAGE.
SEATING
PLANE
L
A3
A1
5
SOLDERING FOOTPRINT*
DETAIL B
WETTABLE FLANK OPTION
CONSTRUCTION
10
6
10X
e
10X
0.55
1.90
b
BOTTOM VIEW
2.64
PACKAGE
OUTLINE
E2
K
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.18
0.30
3.00 BSC
2.40
2.60
3.00 BSC
1.70
1.90
0.50 BSC
0.19 TYP
0.35
0.45
0.00
0.03
3.30
0.10 C A B
0.05 C
NOTE 3
10X
0.30
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
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regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCV8537/D