MPQ4570 The Future of Analog IC Technology 3A, 4.5V-55V Input, Frequency Programmable, Fully Integrated Synchronous, Step-Down Converter AEC-Q100 Qualified DESCRIPTION FEATURES The MPQ4570 is a frequency programmable step-down switching converter with integrated internal high-side and low side power MOSFETs. It can provide 3A continuous output current with peak current control for excellent transient response and efficiency performance. The wide 4.5V to 55V input voltage range accommodates a variety of step down applications, including those applications in industrial, PoE, automotive and printer with DC high voltage bus. The MPQ4570 uses peak current mode control to regulate the output voltage. The chip provides over current protection with valley current detection which is used to avoid current running way. Also it has accurate and reliable over voltage protection, and auto recovery thermal protection. In addition, the optional external soft start is available. Enable and power good indication function can be used to power track easily. In order to increase the efficiency, MPQ4570 will automatically scaling down the switching frequency when load is light. Meanwhile, the low side MOSFET will be turned off to reduce driver loss when zero inductor current is detected. MPQ4570 also features as a fully integrated solution with both high side and low side power MOSFETs. Synchronous operation mode with integrated low side MOSFET is much helpful to reduce the conduction loss and also beneficial to reduce external components space and save the cost. Wide Input Voltage Range: 4.5V to 55V 90mΩ and 70mΩ Internal High and Low Power MOSFETs Peak Current Mode Control Programmable Switching Frequency Stable Independent on Output Capacitors Optional External Soft Start OCP Protection with Valley Current Detection Support External SYNC Clock OVP Protection Current Limit Decreasing during Output Short for Better Thermal Performance Power Good Indication Thermal Shutdown Protection Available in a TSSOP-20 EP Package. Available in AEC-Q100 Grade 1 APPLICATIONS PoE Input Non-isolated Buck Industrial Power Systems Printers and Scanners Automotive Power Systems Distributed Power Systems All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. The MPQ4570 is available in a TSSOP-20 EP with exposed pad package. MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 1 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER TYPICAL APPLICATION Efficiency vs. Load Current 100 VOUT=5V 95 VIN=12V 90 85 80 75 70 65 60 VIN=36V VIN=24V VIN=48V VIN=55V 55 50 10 100 1000 10000 LOAD CURRENT (mA) MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 2 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER ORDERING INFORMATION Part Number Package TSSOP-20 EP TSSOP-20 EP MPQ4570GF* MPQ4570GF-AEC1 Top Marking See Below See Below * For Tape & Reel, add suffix –Z (e.g. MPQ4570GF–Z); TOP MARKING MP4570: product code of MPQ4570GF and MPQ4570GF-AEC1; MPS: MPS prefix: YY: year code; WW: week code: LLLLLLLLL: lot number; PACKAGE REFERENCE 1 20 AGND FB 2 19 SS FREQ 3 18 EN 4 17 BIAS BST 5 16 VIN 6 15 GND VIN 7 14 GND VIN 8 13 GND NC 9 12 NC SW 10 11 SW COMP PG VDD TSSOP-20 EP MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 3 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance Supply Voltage VIN ...................................... 60V VSW ..................................... –0.5V to (VIN+0.5V) VBS ....................................................... VSW + 6V All Other Pins ................................. –0.3V to +6V EN Sink Current ....................................... 150μA Continuous Power Dissipation (TA = 25°C) (2) TSSOP-20 EP .......................................... 2.78W Junction Temperature ...............................150°C Lead Temperature ...................................260°C Storage Temperature .............. –65°C to +150°C TSSOP-20 EP ......................... 45 ...... 10 ... °C/W Recommended Operating Conditions Supply Voltage VIN .......................... 4.5V to 55V Output Voltage VOUT ........................1V to 0.9·VIN Operating Junction Temp. (TJ). -40°C to +125°C (3) θJA θJC Notes: 1) Absolute maximum ratings are rated under room temperature unless otherwise noted. Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junctionto-ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Measured on JESD51-7, 4-layer PCB. MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 4 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER ELECTRICAL CHARACTERISTICS VIN = 48V, VEN = 3.3V, TJ= -40C to +125C, unless otherwise noted. Typical values are at TJ= 25C. Parameter Error Amplifier Symbol Condition Feedback Voltage VFB 4.5V ≤ VIN ≤ 55V FB Current Error AMP Transconductance COMP Sink/Source Current IFB VFB=1.07V ICOMP Min Typ Max Units 0.98 1 1.02 V 430 13 10 630 30 50 730 52 nA μA/V μA Switch Characteristic Upper Switch On Resistance RON_HS 90 160 mΩ Lower Switch On Resistance RON_LS 70 120 mΩ Upper Switch Leakage ILKG_SW 10 300 nA 5.7 7.5 A 450 7 670 18 µA µA 3.8 V VEN = 0V, VSW = 0V Current Limit Peak Current Limit ILIMIT 10% Duty Cycle 3.9 IQ ISHDN No load, Without Switching VEN = 0V VDD Regulator Output Voltage VDD BIAS = NC 3.4 3.6 VDD Regulator Output Voltage VDD BIAS = External 5V Power 4.6 4.8 Quiescent Supply Quiescent Supply Current Shutdown Supply Current VDD Regulator V Threshold Voltage EN Rising Threshold VEN_R 1.4 1.6 1.8 V EN Falling Threshold VEN_F 1.1 1.3 1.5 V EN Threshold Hysteresis VEN_HYS VIN UVLO Rising Threshold VIN UVLO Falling Threshold VIN UVLO Threshold Hysteresis 300 VINUV R VINUV F VINUV HYS mV 3.7 3.3 3.9 3.5 400 4.1 3.7 V V mV 2.5 4 5.5 μA Soft Start External Soft Start Charging Current PWM Comparator Minimum Off Time (4) Minimum On Time (4) Capacitor ISS tOFF MIN tON_MIN VSS=1V 100 90 MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. ns ns 5 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER ELECTRICAL CHARACTERISTICS (continued) VIN = 48V, VEN = 3.3V, TJ= -40C to +125C, unless otherwise noted. Typical values are at TJ= 25C. Parameter Oscillator Frequency Symbol Switching Frequency Condition Min Typ Max Units fSW RFREQ=100k 400 520 640 kHz VOVP VFB(OVP)/VFB 108 115 122 % VOUT Rising, VFB(PG)/VFB 86 90 94 VOUT Falling, VFB(PG)/VFB 81 85 89 OVP Protection Output OVP Threshold Power Good Power Good Threshold VPG_TH Power Good Hysteresis VPG_HYS Power Good Delay tPG_DL 5 ΔVFB(PG)/VFB % % VOUT Rising 8 22 37 μs VOUT Falling 8 21 33 μs 10 100 nA 1000 kHz Frequency SYNC SYNC Leakage Current ILKG_SYNC SYNC Frequency Range fSYNC 100 TSD 150 Thermal Thermal Shutdown (4) Thermal Shutdown Hysteresis (4) TSD_HYS 170 °C 10 °C Note: 4) Derived from bench characterization. Not tested in production. MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 6 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER PIN FUNCTIONS Pin # Name Description Compensation Networks Setting. Please connect an external resistor series with a capacitor between this pin and GND. Feedback. This is the input to the PWM comparator. Please put an external resistive divider connected between the output and GND. Switching frequency setting pin. Connect a resistor from this pin to GND to set the switching frequency. If external SYNC clock is applied to this pin, the converter will follow this SYNC clock frequency. Enable Input. Pulling this pin below the specified threshold shuts the chip down. There is no internal pull-up or pull-down circuit, so do not float the pin. Bootstrap. This is the positive power supply for the internal floating high-side MOSFET driver. Connect a capacitor between this pin and SW pin. Input Supply. This supplies power to all the internal control circuitry, VDD regulator. A decoupling capacitor to ground must be placed close to this pin to minimize switching spikes. 1 COMP 2 FB 3 FREQ 4 EN 5 BST 6,7,8 VIN 9,12 NC Not connected pin. Please float this pin in the application. 10,11 13,14, 15, Exposed Pad SW Switch Node. This is the output node from the internal high-side MOSFET source. GND Power ground pin for internal power MOSFETs. VDD Power for internal MOSFET driver and BST charging circuit. 17 BIAS For better thermal performance, please connect this pin to external 5V source, VDD and internal circuit will be powered by BIAS. Since there is a diode inside between the BIAS pin and the internal circuit, please float this pin or connected to GND if not used. 18 PG Power good indication. Please connect a resistor to a pull up power source if used. 19 SS Optional external soft-start time setting. Connect an external capacitor between this pin and GND to set soft-start time externally. Floating the pin will activate the internal 0.5ms soft-start setting. 20 ANGD 16 Ground for internal logic and signal circuit. MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 7 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER TYPICAL CHARACTERISTICS VIN=48V, unless otherwise noted. MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 8 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER TYPICAL CHARACTERISTICS VIN=48V, unless otherwise noted. MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 9 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 48V, VOUT =3.3V, COUT = 2x22µF, L = 10µH, fSW=500kHz, TA = +25C, unless otherwise noted. Efficiency vs. Efficiency vs. Load Regulation Load Current Load Current 100 VOUT=3.3V VOUT=5V 100 VIN=12V 95 95 90 90 85 85 80 75 VIN=36V 70 VIN=24V 65 75 65 VIN=55V 60 0.03 VIN=12V 0.02 VIN=48V 0.01 80 70 VIN=48V VIN=24V 0.00 VIN=48V VIN=36V VIN=55V 60 55 -0.02 55 50 10 100 1000 10000 LOAD CURRENT (mA) 50 10 VIN=12V -0.01 1000 LOAD CURRENT (mA) -0.03 1 1.5 2 2.5 LOAD CURRENT(A) 3 Line Regulation 0.10 0.08 IOUT=2A 0.06 IOUT=1A 0.04 0.02 0.00 IOUT=3A -0.02 -0.04 -0.06 -0.08 -0.10 0 10 20 30 40 50 60 INPUT VOLTAGE (V) MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 10 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 48V, VOUT =3.3V, COUT = 2x22µF, L = 10µH, fSW=500kHz, TA = +25C, unless otherwise noted. MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 11 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 48V, VOUT =3.3V, COUT = 2x22µF, L = 10µH, fSW=500kHz, TA = +25C, unless otherwise noted. MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 12 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER FUNCTIONAL BLOCK DIAGRAM Figure 1 — Functional Block Diagram MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 13 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER OPERATION The MPQ4570 is a step-down switching regulator with integrated high-side high voltage power MOSFETs. It features as wide input voltage range, high efficiency, external internal soft-start, frequency programmable and comprehensive protection mode, i.e. OVP, OCP, OTP. PWM Control The MPQ4570 uses peak current mode control to regulate the output voltage. A PWM cycle is initiated by the internal clock at the beginning of every cycle. After the high side MOSFET turns on, the inductor current will rise linearly to provide the energy to the load. The high side MOSFET remains on until its current hits the COMP voltage which is the output of the internal error amplifier (EA). The output voltage of error amplifier depends on the difference of output feedback voltage and the internal high precision reference and it will decide how much energy should be transferred to the load. The higher load current, the higher COMP voltage. After the high switch is off, the low side switch is on and the inductor current will flow through the low side switch. In order to avoid shoo-through issue, the dead time is inserted to avoid the high side and low side MOSFETS to turn on at the same time. For each turn on and off in a switching cycle, the high side MOSFET will keep on and off with minimum on and off time limit. Light Load Operation In order to get high efficiency, MPQ4570 has two features during light load: 1).When the load current decreases, the inductor current will drop at same time. The low side MOSFET will turn off in order to save driver loss when inductor current drops to zero. 2) When the load decreases, the switching frequency will be scaled down in order to reduce switching loss after COMP voltage drops down lower than certain threshold. Error Amplifier The error amplifier compares the FB pin voltage with the internal reference and outputs a current proportional to the difference between the two. This current is used to charge the external compensation networks to form the COMP voltage, which is used to control the high side up resistor requires limiting voltage amplitude to ≤6V to prevent damage to the zener diode. EN MOSFET peak current and to regulate the output voltage. Oscillator and SYNC Function The internal oscillator frequency is set by a single external resistor (RFREQ) connected between FREQ pin and GND. The frequency setting resistor should be located close to the device. The relationship between oscillator frequency and RFREQ refer to table 1 in APPLICATION INFORMATION section. During light load, the switching frequency will be scalded down according to the COMP voltage. The switching frequency will start to decrease when the COMP voltage is lower than around 0.8V. And the switching will be disabled when the COMP voltage drops lower than around 0.7V. In order to reduce the switching loss and the thermal dissipation, the switching frequency will be decreased according to the FB voltage. When the FB is lower than 25%xRFE, the switching frequency starts to decrease from the normal value, and finally drops to 5% of the normal value when the FB is zero. The FREQ pin can be used to synchronize the internal oscillator rising edge to an external clock falling edge. Make sure the HIGH amplitude of SYNC clock is higher than 1.5V and LOW amplitude is lower than 1V to drive the internal logic. The recommended external SYNC frequency is in the range of 100kHz and 1MHz. There is no pulse width requirement but please note that there is always parasitic capacitance of the pad there, so, if the pulse width is too short, a clear rising and falling edge may not be seen due to the parasitic capacitance. The pulse longer than 100ns is recommended in application. EN Control EN is a control pin that turns the regulator on and off: Drive EN higher than 1.6V to turn on the regulator, drive it lower than 1.3V to turn off. There is no internal pull-up or pull-down at EN, so when it is floating, the EN status is uncertain. The EN pin is clamped internally using a 6.5V zener diode between EN and GND, as shown in the functional block diagram. Connecting the EN pin directly to a voltage source without any pullpin can be connected to higher voltage (e.g. VIN) through pull-up resistor if the system doesn’t MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 14 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER have another logic signal acting as enable signal. Just make sure the pull-up resistor is high enough to make sure the sink current into EN pin less than 150uA to avoid damaging the zener diode. For example, when connecting EN to VIN=12V, RPULL-UP ≥ (12V – 6.5V) ÷ 150µA = 37kΩ. Soft Start The soft start is implemented to ensure the smooth up output voltage during the power on and off. In addition, the soft start function also helps to reduce the inrush current value at the startup. The soft start function is achieved by ramping SS up slowly and using SS to override the internal reference (REF) when SS-900mV is lower than REF. When SS-900mV is higher than REF, REF regains the control. The 900mV above is the offset voltage of SS which means SS is detected as 0 internally when it is lower than 900mV. To minimize the delay for SS to reach 0.9V, an internal pull-up circuit with about 30uA average current pulls SS up to 600mV first. Then use 4uA constant current to charge SS until it reaches to 2.5V. When SS is in the range of 0.9V to 1.9V, it overrides the REF as reference voltage of the error amplifier. During this period, output voltage ramps up from 0 to the regulated value following SS rising. The soft start time (tSS) set by the external SS capacitor can be calculated by below formula: t SS (ms) C SS (nF) VREF (V) ISS ( μA) Where CSS is the external SS capacitor, VREF is the internal reference voltage (1V), and ISS is the 4 μ A SS charge current. The delay time for SS reaches to 900mV can be estimated as below: t SS _delay (ms) C SS (nF) 0.6V C SS (nF) 0.3V 30 μA 4 μA There is also an internal fixed 500us soft start. The final SS time is determined by the longer time between 500μs and external SS setting time. When output voltage is shorted to GND, feedback voltage is pulled to low then the SS will be discharged. The part will soft start again when the short at output is removed. Internal Regulator and BIAS There is an internal 2.5V regulator powers all the internal control circuits. The 2.5V regulator takes VIN as power supply when BIAS pin is lower than 3.2V while supplies from BIAS when BIAS is higher than 3.2V. VDD regulator powers LS driver and also BST regulator when it is higher than 4.5V. VDD is powered from VIN when BIAS is floating and regulated at 3.6V. When BIAS is higher than 4.2V, it starts to power VDD. VDD will increases as BIAS rising with 600mV voltage drop and regulated at 4.8V when BIAS is higher than 5.4V. A 1µF decoupling capacitor is needed at the pin and make the capacitor as close to the pin as possible. Using BIAS to power internal regulator can improve the efficiency. It is recommended to connect BIAS to an external power supply that is in the range of 3.3V to 5.5V. Output voltage is a good choice for this power supply if it is in above range. A 0.1µF to 1µF decoupling capacitor at the pin is recommended. Over Voltage Protection The MPQ4570 monitors the feedback output voltage to achieve the over voltage protection. If the FB voltage is higher than the 115%xREF, the high side and low side MOSFET will be turned off immediately, the PG signal will be asserted to inform the fault status. High side and low side MOSFET will resume switching following close loop operation after FB voltage drops back to lower than 103%xREF. Over Current Protection The MPQ4570 has cycle-by-cycle peak current limit protection and valley current detection protection. The inductor current is monitored during the high side MOSFET on state. If the inductor current exceeds the current limit value set by COMP voltage, the high side MOSFET turns off immediately. Then, the low side MOSFET will be turned on to discharge the energy and inductor current will decrease. The high side MOSFET will not be on again unless the inductor valley current is lower than a certain current threshold which is called the valley current limit. It is very useful to avoid the inductor current to run away. Also, both the peak current limit and the valley current limit value are MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 15 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER dependent on the FB voltage. If the feedback output voltage is higher than the 50%xREF, the current limit value is as the normal value. If the feedback output voltage is lower than 50%xRFF, the current limit will decrease and drop to the half normal value when the feedback output voltage is zero. This feature is very helpful to reduce the OCP thermal dissipation which may especially get worse when the output voltage is shorted. Also, it is very helpful to reduce the high inrush current during the startup. UVLO Protection The MPQ4570 has input under voltage lockout protection (UVLO). Assuming the EN is active, the MPQ4570 is powered on when the input voltage is higher than the UVLO rising threshold and is powered off when input voltage drops below the UVLO falling threshold. Thermal Shutdown Protection The thermal shutdown is employed in MPQ4570 by monitoring the IC temperature internally. If the junction temperature exceeds the threshold (typically 170oC), the regulator shuts off and it will turns on again when the temperature drops below 160oC. There is a ~10oC hysteresis. Power Good gone, the reset is off and then the soft-start process resumes. The dedicated internal bootstrap regulator regulates and charges the bootstrap capacitor to 4.2V. When the voltage between the BST and SW nodes is less than its regulation, a PMOS pass transistor from VIN to BST turns ON. The charging current path is from VIN, BST and then to SW. As long as VIN is sufficiently higher than VSW, the bootstrap capacitor can be charged. When the high side MOSFET is ON, VIN≈VSW so the bootstrap capacitor can’t be charged. When low side MOSFET is ON, the difference between VIN and VSW is at its largest, thus making it the best period to charge. When there is no current in the inductor, VSW=VOUT so the difference between VIN and VOUT can charge the bootstrap capacitor. At higher duty cycles, the time period available for bootstrap charging is shorter so the bootstrap capacitor may not be sufficiently charged. If the internal circuit does not have sufficient voltage and the bootstrap capacitor is not charged, extra external circuitry can be used to ensure the bootstrap voltage is within the normal operational region. MPQ4570 has one power good (PG) pin out to indicate the normal operation after soft start time. The PG pin is the open drain of an internal MOSFET. It should be connected to VDD or external voltage source through a resistor (i.e. 100kohm). After the input voltage is applied, the MOSFET is turned on and the PG pin is pulled to GND before SS is ready. After the FB voltage reaches 90% REF voltage, the MOSFET turns off and PG pin is pulled to high by external voltage source. When the FB voltage drops to 85% REF voltage, the PG voltage is pulled to GND to indicate a failure output status. Floating Driver and Bootstrap Charging An external bootstrap capacitor (0.1µF typically) between BST pin and SW pin powers the floating power MOSFET driver. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 2.3V with a hysteresis of 300mV. The driver’s UVLO is soft-start related: When the bootstrap voltage hits its UVLO threshold, the soft-start circuit resets. When bootstrap UVLO is MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 16 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER APPLICATION INFORMATION COMPONENT SELECTION Setting the Switching Frequency The MPQ4570 has an externally adjustable frequency. The switching frequency (fSW) can be set using a resistor at FREQ pin (RFREQ). The recommended RFREQ values for various fSW see table1. Refer to fSW vs. RFREQ curve in TYPICAL CHARACTERISTICS section for more detailed values. Table 1 — fSW vs. RFREQ fSW (kHz) RFREQ (kΩ) 1000 900 800 700 600 500 400 300 200 100 47.5 56 63.4 73.2 84.5 102 133 178 261 523 Setting the Output Voltage A resistive voltage divider from the output voltage to FB pin sets the output voltage. The voltage divider divides the output voltage down to the feedback voltage by the ratio: VFB =VOUT R2 R1+R2 Thus the output voltage is: VOUT =VFB R1+R2 R2 For example, the value for R1 can be 10kΩ. With this value, R2 is: R2 10 VOUT 1 kΩ So for a 3.3V output voltage, R1 is 10kΩ, and R1 is 4.32kΩ. Inductor The inductor provides constant current to the output load while being driven by the switched input voltage. A larger-value inductor will result in lower ripple current that will lower the output ripple voltage. However, a larger inductor value will be physically larger, have higher series resistance, or lower saturation current. To determine the inductance, allow the inductor’s peak-to-peak ripple current to approximately equal 30% of the maximum switch current limit. Make sure that the peak inductor current is less than the maximum switch current limit. The inductance value can be calculated by: L1 VOUT fSW ∆IL V 1 OUT VIN Where VOUT is the output voltage, VIN is the input voltage, fS is the switching frequency, and ∆IL is the peak-to-peak inductor ripple current. Choose an inductor that will not saturate under the maximum inductor peak current. The peak inductor current can be calculated by: ILP ILOAD V VOUT 1 OUT 2 fSW L1 VIN Where ILOAD is the load current. Input Capacitor The input current to the step-down converter is discontinuous and requires a capacitor to supply the AC current to the step-down converter while maintaining the DC input voltage. Use capacitors with low equivalent series resistances (ESR) for the best performance. Ceramic capacitors are best, but tantalum or low-ESR electrolytic capacitors may also suffice. For simplification, choose the input capacitor with an RMS current rating greater than half of the maximum load current. The input capacitor (C1) can be electrolytic, tantalum, or ceramic. When using electrolytic or tantal um capacitors, place a small, high-quality, ceramic capacitor (0.1μF) as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at the input. The input voltage ripple caused by capacitance is approximately: MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 17 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER ∆VIN V ILOAD V OUT 1 OUT fSW C1 VIN VIN Output Capacitor The output capacitor (C2) maintains the DC output voltage. Use ceramic, tantalum, or lowESR electrolytic capacitors. Low-ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated as: ∆VOUT V V OUT 1 OUT fSW L VIN 1 R ESR 8 fSW C2 Where L is the inductor value and RESR is the ESR value of the output capacitor. For ceramic capacitors, the capacitance dominates the impedance at the switching frequency and contributes the most to the output voltage ripple. For simplification, the output voltage ripple can be estimated by: ∆VOUT V VOUT 1 OUT VIN 8 f L C2 2 SW For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple is approximately: ∆VOUT VOUT VOUT 1 R ESR fSW L VIN The characteristics of the output capacitor also affect the stability of the regulation system. The MPQ4570 can be optimized for a wide range of capacitances and ESR values. Compensation Components MPQ4570 employs current-mode control for easy compensation and fast transient response. The COMP pin controls the system stability and transient response. The COMP pin is the output of the internal error amplifier. A series capacitorresistor combination sets a pole-zero combination to control the control system’s characteristics. The DC gain of the voltage feedback loop is: A VDC R LOAD G CS A VEA Where AVEA is the error-amplifier voltage gain, 1000V/V; GCS is the current-sense transconductance, 12A/V; RLOAD is the load resistor value. The system has two important poles: One from the compensation capacitor (C3) and the output resistor of error amplifier, and the other due to the output capacitor and the load resistor. These poles are located at: fP1 GEA 2π C3 A VEA fP2 1 2π C2 R LOAD is the Where, GEA transconductance, 630μA/V. error-amplifier The system has one important zero due to the compensation capacitor and the compensation resistor (R3). This zero is located at: fZ1 1 2π C3 R3 The system may have another significant zero if the output capacitor has a large capacitance or a high ESR value. This zero is located at: fESR 1 2π C2 RESR In this case, a third pole set by the compensation capacitor (C4) and the compensation resistor can compensate for the effect of the ESR zero. This pole is located at: fP3 1 2π C4 R3 The goal of compensation design is to shape the converter transfer function for a desired loop gain. The system crossover frequency where the feedback loop has unity gain is important: Lower crossover frequencies result in slower line and load transient responses, while higher crossover frequencies lead to system instability. Generally, set the crossover frequency to ~0.1×fSW. VFB VOUT MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 18 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER Follow these steps to design the compensation: 1. Choose R3 to set the desired crossover frequency: R3 2π C2 fC VOUT GEA GCS VFB Where fC is the desired crossover frequency. 2. Choose C3 to achieve the desired phase margin. For applications with typical inductor values, set the compensation zero (fZ1) <0.25 ×fC to provide sufficient phase margin. C3 is then: C3 4 2π R3 fC 3. C4 is required if the ESR zero of the output capacitor is located at <0.5×fSW, or the following relationship is valid: f 1 SW 2π C2 R ESR 2 If this is the case, use C4 to set the pole (fP3) at the location of the ESR zero. Determine the C4: C4 C2 RESR R3 External Bootstrap Diode For high duty-cycle operation (when VOUT/VIN > 65%), the time period available to the bootstrap charging is less so the bootstrap capacitor may not be charged sufficiently. This affects the efficiency, even the normal operation of the part. An external bootstrap diode from 3V-5V rail to the BST pin can help to charge the bootstrap capacitor and enhance the efficiency. Output voltage is the good choice of this power supply if it is in above range. The bootstrap diode can be a low cost one such as IN4148 or BAT54. At no-load or light-load, the converter may operate in pulse-skipping mode in order to maintain output-voltage regulation. Under this condition, VSW= VOUT in most time period, so the diode from VOUT to BST can’t charge the bootstrap capacitor. For sufficient gate voltage during pulse-skipping, VIN–VOUT should be no less than 3V. For example, if the VOUT=3.3V, VIN must exceed 3.3V+3V=6.3V to maintain sufficient bootstrap voltage at no-load or light-load. To meet this requirement, the EN pin can program the input UVLO voltage to VOUT+3V PCB Layout Guide PCB layout is very important to stable operation. Please follow below guidelines and use figure 3 as reference. 1) Place the ceramic input capacitor as close to IN and GND pins as possible, especially the small package size (0603) input bypass capacitor. Keep the connection of input capacitor and IN pin as short and wide as possible. 2) Place the VDD capacitor to VDD pin and GND pin as close as possible. 3) Use large ground plane directly connect to GND pin. Add vias near the GND pin if bottom layer is ground plane. 4) Route SW, BST away from sensitive analog areas such as FB. 5) Ensure all feedback connections are short and direct. Place the feedback resistors as close to the chip as possible. 6) Connect IN, SW, and especially GND and exposed pad to large copper areas to cool the chip for improved thermal performance and longterm reliability. Figure 2 — External Bootstrap Diode MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 19 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER Top Layer Bottom Layer Figure 3 – Recommended PCB Layout Inner 1 Layer Inner 2 Layer MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 20 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER TYPICAL APPLICATION CIRCUITS D1 1N4148 U1 BST 6,7,8 VIN GND C7 0.1uF 5 4.5V-55V C1A 2.2uF C1B 2.2uF C1C 0.1uF VIN R4 1M FB EN C2A 22uF 18 PG R2 4.32k BIAS C2B 22uF C2C 0.1uF R1 2 R5 GND 10k 17 C6 0.1uF R6 100k 20 COMP GND FREQ 13,14,15 3 SS VDD AGND 16 C8 1uF R7 102k VOUT 10uH NS PG 3.3V@3A L1 10,11 MPQ4570 4 EN SW 19 C5 1uF 1 R3 10k C4 220pF C3 47nF Figure 4 – 3.3V Output Typical Application Circuit MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 21 MPQ4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER PACKAGE INFORMATION TSSOP-20 EP (EXPOSED PAD) 4.40 TYP 6.40 6.60 20 0.40 TYP 11 1.60 TYP 4.30 4.50 PIN 1 ID 1 0.65 BSC 3.20 TYP 6.20 6.60 5.80 TYP 10 TOP VIEW RECOMMENDED LAND PATTERN 0.80 1.05 1.20 MAX SEATING PLANE 0.19 0.30 0.65 BSC 0.00 0.15 0.09 0.20 SEE DETAIL "A" SIDE VIEW FRONT VIEW GAUGE PLANE 0.25 BSC 3.80 4.30 0o-8o 0.45 0.75 DETAIL A 2.60 3.10 BOTTOM VIEW NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) DRAWING CONFORMS TO JEDEC MO-153, VARIATION ACT. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPQ4570 Rev. 1.04 www.MonolithicPower.com 1/3/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 22