STMicroelectronics ESDAXLC5-1U2 Low clamping, single-line unidirectional esd protection for high speed interface Datasheet

ESDAXLC5-1U2
Low clamping, single-line unidirectional ESD protection
for high speed interface
Datasheet  production data
Features
 Unidirectional device
 Low clamping voltage:
– 10.4 V IEC 61000-4-2, 8 kV contact
measured at 30 ns
– 13.7 V TLP 16 A IPP
 Very high bandwidth: 11.4 GHz
 0201 package
 Ultra low PCB area: 0.18 mm2
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 ECOPACK®2 and RoHS compliant component
Figure 1. Functional diagram (top view)
Complies with the following standards:
 IEC 61000-4-2 level 4 (exceed level4)
– ±30 kV (air discharge)
– ±16 kV (contact discharge)
Applications
Where transient overvoltage protection in ESD
sensitive equipment is required, such as:
 Smartphones, mobile phone and accessories
 Tablet PCs, netbooks and notebooks
 Portable multimedia devices and accessories
 Digital cameras and camcorders
 Communication and highly integrated systems
Description
The ESDAXLC5-1U2 is a unidirectional single line
TVS diode designed to protect data lines or other
I/O ports against ESD transients.
The device is ideal for applications where both
reduced line capacitance and board space saving
are required.
January 2016
This is information on a product in full production.
DocID028771 Rev 1
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www.st.com
Characteristics
1
ESDAXLC5-1U2
Characteristics
Table 1. Absolute maximum ratings (Tamb = 25 °C)
Symbol
Parameter
VPP
Peak pulse voltage:
IEC 61000-4-2 contact discharge
IEC 61000-4-2 air discharge
PPP
Peak pulse power (8/20 µs)(1)
(1)
Value
Unit
±16
±30
kV
20
W
2.2
A
IPP
Peak pulse current (8/20 µs)
Tj
Operating junction temperature range
- 55 to +150
°C
Tstg
Storage temperature range
- 65 to +150
°C
TL
Maximum lead temperature for soldering during 10 s
260
°C
1. According to IEC61000-4-5, for a surge greater than the maximum values, the diode will fail in short-circuit.
Figure 2. Electrical characteristics (definitions)
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Characteristics
Table 2. Electrical characteristics (values, Tamb = 25 °C)
Symbol
Parameter
Test Condition
VBR
Breakdown voltage
VRM
Reverse working voltage
IRM
Leakage current
VRM = 3.6 V
Cline
Line capacitance
F = (200 MHz- 3000 MHz), VLINE = 0 V
VCL
Rd
VFCL
FC
Reverse clamping voltage
Dynamic resistance(1)
Forward clamping voltage
Cut-off frequency
IR = 1 mA
Min.
Typ.
5
6.6
Unit
V
3.6
V
4
100
nA
0.55
0.7
pF
IPP = 1 A, 8/20 µs
7
IPP = 2.2 A, 8/20 µs
8
IEC 61000-4-2, 8 kV contact measured at
30 ns
10.4
TLP measurement (pulse duration 100 ns),
IPP = 16 A(1)
13.7
Pulse duration 100 ns(1)
Max.
Direct
0.39
Forward
0.52
IPP = 1 A, 8/20 µs
2.5
IPP = 2.2 A, 8/20 µs
4.0
TLP measurement (pulse duration 100 ns),
IPP = 16 A(1)
10.4
-3 dB
11.4
V
Ω
V
GHz
1. More information is available in ST application note: AN4022
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Characteristics
ESDAXLC5-1U2
Figure 3. Leakage current versus junction
temperature (typical values)
Figure 4. Junction capacitance versus
frequency (typical values)
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Figure 5. ESD response to IEC 61000-4-2
(+8 kV contact discharge)
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Figure 6. ESD response to IEC 61000-4-2
(-8 kV contact discharge)
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Figure 7. S21 attenuation measurement results
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Figure 8. TLP measurements
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Package information
Package information

Epoxy meets UL94, V0

Bar indicates pin 1
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
2.1
ST0201 package information
Figure 9. ST0201 package outline
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Package information
ESDAXLC5-1U2
Table 3. 0201 package mechanical data
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.23
0.28
0.33
b1
0.20
0.25
0.30
0.0091
0.0110
0.0130
0.0079
0.0098
0.0118
b2
0.20
0.25
0.30
0.0079
0.0098
0.0118
D
0.25
0.30
0.35
0.0099
0.0118
0.0138
E
0.55
0.60
0.65
0.0217
0.0236
0.0256
e
0.35
0.0138
L1
0.13
0.18
0.23
0.0052
0.0071
0.0091
L2
0.14
0.19
0.24
0.0055
0.0075
0.0095
Figure 10. Footprint, dimensions in mm
(inches)
Figure 11. Marking
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Note:
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Product marking may be rotated by 180° for assembly plant differentiation. In no case
should this product marking be used to orient the component for its placement on a PCB.
Only pin 1 mark is to be used for this purpose.
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Package information
Figure 12. Tape and reel outline
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Recommendation on PCB assembly
ESDAXLC5-1U2
3
Recommendation on PCB assembly
3.1
Stencil opening design
1.
General recommendations on stencil opening design
a)
Stencil opening dimensions: L (Length), W (Width), T (Thickness).
Figure 13. Stencil opening dimensions
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b)
:
General design rule
Stencil thickness (T) = 75 ~ 125 µm
W
Aspect Ratio = -----  1.5
T
LW
Aspect Area = ----------------------------  0.66
2T  L + W 
2.
Recommended stencil window
a)
Stencil opening thickness: 80 µm
b)
Other dimensions: see Figure 14
Figure 14. Recommended stencil window position, stencil opening thickness: 80 µm
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ESDAXLC5-1U2
3.2
3.3
3.4
Recommendation on PCB assembly
Solder paste
1.
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2.
“No clean” solder paste is recommended.
3.
Offers a high tack force to resist component displacement during PCB movement.
4.
Use solder paste with fine particles: Type 4 (powder particle size is 20-45 µm).
Placement
1.
Manual positioning is not recommended.
2.
It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering
3.
Standard tolerance of ±0.05 mm is recommended.
4.
1.0 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5.
To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
PCB design preference
1.
To control the solder paste amount, the closed via is recommended instead of open
vias.
2.
The position of tracks and open vias in the solder area should be well balanced. A
symmetrical layout is recommended, to avoid any tilt phenomena caused by
asymmetrical solder paste due to solder flow away.
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Recommendation on PCB assembly
3.5
ESDAXLC5-1U2
Reflow profile
Figure 15. ST ECOPACK® recommended soldering reflow profile for PCB mounting
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Minimize air convection currents in the reflow oven to avoid component movement.
Maximum soldering profile corresponds to the latest IPC/JEDEC J-STD-020.
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4
Ordering information
Ordering information
Figure 16. Ordering information scheme
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Table 4. Ordering information
Order code
Marking
Weight
Base qty
Delivery mode
ESDAXLC5-1U2
D2(1)
0.124 mg
15000
Tape and reel
1. The marking can be rotated by 180° to differentiate assembly location
5
Revision history
Table 5. Document revision history
Date
Revision
25-Jan-2016
1
Changes
Initial release.
DocID028771 Rev 1
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ESDAXLC5-1U2
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