ON NCP146CD180R2G 300 ma cmos low dropout regulator Datasheet

NCP146
Product Preview
300 mA CMOS Low Dropout
Regulator
The NCP146 is 300 mA LDO that provides the engineer with a very
stable, accurate voltage with low noise suitable for space constrained,
noise sensitive applications. In order to optimize performance for
battery operated portable applications, the NCP146 employs the
dynamic quiescent current adjustment for very low IQ consumption at
no−load.
Features
•
•
•
•
•
•
•
•
•
•
MARKING
DIAGRAM
8
8
Operating Input Voltage Range: 1.7 V to 5.5 V
Available in Fixed Voltage Options: 1.8 V
Very Low Quiescent Current of Typ. 50 mA
Low Dropout: 280 mV Typical at 300 mA
±1% Accuracy at Room Temperature
High Power Supply Ripple Rejection: 75 dB at 1 kHz
Thermal Shutdown and Current Limit Protections
Stable with a 1 mF Ceramic Output Capacitor
Available in SOIC−8 Package
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applicaitons
•
•
•
•
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PDAs, Mobile phones, GPS, Smartphones
Wireless Handsets, Wireless LAN, Bluetooth®, Zigbee®
Portable Medical Equipment
Other Battery Powered Applications
VIN
OUT
NCP146
CIN
GND
1
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
OUT
1
8
IN
GND
2
7
GND
GND
3
6
GND
N/C
4
5
N/C
SOIC−8
(Top View)
VOUT
IN
1
XXXXX
ALYW
G
SOIC−8
CASE 751
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
COUT
1 mF
Ceramic
Figure 1. Typical Application Schematic
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2016
January, 2016 − Rev. P0
1
Publication Order Number:
NCP146/D
NCP146
IN
THERMAL
SHUTDOWN
BANDGAP
REFERENCE
MOSFET
DRIVER WITH
CURRENT LIMIT
OUT
AUTO LOW
POWER MODE
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
1
OUT
Regulated output voltage pin. A small ceramic capacitor with minimum value of 1 mF is needed from this
pin to ground to assure stability.
2, 3, 6, 7
GND
Power supply ground.
8
IN
4, 5
N/C
Description
Input pin. A small capacitor is needed from this pin to ground to assure stability.
Not connected. This pin can be tied to ground to improve thermal dissipation.
ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage (Note 1)
Output Voltage
Output Short Circuit Duration
Maximum Junction Temperature
Symbol
Value
Unit
VIN
−0.3 V to 6 V
V
VOUT
−0.3 V to VIN + 0.3 V or 6 V
V
tSC
∞
s
TJ(MAX)
150
°C
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114,
ESD Machine Model tested per EIA/JESD22−A115,
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS (Note 3)
Rating
Thermal Characteristics, SOIC−8
Thermal Resistance, Junction−to−Air
3. Single component mounted on 1 oz, FR 4 PCB with 645 mm2 Cu area.
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2
Symbol
Value
Unit
RqJA
TBD
°C/W
NCP146
ELECTRICAL CHARACTERISTICS
−40°C ≤ TJ ≤ 85°C; VIN = 2.8 V, IOUT = 1 mA, CIN = COUT = 1 mF. Typical values are at TJ = +25°C. Min./Max. are for TJ = −40°C and TJ =
+85°C respectively (Note 4).
Parameter
Test Conditions
Symbol
Min
Max
Unit
VIN
1.7
5.5
V
−40°C ≤ TJ ≤ 85°C
VOUT
−2
+3
%
Line Regulation
VOUT + 0.5 V ≤ VIN ≤ 5.5 V
RegLINE
0.1
%/V
Load Regulation
IOUT = 1 mA to 150 mA
Operating Input Voltage
Output Voltage Accuracy
Load Regulation
Load Transient
Dropout Voltage (Note 5)
Output Current Limit
Quiescent Current
IOUT = 1 mA to 300 mA
Typ
0.01
mV
15
RegLOAD
30
IOUT = 1 mA to 300 mA or 300 mA to 1 mA
in 1 ms, COUT = 1 mF
TranLOAD
−50/
+30
mV
IOUT = 300 mA
VDO
280
mV
VOUT = 90% VOUT(nom)
ICL
600
mA
IOUT = 0 mA
IQ
50
PSRR
75
dB
95
mA
Power Supply Rejection Ratio
VIN = 2.8 V, VOUT = 1.8 V
IOUT = 150 mA
Output Noise Voltage
VIN = 2.8 V, VOUT = 1.8 V, IOUT = 150 mA
f = 10 Hz to 100 kHz
VN
70
mVrms
Thermal Shutdown Temperature
Temperature increasing from TJ = +25°C
TSD
160
°C
Temperature falling from TSD
TSDH
20
°C
Thermal Shutdown Hysteresis
f = 1 kHz
300
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at
TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
5. Characterized when VOUT falls 100 mV below the regulated voltage at VIN = VOUT(NOM) + 1 V.
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3
NCP146
APPLICATIONS INFORMATION
General
Thermal Shutdown
The NCP146 is a high performance 300 mA Low Dropout
Linear Regulator. This device delivers very high PSRR
(over 75 dB at 1 kHz) and excellent dynamic performance
as load/line transients. In connection with very low
quiescent current this device is very suitable for various
battery powered applications such as tablets, cellular
phones, wireless and many others. The device is fully
protected in case of output overload, output short circuit
condition and overheating, assuring a very robust design.
When the die temperature exceeds the Thermal Shutdown
threshold (TSD − 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (TSDU − 140°C typical).
Once the IC temperature falls below the 140°C the LDO is
enabled again. The thermal shutdown feature provides the
protection from a catastrophic device failure due to
accidental overheating. This protection is not intended to be
used as a substitute for proper heat sinking.
Input Capacitor Selection (CIN)
It is recommended to connect at least a 1 mF Ceramic X5R
or X7R capacitor as close as possible to the IN pin of the
device. This capacitor will provide a low impedance path for
unwanted AC signals or noise modulated onto constant
input voltage. There is no requirement for the min. /max.
ESR of the input capacitor but it is recommended to use
ceramic capacitors for their low ESR and ESL. A good input
capacitor will limit the influence of input trace inductance
and source resistance during sudden load current changes.
Larger input capacitor may be necessary if fast and large
load transients are encountered in the application.
Power Dissipation
As power dissipated in the NCP146 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part. For reliable operation junction temperature
should be limited to +125°C
The maximum power dissipation the NCP146 can handle
is given by:
Output Decoupling (COUT)
P D(MAX) +
The NCP146 requires an output capacitor connected as
close as possible to the output pin of the regulator. The
recommended capacitor value is 1 mF and X7R or X5R
dielectric due to its low capacitance variations over the
specified temperature range. The NCP146 is designed to
remain stable with minimum effective capacitance of
0.22mF to account for changes with temperature, DC bias
and package size. Especially for small package size
capacitors such as 0402 the effective capacitance drops
rapidly with the applied DC bias.
There is no requirement for the minimum value of
Equivalent Series Resistance (ESR) for the COUT but the
maximum value of ESR should be less than 2 W. Larger
output capacitors and lower ESR could improve the load
transient response or high frequency PSRR. It is not
recommended to use tantalum capacitors on the output due
to their large ESR. The equivalent series resistance of
tantalum capacitors is also strongly dependent on the
temperature, increasing at low temperature.
ƪ125° C * T Aƫ
q JA
(eq. 1)
The power dissipated by the NCP146 for given
application conditions can be calculated from the following
equations:
P D [ V INǒI GND@I OUTǓ ) I OUTǒV IN * V OUTǓ
(eq. 2)
Reverse Current
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
Power Supply Rejection Ratio
The NCP146 features very good Power Supply Rejection
ratio. If desired the PSRR at higher frequencies in the range
100 kHz − 10 MHz can be tuned by the selection of COUT
capacitor and proper PCB layout.
Output Current Limit
PCB Layout Recommendations
Output Current is internally limited within the IC to a
typical 600 mA. The NCP146 will source this amount of
current measured with a voltage drops on the 90% of the
nominal VOUT. If the Output Voltage is directly shorted to
ground (VOUT = 0 V), the short circuit protection will limit
the output current to 630 mA (typ). The current limit and
short circuit protection will work properly over whole
temperature range and also input voltage range. There is no
limitation for the short circuit duration.
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors close to the
device pins and make the PCB traces wide. In order to
minimize the solution size, use 0402 capacitors. Larger
copper area connected to the pins will also improve the
device thermal resistance. The actual power dissipation can
be calculated from the equation above (Equation 2). Expose
pad should be tied the shortest path to the GND pin.
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4
NCP146
ORDERING INFORMATION
Device
NCP146CD180R2G
Voltage Option
Marking
Package
Shipping†
1.8 V
TBD
SOIC−8
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NCP146
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
−X−
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
K
−Y−
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
S
X
J
SOLDERING FOOTPRINT*
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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ZigBee is a registered trademark of ZigBee Alliance.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
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NCP146/D
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