ON NSBA124EDXV6T1G Dual pnp bias resistor transistors r1 = 22 k , r2 = 22 k Datasheet

MUN5112DW1,
NSBA124EDXV6,
NSBA124EDP6
Dual PNP Bias Resistor
Transistors
R1 = 22 kW, R2 = 22 kW
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PIN CONNECTIONS
PNP Transistors with Monolithic Bias
Resistor Network
(3)
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base−emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
(2)
R1
(1)
R2
Q1
Q2
R2
R1
(4)
(5)
(6)
• S and NSV Prefix for Automotive and Other Applications
•
•
•
•
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MARKING DIAGRAMS
6
0B M G
G
1
MAXIMUM RATINGS
(TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Symbol
Max
Unit
Collector−Base Voltage
VCBO
50
Vdc
Collector−Emitter Voltage
VCEO
50
Vdc
IC
100
mAdc
Input Forward Voltage
VIN(fwd)
40
Vdc
Input Reverse Voltage
VIN(rev)
10
Vdc
Rating
Collector Current − Continuous
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
Package
Shipping†
MUN5112DW1T1G,
SMUN5112DW1T1G
SOT−363
3,000 / Tape & Reel
NSBA124EDXV6T1G
SOT−563
4,000 / Tape & Reel
NSBA124EDP6T5G
SOT−963
8,000 / Tape & Reel
Device
SOT−363
CASE 419B
0B M G
G
1
1
0B/m
M
G
mMG
G
SOT−563
CASE 463A
SOT−963
CASE 527AD
= Specific Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2012
September, 2012 − Rev. 0
1
Publication Order Number:
DTA124ED/D
MUN5112DW1, NSBA124EDXV6, NSBA124EDP6
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
187
256
1.5
2.0
mW
MUN5112DW1 (SOT−363) One Junction Heated
Total Device Dissipation
TA = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
PD
RqJA
mW/°C
670
490
°C/W
250
385
2.0
3.0
mW
MUN5112DW1 (SOT−363) Both Junction Heated (Note 3)
Total Device Dissipation
TA = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
PD
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
RqJA
493
325
°C/W
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
RqJL
188
208
°C/W
TJ, Tstg
−55 to +150
°C
357
2.9
mW
mW/°C
Junction and Storage Temperature Range
NSBA124EDXV6 (SOT−563) One Junction Heated
Total Device Dissipation
TA = 25°C
Derate above 25°C
(Note 1)
(Note 1)
Thermal Resistance,
Junction to Ambient
(Note 1)
PD
RqJA
350
°C/W
NSBA124EDXV6 (SOT−563) Both Junction Heated (Note 3)
Total Device Dissipation
TA = 25°C
Derate above 25°C
(Note 1)
(Note 1)
Thermal Resistance,
Junction to Ambient
(Note 1)
Junction and Storage Temperature Range
PD
RqJA
TJ, Tstg
500
4.0
250
mW
mW/°C
°C/W
−55 to +150
°C
231
269
1.9
2.2
mW
NSBA124EDP6 (SOT−963) One Junction Heated
Total Device Dissipation
TA = 25°C
(Note 4)
(Note 5)
(Note 4)
(Note 5)
Derate above 25°C
Thermal Resistance,
Junction to Ambient
(Note 4)
(Note 5)
PD
RqJA
mW/°C
540
464
°C/W
339
408
2.7
3.3
mW
NSBA124EDP6 (SOT−963) Both Junction Heated (Note 3)
Total Device Dissipation
TA = 25°C
(Note 4)
(Note 5)
(Note 4)
(Note 5)
Derate above 25°C
Thermal Resistance,
Junction to Ambient
(Note 4)
(Note 5)
Junction and Storage Temperature Range
1.
2.
3.
4.
5.
FR−4 @ Minimum Pad.
FR−4 @ 1.0 x 1.0 Inch Pad.
Both junction heated values assume total power is sum of two equally powered channels.
FR−4 @ 100 mm2, 1 oz. copper traces, still air.
FR−4 @ 500 mm2, 1 oz. copper traces, still air.
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2
PD
mW/°C
RqJA
369
306
°C/W
TJ, Tstg
−55 to +150
°C
MUN5112DW1, NSBA124EDXV6, NSBA124EDP6
ELECTRICAL CHARACTERISTICS (TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Symbol
Characteristic
Min
Typ
Max
−
−
100
−
−
500
−
−
0.2
50
−
−
50
−
−
60
100
−
−
−
0.25
−
1.2
−
−
2.0
−
−
−
0.2
4.9
−
−
Unit
OFF CHARACTERISTICS
Collector−Base Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
Collector−Emitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
Emitter−Base Cutoff Current
(VEB = 6.0 V, IC = 0)
IEBO
Collector−Base Breakdown Voltage
(IC = 10 mA, IE = 0)
V(BR)CBO
Collector−Emitter Breakdown Voltage (Note 6)
(IC = 2.0 mA, IB = 0)
V(BR)CEO
nAdc
nAdc
mAdc
Vdc
Vdc
ON CHARACTERISTICS
hFE
DC Current Gain (Note 6)
(IC = 5.0 mA, VCE = 10 V)
Collector−Emitter Saturation Voltage (Note 6)
(IC = 10 mA, IB = 0.3 mA)
VCE(sat)
Input Voltage (off)
(VCE = 5.0 V, IC = 100 mA)
Vi(off)
Input Voltage (on)
(VCE = 0.2 V, IC = 5.0 mA)
Vi(on)
Output Voltage (on)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
Output Voltage (off)
(VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
VOH
Input Resistor
R1
15.4
22
28.6
Resistor Ratio
R1/R2
0.8
1.0
1.2
6. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
PD, POWER DISSIPATION (mW)
400
350
300
(1) SOT−363; 1.0 x 1.0 inch Pad
(2) SOT−563; Minimum Pad
(3) SOT−963; 100 mm2, 1 oz. copper trace
250
200
(1) (2) (3)
150
100
50
0
−50
−25
0
25
50
75
100
125
150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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3
Vdc
Vdc
Vdc
Vdc
Vdc
kW
MUN5112DW1, NSBA124EDXV6, NSBA124EDP6
VCE(sat), COLLECTOR−EMITTER
VOLTAGE (V)
10
IC/IB = 10
TA = −25°C
25°C
1
75°C
0.1
0.01
40
20
60
IC, COLLECTOR CURRENT (mA)
0
80
hFE, DC CURRENT GAIN (NORMALIZED)
TYPICAL CHARACTERISTICS
MUN5112DW1, NSBA124EDXV6
1000
VCE = 10 V
TA = 75°C
100
10
10
1
Figure 3. DC Current Gain
100
IC, COLLECTOR CURRENT (mA)
f = 10 kHz
lE = 0 A
TA = 25°C
7
6
5
4
3
2
1
0
0
10
10
TA = −25°C
1
0.1
0.01
VO = 5 V
0
1
Figure 4. Output Capacitance
100
25°C
75°C
0.001
50
20
30
40
VR, REVERSE VOLTAGE (V)
Vin, INPUT VOLTAGE (V)
Cob, OUTPUT CAPACITANCE (pF)
10
8
2
3
4
5
6
7
Vin, INPUT VOLTAGE (V)
VO = 0.2 V
25°C
10
75°C
1
0
8
9
Figure 5. Output Current vs. Input Voltage
TA = −25°C
0.1
100
IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) vs. IC
9
25°C
−25°C
10
20
30
40
IC, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage vs. Output Current
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4
50
10
MUN5112DW1, NSBA124EDXV6, NSBA124EDP6
TYPICAL CHARACTERISTICS
NSBA124EDP6
1000
25°C
25°C
hFE, DC CURRENT GAIN
IC/IB = 10
150°C
0.1
−55°C
0.01
0
10
20
30
40
100
−55°C
10
10
1
100
Figure 7. VCE(sat) vs. IC
Figure 8. DC Current Gain
100
f = 10 kHz
IE = 0 A
TA = 25°C
5
4
3
2
1
10
20
30
40
−55°C
10
25°C
1
0.1
VO = 5 V
0.01
50
150°C
0
2
4
6
8
10
12
VR, REVERSE VOLTAGE (V)
Vin, INPUT VOLTAGE (V)
Figure 9. Output Capacitance
Figure 10. Output Current vs. Input Voltage
100
Vin, INPUT VOLTAGE (V)
0
0.1
IC, COLLECTOR CURRENT (mA)
6
0
1
50
IC, COLLECTOR CURRENT (mA)
7
Cob, OUTPUT CAPACITANCE (pF)
150°C
VCE = 10 V
IC, COLLECTOR CURRENT (mA)
VCE(sat), COLLECTOR−EMITTER
VOLTAGE (V)
1
25°C
10
−55°C
150°C
1
0.1
VO = 0.2 V
0
10
20
30
40
IC, COLLECTOR CURRENT (mA)
Figure 11. Input Voltage vs. Output Current
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5
50
14
MUN5112DW1, NSBA124EDXV6, NSBA124EDP6
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE W
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419B−01 OBSOLETE, NEW STANDARD 419B−02.
D
e
6
5
4
1
2
3
HE
DIM
A
A1
A3
b
C
D
E
e
L
HE
−E−
b 6 PL
0.2 (0.008)
M
E
MILLIMETERS
MIN
NOM MAX
0.80
0.95
1.10
0.00
0.05
0.10
0.20 REF
0.10
0.21
0.30
0.10
0.14
0.25
1.80
2.00
2.20
1.15
1.25
1.35
0.65 BSC
0.10
0.20
0.30
2.00
2.10
2.20
M
A3
C
A
A1
L
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
mm Ǔ
ǒinches
SC−88/SC70−6/SOT−363
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
INCHES
NOM MAX
0.037 0.043
0.002 0.004
0.008 REF
0.004 0.008 0.012
0.004 0.005 0.010
0.070 0.078 0.086
0.045 0.049 0.053
0.026 BSC
0.004 0.008 0.012
0.078 0.082 0.086
MIN
0.031
0.000
MUN5112DW1, NSBA124EDXV6, NSBA124EDP6
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A
ISSUE F
D
−X−
5
6
1
e
2
A
4
L
E
−Y−
3
b
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
DIM
A
b
C
D
E
e
L
HE
HE
C
5 PL
6
0.08 (0.003)
M
X Y
MILLIMETERS
MIN
NOM MAX
0.50
0.55
0.60
0.17
0.22
0.27
0.08
0.12
0.18
1.50
1.60
1.70
1.10
1.20
1.30
0.5 BSC
0.10
0.20
0.30
1.50
1.60
1.70
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.35
0.0531
1.0
0.0394
0.5
0.5
0.0197 0.0197
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
INCHES
NOM MAX
0.021 0.023
0.009 0.011
0.005 0.007
0.062 0.066
0.047 0.051
0.02 BSC
0.004 0.008 0.012
0.059 0.062 0.066
MIN
0.020
0.007
0.003
0.059
0.043
MUN5112DW1, NSBA124EDXV6, NSBA124EDP6
PACKAGE DIMENSIONS
SOT−963
CASE 527AD
ISSUE E
D
X
Y
6
5
4
1
2
3
HE
E
e
6X
6X
BOTTOM VIEW
DIM
A
b
C
D
E
e
HE
L
L2
C
SIDE VIEW
TOP VIEW
6X L2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
A
L
MILLIMETERS
MIN
NOM
MAX
0.34
0.37
0.40
0.10
0.15
0.20
0.07
0.12
0.17
0.95
1.00
1.05
0.75
0.80
0.85
0.35 BSC
0.95
1.00
1.05
0.19 REF
0.05
0.10
0.15
b
0.08 X Y
RECOMMENDED
MOUNTING FOOTPRINT
6X
6X
0.35
0.20
PACKAGE
OUTLINE
1.20
0.35
PITCH
DIMENSIONS: MILLIMETERS
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DTA124ED/D
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