NSC MM74C903 Hex inverting ttl, non-inverting ttl, inverting cmos, non-inverting cmos buffer Datasheet

MM54C901/MM74C901 Hex Inverting TTL Buffer
MM54C902/MM74C902 Hex Non-Inverting TTL Buffer
MM54C903/MM74C903 Hex Inverting CMOS Buffer
MM54C904/MM74C904 Hex Non-Inverting CMOS Buffer
General Description
Features
These hex buffers employ complementary MOS to achieve
wide supply operating range, low power consumption, and
high noise immunity. These buffers provide direct interface
from PMOS into CMOS or TTL and direct interface from
CMOS to TTL or CMOS operating at a reduced VCC supply.
Y
Y
Y
Y
Wide supply voltage range
Guaranteed noise margin
High noise immunity
TTL compatibility
3.0V to 15V
1.0V
0.45 VCC (typ.)
Fan out of 2
driving standard TTL
Connection Diagrams
Dual-In-Line Package
MM54C902/MM74C902
MM54C904/MM74C904
Dual-In-Line Package
MM54C901/MM74C901
MM54C903/MM74C903
TL/F/5909 – 1
Top View
Order Number MM54C901,
MM74C901, MM54C903 or MM74C903
C1995 National Semiconductor Corporation
TL/F/5909
TL/F/5909 – 2
Top View
Order Number MM54C902,
MM74C902, MM54C904 or MM74C904
RRD-B30M105/Printed in U. S. A.
MM54C901/MM74C901 (TTL), MM54C903/MM74C903 (CMOS) Hex Inverting Buffer
MM54C902/MM74C902 (TTL), MM54C904/MM74C904 (CMOS) Hex Non-Inverting Buffer
February 1988
Absolute Maximum Ratings (Note 1)
Operating Temperature Range (TA)
MM54C901, MM54C902,
MM54C903, MM54C904
MM74C901, MM74C902,
MM74C903, MM74C904
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin
b 0.3V to VCC a 0.3V
Voltage at Any Input Pin
MM54C901/MM74C901
MM54C902/MM74C902
MM54C903/MM74C903
MM54C904/MM74C904
Operating VCC Range
Absolute Maximum VCC
Lead Temperature (TL)
(Soldering, 10 seconds)
b 0.3V to a 15V
b 0.3V to a 15V
VCC b 17V to VCC a 0.3V
VCC b 17V to VCC a 0.3V
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
Small Outline
b 55§ C to a 125§ C
b 40§ C to a 85§ C
3.0V to 15V
18V
260§ C
b 65§ C to a 150§ C
700 mW
500 mW
DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
VIN(1)
Logical ‘‘1’’ Input Voltage
VCC e 5.0V
VCC e 10V
3.5
8.0
VIN(0)
Logical ‘‘0’’ Input Voltage
VCC e 5.0V
VCC e 10V
VOUT(1)
Logical ‘‘1’’ Output Voltage
VCC e 5.0V, IO e b10 mA
VCC e 10V, IO e b10 mA
VOUT(0)
Logical ‘‘0’’ Output Voltage
VCC e 5.0V
VCC e 10V
IIN(1)
Logical ‘‘1’’ Input Current
VCC e 15V, VIN e 15V
IIN(0)
Logical ‘‘0’’ Input Current
VCC e 15V, VIN e 0V
ICC
Supply Current
VCC e 15V
VIN(1)
Logical ‘‘1’’ Input Voltage
54C VCC e 4.5V
74C VCC e 4.75V
VIN(0)
Logical ‘‘0’’ Input Voltage
54C VCC e 4.5V
74C VCC e 4.75V
V
V
1.5
2.0
4.5
9.0
V
V
0.005
b 1.0
V
V
0.5
1.0
V
V
1.0
mA
b 0.005
0.05
mA
15
mA
TTL TO CMOS
VCC b 1.5
VCC b 1.5
V
V
0.8
0.8
V
V
CMOS TO TTL
VIN(1)
VIN(0)
Logical ‘‘1’’ Input Voltage
MM54C901, MM54C903
MM54C902, MM54C904
MM74C901, MM74C903
MM74C902, MM74C904
VCC
VCC
VCC
VCC
e
e
e
e
4.5V
4.5V
4.75V
4.75V
Logical ‘‘0’’ Input Voltage
MM54C901, MM54C903
MM54C902, MM54C904
MM74C901, MM74C903
MM74C902, MM74C904
VCC
VCC
VCC
VCC
e
e
e
e
4.5V
4.5V
4.75V
4.75V
VOUT(1)
Logical ‘‘1’’ Output Voltage
VOUT(0)
Logical ‘‘0’’ Output Voltage
MM54C901, MM54C903
MM54C902, MM54C904
MM74C901, MM74C903
MM74C902, MM74C904
4.0
VCC b 1.5
4.25
VCC b 1.5
1.0
1.5
1.0
1.5
54C VCC e 4.5V, IO e b800 mA
74C VCC e 4.75V, IO e b800 mA
VCC
VCC
VCC
VCC
e
e
e
e
V
V
V
V
4.5V, IO e 2.6 mA
4.5V, IO e 3.2 mA
4.75V, IO e 2.6 mA
4.75V, IO e 3.2 mA
2
2.4
2.4
V
V
V
V
V
V
0.4
0.4
0.4
0.4
V
V
V
V
DC Electrical Characteristics (Continued)
Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current)
(MM54C901/MM74C901, MM54C903/MM74C903)
ISOURCE
Output Source Current
(P-Channel)
VCC e 5.0V, VOUT e 0V
TA e 25§ C, VIN e 0V
b 5.0
mA
ISOURCE
Output Source Current
(P-Channel)
VCC e 10V, VOUT e 0V
TA e 25§ C, VIN e 0V
b 20
mA
ISINK
Output Sink Current
(N-Channel)
VCC e 5.0V, VOUT e VCC
TA e 25§ C, VIN e VCC
9.0
mA
ISINK
Output Sink Current
(N-Channel)
VCC e 5.0V, VOUT e 0.4V
TA e 25§ C, VIN e VCC
3.8
mA
(MM54C902/MM74C902, MM54C904/MM74C904)
ISOURCE
Output Source Current
(P-Channel)
VCC e 5.0V, VOUT e 0V
TA e 25§ C, VIN e VCC
b 5.0
mA
ISOURCE
Output Source Current
(P-Channel)
VCC e 10V, VOUT e 0V
TA e 25§ C, VIN e VCC
b 20
mA
ISINK
Output Sink Current
(N-Channel)
VCC e 5.0V, VOUT e VCC
TA e 25§ C, VIN e 0V
9.0
mA
ISINK
Output Sink Current
(N-Channel)
VCC e 5.0V, VOUT e 0.4V
TA e 25§ C, VIN e 0V
3.8
mA
AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
MM54C901/MM74C901, MM54C903/MM74C903
tpd1
Propagation Delay Time
to a Logical ‘‘1’’
VCC e 5.0V
VCC e 10V
38
22
70
30
ns
ns
tpd0
Propagation Delay Time
to a Logical ‘‘0’’
VCC e 5.0V
VCC e 10V
21
13
35
20
ns
ns
CIN
Input Capacitance
Any Input (Note 2)
14
pF
CPD
Power Dissipation Capacity
(Note 3) Per Buffer
30
pF
MM54C902/MM74C902, MM54C904/MM74C904
tpd1
Propagation Delay Time
to a Logical ‘‘1’’
VCC e 5.0V
VCC e 10V
57
27
90
40
ns
ns
tpd0
Propagation Delay Time
to a Logical ‘‘0’’
VCC e 5.0V
VCC e 10V
54
25
90
40
ns
ns
CIN
Input Capacitance
Any Input (Note 2)
5.0
pF
CPD
Power Dissipation Capacity
(Note 3) Per Buffer
50
pF
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note
AN-90.
3
Logic Diagrams
MM54C901/MM74C901
CMOS to TTL Inverting Buffer
MM54C903/MM74C903
PMOS to TTL or CMOS Inverting Buffer
TL/F/5909 – 3
TL/F/5909 – 4
MM54C902/MM74C902
CMOS to TTL Buffer
MM54C904/MM74C904
PMOS to TTL or CMOS Buffer
TL/F/5909 – 5
TL/F/5909 – 6
Typical Applications
PMOS to CMOS or TTL Interface
Note: VCC a VDD s 17V
VCC s 15V
TL/F/5909 – 7
CMOS to TTL or CMOS at a Lower VCC
Note: VCC1 e VCC2
TL/F/5909 – 8
4
AC Test Circuit and Switching Time Waveforms
CMOS to CMOS
TL/F/5909 – 9
Note: Delays measured with input tr, tf e 20 ns.
TL/F/5909 – 10
Typical Performance Characteristics
Typical Propagation Delay
to a Logical ‘‘0’’ for the
MM54C901/MM74C901 and
MM54C903/MM74C903
Typical Propagation Delay
to a Logical ‘‘1’’ for the
MM54C901/MM74C901 and
M54C903/MM74C903
TL/F/5909 – 13
TL/F/5909 – 11
Typical Propagation Delay
to a Logical ‘‘0’’ for the
MM54C902/MM74C902 and
MM54C904/MM74C904
Typical Propagation Delay
to a Logical ‘‘1’’ for the
MM54C902/MM74C902 and
MM54C904/MM74C904
TL/F/5909 – 14
TL/F/5909 – 12
5
MM54C901/MM74C901 (TTL), MM54C903/MM74C903 (CMOS) Hex Inverting Buffer
MM54C902/MM74C902 (TTL), MM54C904/MM74C904 (CMOS) Hex Non-Inverting Buffer
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C901J, MM74C901J, MM54C902J,
MM74C902J, MM54C903J, MM74C903J, MM54C904J or MM74C904J
NS Package Number J14A
Molded Dual-In-Line Package (N)
Order Number MM54C901N, MM74C901N, MM54C902N,
MM74C902N, MM54C903N, MM74C903N, MM54C904N or MM74C904N
NS Package Number N14A
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