MN101E56/57/76 Series
8-bit Single-chip Microcontroller
Overview
The MN101E series of 8-bit single-chip microcomputers (the memory expansion version of MN101C series) incorporate multiple types
of peripheral functions. This chip series is well suited for camera, VCR, MD, TV, CD, LD, printer, telephone, home automation, pager, air
conditioner, PPC, fax machine, music instrument and other applications.
This LSI brings to embedded microcomputer applications flexible, optimized hardware configurations and a simple efficient instruction
set. MN101EF57 series has an internal 128 KB of ROM and 6 KB of RAM. Peripheral functions include 5 external interrupts, 29 internal
interrupts including NMI, 12 timer counters, 4 types of serial interfaces, A/D converter, D/A converter, LCD driver, 2 types of watchdog
timer, data automatic function and buzzer output. The system configuration is suitable for in camera, timer selector for VCR, CD player, or
minicomponent.
With 5 oscillation systems (high-speed (internal frequency: 20 MHz), high-speed (crystal/ceramic frequency: max. 10 MHz) / low-speed
(internal frequency: 30 kHz), low-speed (crystal/ceramic frequency: 32.768 kHz) and PLL: frequency multiplier of high frequency) contained
on the chip, the system clock can be switched to high-speed frequency input (NORMAL mode), PLL input (PLL mode), or to low-speed
frequency input (SLOW mode). The system clock is generated by dividing the oscillation clock or PLL clock. The best operation clock for the
system can be selected by switching its frequency ratio by programming. High speed mode has the normal mode which is based on the clock
dividing fpll, (fpll is generated by original oscillation and PLL), by 2 (fpll/2), and the double speed mode which is based on the clock not
dividing fpll.
A machine cycle (minimum instruction execution time) in the normal mode is 200 ns when the original oscillation fosc is 10 MHz (PLL is not
used). A machine cycle in the double speed mode, in which the CPU operates on the same clock as the external clock, is 100 ns when fosc is
10 MHz. A machine cycle in the PLL mode is 50 ns (maximum).
Product Summary
This datasheet describes the following model.
Model
ROM Size
RAM Size
MN101EF76K
256 KB
10 KB
MN101EF57G
128 KB
6 KB
MN101EF56K
256 KB
10 KB
Classification
Package
LQFP128-P-1818C
Flash EEPROM version
LQFP080-P-1414A
TQFP080-P-1212F
QFP100-P-1818B
Note) DMOD internal pull-up resistor is in only Flash EEPROM version.
When using In-circuit Emulator, it is necessary to connect the pull-up resistor on the circuit board.
Publication date: February 2014
Ver. BEM
1
MN101E56/57/76 シリーズ
Features
ROM / RAM capacity
MN101EF76K: ROM 256 KB / RAM 10 KB
MN101EF57G: ROM 128 KB / RAM 6 KB
MN101EF56K: ROM 256 KB / RAM 10 KB
Package:
MN101EF76K: LQFP128-P-1818C (18 mm × 18 mm / 0.5 mm pitch)
MN101EF57G: LQFP080-P-1414A (14 mm × 14 mm / 0.65 mm pitch)
TQFP080-P-1212F (12 mm × 12 mm / 0.5 mm pitch)
MN101EF56K: QFP100-P-1818B (18 mm × 18 mm / 0.65 mm pitch)
Machine Cycle:
High-speed mode
0.05 ms / 20 MHz (2.7 V to 5.5 V)
0.125 ms / 8 MHz (1.8 V to 5.5 V)
Low-speed mode
62.5 ms / 32 kHz (1.8 V to 5.5 V)
Clock Gear Circuit:
Internal system clock speed is changeable by selecting division ratio of oscillation clock. (Divided by 1, 2, 4, 16, 32, 64, 128)
Oscillation Circuit: 4 types
High-speed (Internal oscillation: frc), High-speed (crystal/ceramic: fosc),
Low-speed (Internal oscillation: frcs), Low-speed (crystal/ceramic: fx)
High-speed internal oscillation 20 MHz / 16 MHz (selectable)
Low-speed internal oscillation 30 kHz
Clock Multiplication Circuit:
PLL circuit output clock (fpll) fosc multiplied by 2, 3, 4, 5, 6, 8, 10,1/2 × frc multiplied by 4, 5 enabled
* When clock multiplication circuit is not used, fpll = fosc or fpll = frc
* Selectable from high-speed clock for peripheral functions (fpll-div) fpll, fpll divided by 2, 4, 8, 16
Memory bank
Data memory space is expanded by the bank system.
Bank for the source address / Bank for the destination address.
Operation Mode
NORMAL mode (high-speed mode)
PLL mode
SLOW mode (low-speed mode)
HALT mode
STOP mode
and operation clock switching
Operating Voltage
1.8 V to 5.5 V
Operating Ambient Temperature:
-40°C to +85°C
Ver. BEM
2
MN101E56/57/76 シリーズ
Features (continued)
Interrupts
MN101EF76K
36 sets
MN101EF57G
34 sets
MN101EF56K
36 sets
Timer 0 interrupt
Timer 1 interrupt
Timer 2 interrupt
Timer 3 interrupt
Timer 4 interrupt
Timer 6 interrupt
Timer 7 interrupt
Time-base interrupt
Timer 7 compare register 2 match interrupt
Timer 8 interrupt
Timer 8 compare register 2 match interrupt
PWM overflow interrupt
PWM under flow interrupt
Timer 9 compare register 2 match interrupt
24H timer interrupt
Alarm match interrupt
LIN interrupt
Serial 0 interrupt
Serial 0 UART reception interrupt
Serial 1 interrupt
Serial 1 UART reception interrupt
Serial 2 interrupt
Serial 2 UART reception interrupt
Interrupts
Overrun interrupt
Non-maskable interrupt (NMI)
Timer interrupt
Serial interrupt
Serial 3 interrupt
Serial 3 UART reception interrupt
Serial 4 interrupt
Serial 4 stop condition interrupt
IRQ0 (Edge selection, noise filter connectable)
IRQ1 (Edge selection, noise filter connectable)
IRQ2 (Edge selection, both edge interrupt, noise filter connectable)
IRQ3 (Edge selection, both edge interrupt, noise filter connectable)
IRQ4 (Edge selection, both edge interrupt, noise filter connectable,
KEY scan interrupt)
A/D interrupt
A/D conversion interrupt
Data automatic transfer interrupt
ATC1 interrupt
Low voltage detection interrupt
Low voltage detection interrupt
External interrupt
Ver. BEM
3
MN101E56/57/76 シリーズ
Features (continued)
Timer Counter:
12 sets
General-purpose 8-bit timer × 5 sets
General-purpose 16-bit timer × 2 sets
General-purpose 16-bit timer × 2 sets
Motor control 16-bit timer × 1 set
8-bit free-run timer × 1 set
Time-base timer × 1 set
Baud rate timer × 1 set
24H timer × 1 set
Timer 0 (General-purpose 8-bit timer)
Square wave output (Timer pulse output), added pulse (2 bits) type PWM output can be output to large current pin TM0IOB,
event count, simple pulse width measurement
Double-buffered compare register (×1)* Function in MN101EF76K and MN101EF56K
Clock source:
fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-div/64, fpll-div/128, fs/2, fs/4, fs/8, fslow, external clock, timer A output
Real-time control:
Timer (PWM) output is controlled among the three values: "Fixed to High", "Fixed to Low", or "Hi-Z" at falling edge of external
interrupt 0 (IRQ0)
Timer 1 (General-purpose 8-bit timer)
Square wave output (Timer pulse output), event count
16-bit cascade connection (connected with timer 0)
Double-buffered compare register (×1)* Function in MN101EF76K and MN101EF56K
Clock source:
fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-div/64, fpll-div/128, fs/2, fs/4, fs/8, fslow, external clock, timer A output
Timer 2 (General-purpose 8-bit timer)
Square wave output (Timer pulse output), added pulse (2 bits) type PWM output can be output to large current pin TM2IOB,
event count, simple pulse width measurement,
24-bit cascade connection (connected with timer 0, 1), timer synchronous output
Double-buffered compare register (×1)
Clock source:
fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-div/64, fpll-div/128, fs/2, fs/4, fs/8, fslow, external clock, timer A output
Real-time control:
Timer (PWM) output is controlled among the three values: "Fixed to High", "Fixed to Low", or "Hi-Z" at falling edge of external
interrupt 0 (IRQ0)
Timer 3 (General-purpose 8-bit timer)
Square wave output (Timer pulse output), event count
16-bit cascade connection (connected with timer 2), 32-bit cascade connection (connected with timer 0, 1, 2)
Double-buffered compare register (×1)
Clock source:
fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-div/64, fpll-div/128, fs/2, fs/4, fs/8, fslow, external clock, timer A output
Timer 4 (General-purpose 8-bit timer)
Square wave output (Timer pulse output), added pulse (2bit) type PWM output, event count, simple pulse width measurement
Clock source:
fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-div/64, fpll-div/128, fs/2, fs/4, fs/8, fslow, external clock, timer A output
Ver. BEM
4
MN101E56/57/76 シリーズ
Features (continued)
Timer Counter (continued)
Timer 6 (8-bit free-run timer, time-base timer)
8-bit free-run timer
Clock source:
fpll-div, fpll-div/22, fpll-div/23, fpll-div/212, fpll-div/213, fs, fslow, fslow/22, fslow/23, fslow/212, fslow/213
Time-base timer
Interrupt generation cycle:
fpll-div/27, fpll-div/28, fpll-div/29, fpll-div/210, fpll-div/213, fpll-div/215, fslow/27, fslow/28, fslow/29, fslow/210, fslow/213,
fslow/215
Timer 7 (General-purpose 16-bit timer)
Clock source:
fpll-div, fs, external clock, timer A output, serial 0 transfer clock output, timer 6 compare match cycle divided by 1, 2, 4, 16
Hardware configuration:
Double-buffered compare register (×2)
Double-buffered input capture register (×2)
Timer interrupt (×2 vector)
Timer function:
Square wave output (Timer pulse output), high-precision PWM output (cycle/duty continuous changeable) can be output to large
current pin TM7IOB, timer synchronous output, event count, input capture function (both edges operable)
Real-time control:
Timer (PWM) output is controlled among the three values: "Fixed to High", "Fixed to Low", or "Hi-Z" at falling edge of external
interrupt 0 (IRQ0)
Timer 8 (General-purpose 16-bit timer)
Clock source:
fpll-div, fs, external clock, timer A output, timer 6 compare match cycle divided by 1, 2, 4, 16
Hardware configuration:
Double-buffered compare register (×2)
Double-buffered input capture register (×1)
Timer interrupt (×2 vector)
Timer function:
Square wave output (Timer pulse output), high-precision PWM output (cycle/duty continuous changeable) can be output to large
current pin TM8IOB, event count, pulse width measurement, input capture function (both edges operable)
32-bit cascade connection (connected with timer 7), 32-bit PWM output, input capture is available in 32-bit cascade
Timer 9 (Motor control 16-bit timer)
Clock source:
fpll-div, fs, external clock, Timer A output divided by 1, 2, 4, 16
Hardware configuration:
Double-buffered compare register (×2)
Timer interrupt (×3 vector)
Timer function:
Square wave output (Timer pulse output) can be changed to large current output, complementary
3-phase PWM output, triangle wave and saw tooth wave are supported, dead time insertion available, event count
Pin output control:
PWM output control is possible by external interrupt 0 to 4 (IRQ 0 to 4) ("Hi-z", output data fixed)
Timer A (baud rate timer)
Clock output for peripheral functions
Clock source:
fpll-div divided by 1/1, 2, 4, 8, 16, 32, and fs divided by 2, 4
Ver. BEM
5
MN101E56/57/76 シリーズ
Features (continued)
Timer Counter (continued)
24H timer
Clock source (Usable frequency)
fpll (4 MHz, 4.19 MHz, 5 MHz, 8 MHz, 8.38 MHz, 10 MHz, 16 MHz, 16.77 MHz, 20 MHz), fx (32.768 kHz),
frc (20 MHz, 16 MHz), frcs (30 kHz)
Hardware configuration:
0.5 seconds counter, minute counter, hour counter
Alarm compare register (in 0.5 seconds, in minutes, in hours) (×1)
Timer interrupt (×2 vector)
Timer function:
Interval function (interrupts every 0.5 seconds, 1 second, 1 minute, 1 hour, 24 hours)
Alarm function
Watchdog timer
Overrun detection cycle is selectable from fs/216, fs/218, fs/220
Forced to reset inside LSI by hardware when a software processing error is detected twice
Watchdog timer2
Overrun detection cycle is selectable from frcs/24, frcs/25, frcs/26, frcs/27, frcs/28, frcs/29, frcs/210, frcs/211, frcs/212, frcs/213, frcs/214,
frcs/215
Forced to reset inside LSI by hardware when a software processing error is detected twice
Synchronous output function (Timer synchronous output, interrupt synchronous output)
Latch data is output from port 8 at the event timing of synchronous output signal of timer 1, timer 2,
timer 7, or external interrupt2 (IRQ2)
Buzzer Output
Output frequency can be selected from fpll-div/29, fpll-div/210, fpll-div/211, fpll-div/212, fpll-div/213, fpll-div/214, fslow/23, fslow/24
A/D converter
MN101EF76K: 10-bit × 24 channels
MN101EF57G: 10-bit × 12 channels
MN101EF56K: 10-bit × 24 channels
D/A converter
MN101EF76K: 8-bit × 4 channels
MN101EF57G: 8-bit × 2 channels
MN101EF56K: 8-bit × 4 channels
Data automatic transfer: 1 system
Data is automatically transferred in all memory space
External interrupt activation/internal event activation/software activation
Max. 255 byte continuous transfer
Serial continuous transmission and reception is supported
Burst transfer function (Including interrupt emergency stop)
Ver. BEM
6
MN101E56/57/76 シリーズ
Features (continued)
Serial interface
MN101EF76K: 5 systems
MN101EF57G: 4 systems
MN101EF56K: 5 systems
Serial interface 0 (Hardware LIN / Full duplex UART / Synchronous serial interface)
Synchronous serial interface
Transfer clock source:
fpll-div/2, fpll-div/4, fpll-div/16, fpll-div/64, fs/2, fs/4, Timer 0 to 4, Timer A output divided by 1, 2, 4, 8, 16, External clock
MSB/LSB first selectable, 1 to 8 bits of arbitrary transfer
Continuous transmission, continuous reception, continuous transmission and reception are available.
Full duplex UART (Baud rate timer: selected from timer 0 to 4, or timer A)
Parity check, overrun error/framing error are detected
Transfer bits 7 to 8 are selectable
Hardware LIN
Synch Break generation, Wake-up detection, Synch Break detection, Synch Field measurement are available
Serial interface 1 (Full duplex UART / Synchronous serial interface)
Synchronous serial interface
Transfer clock source:
fpll-div/2, fpll-div/4, fpll-div/16, fpll-div/64, fs/2, fs/4,Timer 0 to 4, Timer A output divided by 1, 2, 4, 8, 16, External clock
MSB/LSB first selectable, 1 to 8 bits of arbitrary transfer
Continuous transmission, continuous reception, continuous transmission and reception are available.
Full duplex UART (Baud rate timer: selected from timer 0 to 4, or timer A)
Parity check, overrun error/framing error are detected
Transfer bits 7 to 8 are selectable
Serial interface 2 (Full duplex UART / Synchronous serial interface)
Synchronous serial interface
Transfer clock source:
fpll-div/2, fpll-div/4, fpll-div/16, fpll-div/64, fs/2, fs/4, Timer 0 to 4, Timer A output divided by 1, 2, 4, 8, 16, External clock
MSB/LSB first selectable, 1 to 8 bits of arbitrary transfer
Continuous transmission, continuous reception, continuous transmission and reception are available.
Full duplex UART (Baud rate timer: selected from timer 0 to 4, or timer A)
Parity check, overrun error/framing error are detected
Transfer bits 7 to 8 are selectable
Serial interface 3 (Full duplex UART / Synchronous serial interface) * Function in MN101EF76K and MN101EF56K
Synchronous serial interface
Transfer clock source:
fpll-div/2, fpll-div/4, fpll-div/16, fpll-div/64, fs/2, fs/4, Timer 0 to 4, Timer A output divided by 1, 2, 4, 8, 16, External clock
MSB/LSB first selectable, 1 to 8 bits of arbitrary transfer
Continuous transmission, continuous reception, continuous transmission and reception are available.
Full duplex UART (Baud rate timer: selected from timer 0 to 4, or timer A)
Parity check, overrun error/framing error are detected
Transfer bits 7 to 8 are selectable
Ver. BEM
7
MN101E56/57/76 シリーズ
Features (continued)
Serial interface (continued)
Serial interface 4 (Multi master IIC / Synchronous serial interface)
Synchronous serial interface
Transfer clock source:
fpll-div/2, fpll-div/4, fpll-div/8, fpll-div/32, fs/2, fs/4, Timer 0 to 4, Timer A output divided by 1, 2, 4, 8, 16, External clock
MSB/LSB first selectable, 1 to 8 bits of arbitrary transfer
Continuous transmission, continuous reception, continuous transmission and reception are available.
Multi master IIC
7, 10-bit slave address is settable
General call communication mode is supported
Auto reset circuit
Low voltage detection circuit
Clock Monitoring Function
LED driver: 8 sets
LCD driver
Segment output
MN101EF76K: Max. 55 pins (SEG0 to SEG54)
MN101EF57G: Max. 41 pins (SEG0 to SEG40)
MN101EF56K: Max. 55 pins (SEG0 to SEG54)
Segment output pins can be switched to I/O ports in 1 bit.
* At reset, Segment outputs are input ports.
Common output: 4 pins
COM0 to 3 can be switched to I/O ports in 1 bit.
Display mode selection
Static
1/2 duty, 1/2 bias
1/3 duty, 1/3 bias
1/4 duty, 1/3 bias
LCD driver clock
When the source clock is the main clock (fpll)
1/218, 1/217, 1/216, 1/215, 1/214, 1/213, 1/212, 1/211
When the source clock is the sub clock (fslow)
1/29, 1/28, 1/27, 1/26
Timer 0 to 4, Timer A output
LCD power supply
LCD power supply is separated from VDD5 . (can be used when VLC1 ≤ VDD5)
External power supply voltage can be selectable. (Supply voltage is supplied from VLC1, VLC2, and VLC3)
Internal dividing resistors (External power supply voltage is divided the voltage input to VLC1 by internal resistors.)
Ver. BEM
8
MN101E56/57/76 シリーズ
Features (continued)
Ports
Ports
I/O ports
LCD segment
MN101EF76K
(pins)
104
MN101EF57G
(pins)
70
MN101EF56K
(pins)
90
55
41
55
LCD common
4
4
4
Serial interface communication
30
21
30
Timer I/O
34
21
28
Buzzer output
4
2
4
A/D input
24
16
24
External interrupt
10
5
5
LCD power supply
3
3
3
LED driver (high-current)
8
8
8
High-speed oscillation
2
2
2
Low-speed oscillation
2
2
2
D/A output
4
2
4
Special function pins
10
10
10
Operation mode input
3
3
3
Reset input
1
1
1
Analog reference voltage input
1
1
1
Power supply
4
4
4
Ver. BEM
9
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
TM0IOA/AN0/PA0
TM1IOA/AN1/PA1
TM2IOA/AN2/PA2
TM3IOA/AN3/PA3
TM4IOA/AN4/PA4
TM7IOA/AN5/PA5
TM8IOA/AN6/PA6
TM9IOA/AN7/PA7
VREF+
ATRST
NRST/P27
XI/P90
XO/P91
VSS
OSC1/P25
OSC2/P26
VDD5
MMOD
VDD18
DMOD
RON
VSS
IRQ0B/PC0
IRQ1B/PC1
IRQ2B/PC2
IRQ3B/PC3
IRQ4B/PC4
PC5
PC6
OCD_DATA/LED0/P00
OCD_CLK/TM9IOB/LED1/P01
RXD0A/SBI0A/TM7IOB/LED2/P02
N.C.
N.C.
N.C.
TXD0A/SBO0A/TM8IOB/LED3/P03
SBT0A/TM2IOB/TM0IOB/LED4/P04
TXD3A/SBO3A/LED5/P05
RXD3A/SBI3A/LED6/P06
SBT3A/DA_D/LED7/P07
ACZ0/IRQ0A/P20
ACZ1/IRQ1A/P21
IRQ2A/P22
IRQ3A/P23
IRQ4A/P24
SDO7/VLC1/P87
SDO6/VLC2/P86
TM9OD5A/SDO5/VLC3/P85
TM9OD4A/SDO4/COM3/P84
TM9OD3A/SDO3/COM2/P83
TM9OD2A/SDO2/COM1/P82
TM9OD1A/SDO1/COM0/P81
TM9OD0A/SDO0/SEG0/P80
SBT1B/KEY7/SEG1/P77
RXD1B/SBI1B/KEY6/SEG2/P76
TXD1B/SBO1B/KEY5/SEG3/P75
KEY4/SEG4/P74
KEY3/SEG5/P73
SCL4A/SBT4A/KEY2/SEG6/P72
SDA4A/SBO4A/KEY1/SEG7/P71
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
PB0/AN8
PB1/AN9
PB2/AN10
PB3/SEG54/AN11
PB4/SEG53/AN12
PB5/SEG52/AN13
PB6/SEG51/AN14
PB7/SEG50/AN15
P95/SEG49/AN16/DA_A
P94/SEG48/AN17/DA_B
P93/SEG47/AN18
P92/SEG46/AN19
P10/SEG45/AN20/TM0IOC
P11/SEG44/AN21/TM2IOC
P12/SEG43/AN22/TM1IOC
P13/SEG42/AN23/TM3IOC
P14/SEG41/TM4IOC
P15/SEG40/TM7IOC/BUZZERB
P16/SEG39/TM8IOC/NBUZZERB
P30/SEG38/SBO2B/TXD2B
P31/SEG37/SBI2B/RXD2B
P32/SEG36/SBT2B
P33/SEG35/SBO4B/SDA4B
P34/SEG34/SBT4B/SCL4B
P35/SEG33/SBI4B
N.C.
N.C.
N.C.
MN101E56/57/76 シリーズ
Pin Description
MN101EF76K (LQFP128-P-1818C)
MN101EF76K
(128LQFP Top View)
Ver. BEM
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
P36/SEG32
P40/SEG31/SBO3B/TXD3B
P41/SEG30/SBI3B/RXD3B
P42/SEG29/SBT3B
P43/SEG28/SBO0B/TXD0B
P44/SEG27/SBI0B/RXD0B
P45/SEG26/SBT0B
P46/SEG25
P47/SEG24
PD0/TM9OD0B
PD1/TM9OD1B
PD2/TM9OD2B
PD3/TM9OD3B
PD4/TM9OD4B
PD5/TM9OD5B
PD6
P57/SEG23/BUZZERA
P56/SEG22/NBUZZERA
P55/SEG21
P54/SEG20
P53/SEG19
P52/SEG18/SBT1A
P51/SEG17/SBI1A/RXD1A
P50/SEG16/SBO1A/TXD1A
P61/SEG15/DA_C
P62/SEG14/TM1IOB
P63/SEG13/TM3IOB
P64/SEG12/TM4IOB
P65/SEG11/SBO2A/TXD2A
P66/SEG10/SBI2A/RXD2A
P67/SEG9/SBT2A
P70/SEG8/KEY0/SBI4A
10
MN101E56/57/76 シリーズ
Pin Description (continued)
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
PB0/SEG37/AN8
AN9
PB1/SEG36/
PB2/SEG35/AN10
PB3/SEG34/AN11
P94/SEG33/AN12/DA_A
P93/SEG32/AN13
P92/SEG31/AN14
P33/SEG30/AN15/SBO4B/SDA4B
P34/SEG29/SBT4B/SCL4B
P35/SEG28/SBI4B
P43/SEG27/SBO0B/TXD0B
P44/SEG26/SBI0B/RXD0B
P45/SEG25/SBT0B
P46/SEG24
P47/SEG23
P57/SEG22/BUZZERA
P56/SEG21/NBUZZERA
P55/SEG20
P54/SEG19
P53/SEG18
MN101EF57G (LQFP080-P-1414A, TQFP080-P-1212F)
MN101EF57G
(80LQFP/TQFP Top View)
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
P52/SEG17/SBT1A
P51/SEG16/SBI1A/RXD1A
P50/SEG15/SBO1A/TXD1A
P62/SEG14/TM1IOB
P63/SEG13/TM3IOB
P64/SEG12/TM4IOB
P65/SEG11/SBO2A/TXD2A
P66/SEG10/SBI2A/RXD2A
P67/SEG9/SBT2A
P70/SEG8/KEY0/SBI4A
P71/SEG7/KEY1/SBO4A/SDA4A
P72/SEG6/KEY2/SBT4A/SCL4A
P73/SEG5/KEY3
P74/SEG4/KEY4
P75/SEG3/KEY5/SBO1B/TXD1B
P76/SEG2/KEY6/SBI1B/RXD1B
P77/SEG1//KEY7/SBT1B
P80/SEG0/SDO0/TM9OD0
P81/COM0/SDO1/TM9OD1
P82/COM1/SDO2/TM9OD2
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
RON
VSS
OCD_DATA/LED0/P00
OCD_CLK/TM9IOB/LED1/P01
RXD0A/SBI0A/TM7IOB/LED2/P02
TXD0A/SBO0A/TM8IOB/LED3/P03
SBT0A/TM2IOB/TM0IOB/LED4/P04
LED5/P05
LED6/P06
DA_B/LED7/P07
ACZ0/IRQ0/P20
ACZ1/IRQ1/P21
IRQ2/P22
IRQ3/P23
IRQ4/P24
SDO7/VLC1/P87
SDO6/VLC2/P86
TM9OD5/SDO5/VLC3/P85
TM9OD4/SDO4/COM3/P84
TM9OD3/SDO3/COM2/P83
TM0IOA/AN0/SEG38/PA0
TM1IOA/AN1/SEG39/PA1
TM2IOA/AN2/SEG40/PA2
TM3IOA/AN3/PA3
TM4IOA/AN4/PA4
TM7IOA/AN5/PA5
TM8IOA/AN6/PA6
TM9IOA/AN7/PA7
VREF+
ATRST
NRST/P27
XI/P90
XO/P91
VSS
OSC1/P25
OSC2/P26
VDD5
MMOD
VDD18
DMOD
Ver. BEM
11
TM0IOA/AN0/PA0
TM1IOA/AN1/PA1
TM2IOA/AN2/PA2
TM3IOA/AN3/PA3
TM4IOA/AN4/PA4
TM7IOA/AN5/PA5
TM8IOA/AN6/PA6
TM9IOA/AN7/PA7
VREF+
ATRST
NRST/P27
XI/P90
XO/P91
VSS
OSC1/P25
OSC2/P26
VDD5
MMOD
VDD18
DMOD
RON
VSS
OCD_DATA/LED0/P00
OCD_CLK/TM9IOB/LED1/P01
RXD0A/SBI0A/TM7IOB/LED2/P02
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
TXD0A/SBO0A/TM8IOB/LED3/P03
SBT0A/TM2IOB/TM0IOB/LED4/P04
TXD3A/SBO3A/LED5/P05
RXD3A/SBI3A/LED6/P06
SBT3A/DA_D/LED7/P07
ACZ0/IRQ0/P20
ACZ1/IRQ1/P21
IRQ2/P22
IRQ3/P23
IRQ4/P24
SDO7/VLC1/P87
SDO6/VLC2/P86
TM9OD5/SDO5/VLC3/P85
TM9OD4/SDO4/COM3/P84
TM9OD3/SDO3/COM2/P83
TM9OD2/SDO2/COM1/P82
TM9OD1/SDO1/COM0/P81
TM9OD0/SDO0/SEG0/P80
SBT1B/KEY7/SEG1/P77
RXD1B/SBI1B/KEY6/SEG2/P76
TXD1B/SBO1B/KEY5/SEG3/P75
KEY4/SEG4/P74
KEY3/SEG5/P73
SCL4A/SBT4A/KEY2/SEG6/P72
SDA4A/SBO4A/KEY1/SEG7/P71
PB0/AN8
PB1/AN9
PB2/AN10
PB3/SEG54/AN11
PB4/SEG53/AN12
PB5/SEG52/AN13
PB6/SEG51/AN14
PB7/SEG50/AN15
P95/SEG49/AN16/DA_A
P94/SEG48/AN17/DA_B
P93/SEG47/AN18
P92/SEG46/AN19
P10/SEG45/AN20/TM0IOC
P11/SEG44/AN21/TM2IOC
P12/SEG43/AN22/TM1IOC
P13/SEG42/AN23/TM3IOC
P14/SEG41/TM4IOC
P15/SEG40/TM7IOC/BUZZERB
P16/SEG39/TM8IOC/NBUZZERB
P30/SEG38/SBO2B/TXD2B
P31/SEG37/SBI2B/RXD2B
P32/SEG36/SBT2B
P33/SEG35/SBO4B/SDA4B
P34/SEG34/SBT4B/SCL4B
P35/SEG33/SBI4B
MN101E56/57/76 シリーズ
Pin Description (continued)
MN101EF56K (QFP100-P-1818B)
MN101EF56K
(100QFP Top View)
Ver. BEM
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
P36/SEG32
P40/SEG31/SBO3B/TXD3B
P41/SEG30/SBI3B/RXD3B
P42/SEG29/SBT3B
P43/SEG28/SBO0B/TXD0B
P44/SEG27/SBI0B/RXD0B
P45/SEG26/SBT0B
P46/SEG25
P47/SEG24
P57/SEG23/BUZZERA
P56/SEG22/NBUZZERA
P55/SEG21
P54/SEG20
P53/SEG19
P52/SEG18/SBT1A
P51/SEG17/SBI1A/RXD1A
P50/SEG16/SBO1A/TXD1A
P61/SEG15/DC_C
P62/SEG14/TM1IOB
P63/SEG13/TM3IOB
P64/SEG12/TM4IOB
P65/SEG11/SBO2A/TXD2A
P66/SEG10/SBI2A/RXD2A
P67/SEG9/SBT2A
P70/SEG8/KEY0/SBI4A
12
Request for your special attention and precautions in using the technical information and
semiconductors described in this book
(1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and
regulations of the exporting country, especially, those with regard to security export control, must be observed.
(2) The technical information described in this book is intended only to show the main characteristics and application circuit examples
of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any
other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any
other company which may arise as a result of the use of technical information described in this book.
(3) The products described in this book are intended to be used for general applications (such as office equipment, communications
equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book.
Consult our sales staff in advance for information on the following applications:
– Special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment,
life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of
the products may directly jeopardize life or harm the human body.
It is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with
your using the products described in this book for any special application, unless our company agrees to your using the products in
this book for any special application.
(4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product
Standards in advance to make sure that the latest specifications satisfy your requirements.
(5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions
(operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute
maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any
defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure
mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire
or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products.
(6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS,
thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which
damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages.
(7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company.
20100202