AN2650 Application note L9942 stepper motor driver for bipolar stepper motors Introduction The L9942 is an integrated stepper motor driver for bipolar stepper motors. The device is designed for automotive applications, such as headlamp leveling, steerable lights and adaptive front lighting. Other applications, such as ventilation and air conditioning flap and throttle positioning are also possible uses for the L9942. The device drives bipolar stepper motors with high-efficiency and smooth operation. Microstepping is the preferred mode to provide low-noise operation since this technique eliminates the effects of mechanical resonances, which can lower the motor torque. A motor stall detection capability allows position alignment without an external sensor, while its step counter is addressable via an SPI as well as by a separate input, to prevent the SPI overloading when running multiple motors simultaneously. December 2013 DocID14109 Rev 3 1/26 www.st.com Contents AN2650 Contents 1 2 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 Calculation of the buffer capacitor Cbuffer . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2 Low drop reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Shorted coil detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 3 4 5 6 7 8 2/26 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1 Fault bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 SPI communication monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Decay modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.1 Slow decay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2 Fast Decay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.3 Advanced decay modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.3.1 Mixed decay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.3.2 Auto decay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Stall detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1 Internal functionality (simplified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2 How to determine the stall threshold at bench test . . . . . . . . . . . . . . . . . 19 Duty cycle for current regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.1 Minimum duty cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.2 Maximum duty cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.1 Static ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.2 Static freewheeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.3 Dynamic slew rate power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.4 Power dissipation for one PWM phase . . . . . . . . . . . . . . . . . . . . . . . . . . 22 PCB footprint proposal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 DocID14109 Rev 3 AN2650 9 Contents Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 DocID14109 Rev 3 3/26 3 List of tables AN2650 List of tables Table 1. Table 2. 4/26 Phase counter values for fast decay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 DocID14109 Rev 3 AN2650 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Application schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Low drop reverse polarity protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Stepping modes (Auto decay mode, fast decay without delay time) . . . . . . . . . . . . . . . . . 10 Auto decay, fast decay without delay time at phase 0 and 8 . . . . . . . . . . . . . . . . . . . . . . . 11 SPI transfer timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Slow decay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Fast decay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Mixed decay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Auto decay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Stall detection function overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Cross current protection time and slew rate for maximum DC . . . . . . . . . . . . . . . . . . . . . . 20 Current flow and voltage drop during fast decay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Power SSO24 solder mask layout (all values in mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Power SSO24 solder mask opening (all values in mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 DocID14109 Rev 3 5/26 5 Typical application schematic 1 AN2650 Typical application schematic Figure 1. Application schematic diagram Vbat Vs Vreg 5V 100n Cbuffer 100n µC 19 16 Vcc CP out 9 STEP out 21 EN in 8 PWM in 7 DO out 5 DI out 4 CLK out 6 CSN 20 RREF 6k8 3 15 22 Vs 10 Vs QA 1 2 QA 2 23 2n2 2n2 L9942 GND TEST PGND 17 18 1 12 GND QB 1 11 QB 2 14 2n2 PGND 13 24 SM 2n2 PGND The L9942 is driven by a microcontroller via the SPI (DO, DI, CLK, and CSN), STEP and EN pins. Additional information is provided from the PWM pin. The stepper motor driver is supplied from a 5 V voltage regulator and the reverse polarity protected Vs. It is necessary to use a stabilization capacitor (with a minimum value of minimum 100 nF) as close as possible at the Vcc pin. For the stabilization of the Vs supply pin and to absorb motor energy, an electrolytic capacitor Cbuffer, with a minimum value as calculated in Section 1.1, must be used. Because the motor currents are supplied via the Vs-pins, all Vs-pins must have a low ohmic connection to the supply voltage Vs. For the same reason, all GND and PGND pins must have a low ohmic connection to the system ground. A star ground concept with separate lines for GND and PGND is recommended. At the charge pump pin, a capacitor with 100 nF to Vs is recommended. To improve the EMI behavior, it is recommended to have 2.2 nF capacitors as close as possible to the motor output pins, Qxy. Short motor connection wires also improve the EMI behavior. The internally-used reference voltage depends upon the value of the reference resistor, positioned between the pin RREF and GND. Consequently, the precision of the L9942 depends upon the value of the reference resistor. One possible value for this resistor is 6.8 kΩ. 6/26 DocID14109 Rev 3 AN2650 Typical application schematic Due to the structure of the BCD process, the slug of the device is connected internally to PGND and must also be connected externally to PGND. 1.1 Calculation of the buffer capacitor Cbuffer The stepper motor driver L9942 is usually designed in an environment similar to that shown in Figure 1. During motor operation, electrical energy is stored in the motor coils. If the motor shuts down, this energy is fed back to the supply voltage Vs. Thus, there is a voltage increase at Vs, which may cause an electrical overstress of the L9942. To avoid damage to the L9942, the value of the buffer capacitor Cbuffer must be chosen carefully. The energy balance can be calculated from: 2 2 2 1 1 1 --- ⋅ C buffer ⋅ V s1 + --- ⋅ L motor ⋅ I motor ≈ --- ⋅ C buffer ⋅ V s2 2 2 2 L motor 2 2 2 V s1 + ------------------- ⋅ I motor = V s2 C buffer V s2 = L motor 2 2 V s1 + ------------------- ⋅ I motor C buffer From this equation, it is possible to conclude: Note: • The voltage Vs2 must not exceed the maximum rating of the L9942 • If an over voltage shut down must be avoided, the voltage Vs2 must not exceed the minimum over voltage threshold. As a general recommendation, STMicroelectronics recommend a minimum buffer capacitor of 47 µF. The ripple at Vs during normal motor operation should be between 5% and 10%. DocID14109 Rev 3 7/26 25 Typical application schematic 1.2 AN2650 Low drop reverse polarity protection Figure 2. Low drop reverse polarity protection Vbat 100k STD17NF03LT4 100k 100n 16 CP 3 10 Vs Vs 15 22 Vs Cbuffer L9942 Vreg L9942 As shown in Figure 2 the charge pump pin can be used for a low drop reverse polarity protection. The charge pump pin can also be used for other devices in the same application. Because of the additional gate capacity, the charge pump ramps up more slowly than without the additional MOSFET gate. 8/26 DocID14109 Rev 3 AN2650 2 Shorted coil detection Shorted coil detection During free-wheeling time, the L9942 can use several decay modes that are programmable by the SPI. However, only on Auto decay, fast decay without delay time it is possible to detect shorted coil because, during free-wheeling time, both opposite transistors (HS and LS) are switched on and high current can rise. During free wheeling the current in the output stage is monitored, but not regulated, with PWM. Because of this, the short overcomes the over current filter time and can be detected. In other decay modes, the decay can periodically change during wheeling of the motor (for example, every 200 ms) to Auto decay, fast decay without delay time for few microseconds and than change it back to previous value. This can be done in one clock step. The decay mode cannot be changed at all values of the phase counter because fast decay is not active during the whole period but only during decreasing current phase in the coil (during the rising current phase, the coil is active slow decay mode). A detailed explanation of Auto decay, fast decay without delay time for all step modes is given in Figure 3. DocID14109 Rev 3 9/26 25 Shorted coil detection AN2650 Figure 3. Stepping modes (Auto decay mode, fast decay without delay time) Full-Step Mode, DIR=0 Phase Counter 0 8 24 Phase Counter 24 16 0 8 Current Driver A 8 0 Slow Decay Fast Decay Current Driver A 0 8 Slow Decay Fast Decay Slow Decay Fast Decay Current Driver B 8 0 8 Slow Decay Fast Decay 0 4 Current Driver A 0 4 Half-Step Mode, DIR=0 8 12 8 4 16 20 24 Slow Decay Fast Decay 0 4 8 Current Driver A 4 Slow Decay Fast Decay Fast Decay 8 Slow Decay 4 0 4 8 4 0 Current Driver B 4 Slow Decay Fast Decay 2 4 6 Mini-Step Mode, DIR=0 8 Slow Decay Fast Decay 0 8 0 8 Slow Decay Fast Decay 28 Half-Step Mode, DIR=1 20 16 12 8 24 4 0 4 0 Slow Decay Fast Decay 4 8 4 0 4 8 Slow Decay Fast Decay Fast Decay 4 Slow Decay 0 4 8 4 0 4 8 Slow Decay Fast Decay Mini-Step Mode, DIR=1 Phase Counter 30 28 26 24 22 20 18 16 14 12 10 10 12 14 16 18 20 22 24 26 28 30 Slow Decay Fast Decay 0 2 4 6 8 6 4 2 0 2 4 6 8 6 4 Current Driver A 2 Slow Decay Fast Decay Fast Decay 8 6 4 2 Slow Decay 0 2 4 6 8 6 4 2 0 2 4 Current Driver B 6 Slow Decay Fast Decay Step CLK 8 6 4 2 0 8 6 4 2 0 Slow Decay Fast Decay 2 4 6 8 6 4 2 0 2 4 6 Slow Decay Fast Decay Fast Decay 6 4 2 0 Slow Decay 2 4 6 8 6 4 2 0 2 4 8 Micro-Step Mode, DIR=1 Micro-Step Mode, DIR=0 HSA2 Slow Decay Fast Decay 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 Slow Decay Fast Decay Fast Decay HSA1 HSB2 Slow Decay 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 HSB1 Slow Decay Fast Decay Step CLK Phase Counter 313029282726252423222120191817161514131211109 8 7 6 5 4 3 2 1 0 Current Driver A Current Driver B Slow Decay Fast Decay HSA2 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 HSA1 Slow Decay Fast Decay Fast Decay Slow Decay HSB2 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 HSB1 Slow Decay Fast Decay Step CLK Table 1 shows Phase Counter values where fast decay is active. Table 1. Phase counter values for fast decay Step Mode Bridge DIR=0 DIR=1 A (8) (24) (16(1)) (0(1)) B (0) (16) (24(1)) (8(1)) A (8, 12) (24, 28 (20, 16(1)) (4, 0(1)) B (0, 4) (16, 20) (28, 24(1)) (12, 8(1)) Full step Half step 10/26 6 Slow Decay Fast Decay Step CLK Phase Counter 0 1 2 3 4 5 6 7 8 9 10111213141516171819202122232425262728293031 Current Driver B 0 Step CLK Phase Counter 0 Current Driver A 8 Slow Decay Fast Decay Phase Counter 28 Step CLK Current Driver B 0 Step CLK Phase Counter Current Driver A 8 Slow Decay Fast Decay Current Driver B 0 Step CLK Current Driver B Full-Step Mode, DIR=1 16 DocID14109 Rev 3 AN2650 Shorted coil detection Table 1. Phase counter values for fast decay (continued) Step Mode Bridge DIR=0 DIR=1 A (8, 10,12,14) (24,26,28,30) (22,20,18,16(1)) (6, 4, 2, 0(1)) B (0, 2, 4, 6) (16,18,20,22) (30,28,26,24(1)) (14,12,10, 8(1)) A (8,9,10,11,12,13,14,15) (24,25,26,27,28,29,30,31) (23,22,21,20,19,18,17,16(1)) (7, 6, 5, 4, 3, 2, 1, 0(1)) B (0, 1, 2, 3, 4, 5, 6, 7) (16,17,18,19,20,21,22,23) (31,30,29,28,27,26,25,24(1)) (15,14,13,12,11,10, 9, 8(1)) Mini step Micro step 1. Current profile_0 must be greater than 0 2.1 Conclusion To detect shorted coil in both bridges (A and B) and for all step modes (Full, Half, Mini and Micro), it is necessary to change decay mode to Auto decay, fast decay without delay time at phase counter values of 0 and 8 (or 16 and 24). For the opposite direction, DIR=1 can also use 0 and 8 (or 16 and 24) but the amplitude of current profile_0 must be greater than 0. This configuration is illustrated in Figure 4. Figure 4. Auto decay, fast decay without delay time at phase 0 and 8 200ms phase 0 1 2 3 4 5 6 7 89 10111213141516171819202122232425262728293031 0 1 2 3 4 1516171819202122232425262728293031 01 2 3 4 5 6 7 89 1011121314151617 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 1 2 3 4 1 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 7 6 5 4 7 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 Auto decay, fast decay without delay time at phase 0 and 8 (DIR=0) Note: Another possibility is to change the decay mode for Micro, Mini and Half Step mode at phase counter values of 4 and 12 and for Full Step mode at phase counter values of 0 and 8. DocID14109 Rev 3 11/26 25 SPI AN2650 3 SPI 3.1 Fault bit Figure 5. SPI transfer timing diagram t CSN_HI,min CSN high to low: DO enabled CSN time CLK 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 time DI: data will be accepted on the rising edge of CLK signal actual data DI A2 new data A1 A0 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 time DO: data will change on the falling edge of CLK signal status information DO D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 time fault bit Control and Status Register CSN low to high: actual data is transfered to registers fault bit old data actual data time The first three bits of an SPI write frame are the register address. Thus, during this time, it is not clear which register has to be written and read. This time is used at the DO-pin to monitor the or-function of all diagnostic functions. The register read out is started with the third falling edge of the SPI CLK. The read out is finished 13 falling edges later and during the remaining time, until CSN is set to high, the orfunction of all diagnostic functions is monitored again. Using this method, the failure status of the device can be checked without an SPI communication. CSN is only pulled to low for a short while. 3.2 SPI communication monitoring SPI communication monitoring is described in the specification. However, for register 0 the following two points should be considered. 12/26 1. During SPI communication, monitoring the STEP-pin must not be used. This could cause the Phase Counter to be modified. 2. When not using the microstepping step mode, not all Current Profile Registers are used. When sending a command to the Control Register 0 for SPI communication monitoring with a Phase Counter value that not used in the selected step mode, the device will correct the Phase Counter value itself. In this case, SPI communication monitoring will fail. DocID14109 Rev 3 AN2650 4 Decay modes Decay modes During the ON phase the current in the motor coil increases. After an ON phase, an OFF phase follows that always starts with the cross current protection time (tcc). The cross current protection time is automatically chosen with the slew rate and is typically in the range from 0.5 to 4 µs. After the cross current protection time, a programmed decay mode follows. The basic decay modes of the stepper motor driver L9942 are: 4.1 • Slow decay • Fast decay • Advanced decay modes, which are combinations of the slow and fast decay modes. Slow decay The slow decay mode realizes a minimum loss of energy in the motor coil. This means the current decrease in the motor coil is “slow”. Slow decay is illustrated in Figure 6. DocID14109 Rev 3 13/26 25 Decay modes AN2650 Figure 6. Slow decay IL tCC cross current protection ON Vs OFF OFF ON OFF IL Vs UBE Vs slow decay OFF ON OFF OFF IL URon „ON“ IL increase t ON IL OFF gnd 4.2 gnd OFF gnd Fast Decay The fast decay mode realizes a maximum loss of energy in the motor coil. This means the current decrease in the motor coil is “fast”. Fast decay is illustrated in Figure 7. 14/26 DocID14109 Rev 3 AN2650 Decay modes Figure 7. Fast decay IL tCC cross current protection Vs OFF OFF ON OFF IL Vs UBE Vs fast decay OFF OFF OFF ON IL URon „ON“ IL increase ON t ON IL OFF gnd 4.3 gnd OFF gnd Advanced decay modes With the stepper motor driver L9942, it is possible to combine the basic decay modes, slow and fast decay. 4.3.1 Mixed decay From the current point of view, for stepping down it is necessary to reduce the current in the motor coil quickly. Therefore, a mostly slow decay is not useful because there is the danger that the current in the motor coil does not reach the new (lower) current target. With fast decay, the current undershoot may be stronger than necessary; this generates more EMI than necessary. A better result is obtained by mixing fast decay with slow decay. Mixed decay starts with fast decay and switches to slow decay; the point for switching between the decay modes is programmable. Mixed decay is shown in Figure 8. DocID14109 Rev 3 15/26 25 Decay modes AN2650 Figure 8. Mixed decay IL ITarget I II tCC 4.3.2 tMD t • Mixed decay, fast decay until current undershoot In Figure 8, this behavior is shown with graph “I”. Fast decay is driven until the motor coil current has undershot the target current and switches to slow decay until the end of the phase. • Mixed decay, fast decay until tMD > 4(8) µs In Figure 8, this behavior is shown with graph “II”. The time tMD is started after the cross current protection time tcc is over. After tMD is finished the stepper motor driver switches to slow decay. tMD is programmable to 4µs or 8µs. Auto decay If the current in the motor coil is required to increase from step to step, it is sensible to save the current in the motor coil. Therefore, the best decay mode is slow decay (see Section 4.1). If, on the other hand, the current in the motor coil should decrease from step to step, it is sensible to reduce the current in the motor coil in a controlled way, as described in Section 4.3.1. Therefore, the best decay mode is mixed decay. The combination of slow decay for increasing current from step to step and mixed decay for decreasing current from step to step is auto decay. A combination of slow decay and pure fast decay is also possible but this option usually increases the EMI emission. In Figure 9, auto decay is shown for one of the motor coils with micro stepping. For each step, the appropriate current profile register is also shown. Internally, a pointer moves from a current profile register to the next current profile register with each StepCLK pulse. This start from the register 0 and goes step by step to register 8 and then back to register 0... When the pointer is going in the direction from register 0 to 8, the L9942 uses slow decay. When the pointer is going from register 8 to 0, mixed or fast decay is selected. 16/26 DocID14109 Rev 3 AN2650 Decay modes Figure 9. Auto decay IL auto decay slow decay current profile register fast or mixed decay 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 t 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 slow decay fast or mixed decay VStepCLK auto decay t • Auto decay, fast decay without delay time Slow decay for current profile register going up (0 8) plus pure fast decay (see also fast decay in Figure 7) for current profile register decreasing (8 0). • Auto decay, fast decay until tMD > 4(8) µs: Slow decay for current profile register going up (0 8) plus mixed decay (see also mixed decay in Figure 8, graph “II”) for current profile register decreasing (8 0). • Auto decay, fast decay until current undershoot Slow decay for current profile register going up (0 8) plus mixed decay (see also mixed decay in Figure 8, graph “I”) for current profile register increasing (0 8). DocID14109 Rev 3 17/26 25 Stall detection 5 AN2650 Stall detection The stall detection function of the L9942 uses the reference drive of a stepper motor system, such as that usually used in the start up phase of a front light levelling system. 5.1 Internal functionality (simplified) The back EMF of the permanent magnetic rotor of the stepper motor is the effect that is used for the stall detection function. If the motor is turning “fast”, the back EMF is “high”. Thus, the voltage drop at the motor coils is “low”. Combined with the inductance of the motor coils, it takes a “long” time to reach the target current. Consequently, this means a “long” duty cycle of the pulse width modulation (PWM). If the motor is stopped mechanically, the back EMF is zero. Thus, the voltage drop at the motor coils is “high”. Combined with the inductance of the motor coils, it takes a “short” time to reach the target current. This means a “short” duty cycle of the PWM. As is shown in Figure 10, an internal counter counts the duty cycle of the current regulation PWM. This value is compared with a value given from the microcontroller via the SPI. If this value is less than the one supplied by the microcontroller, the stall detection bit is set. Figure 10. Stall detection function overview IL duty cycle for cur. reg. PWM PWM current regulation t counting t 001000 comp. From SPI 18/26 010011 DocID14109 Rev 3 stall detection bit AN2650 5.2 Stall detection How to determine the stall threshold at bench test There are four steps to determine the stall threshold. 1. Drive motor in an environment with parameters as in a possible stall situation. 2. Run the motor so that it is turning continually and increase the stall threshold step by step until the stall bit is set. This stall threshold value is called the “high value”. 3. With the same electrical conditions as before, stop the motor mechanically. Decrease the stall threshold from the “high value”. After some steps the stall bit is reset. This stall threshold value is called the “low value”. 4. The stall threshold is the middle value between the “high value” and the “low value”. DocID14109 Rev 3 19/26 25 Duty cycle for current regulation 6 AN2650 Duty cycle for current regulation The duty cycle for current regulation is always switched on for a minimum time and has a maximum time of less than 100%. 6.1 Minimum duty cycle The minimum duty cycle is the sum of the “Glitch filter delay time”, the “Slew rate” and the “Cross current protection time”. The “Slew rate” and the “Cross current protection time” are programmed with the same bits. 6.2 Maximum duty cycle The maximum duty cycle is less then 100%. The negligible off time is related to the “Cross current protection time”. “Cross current protection time” is illustrated in Figure 11. Figure 11. Cross current protection time and slew rate for maximum DC OUT ON Slew Rate B Slew Rate A OFF t TCC t 20/26 DocID14109 Rev 3 AN2650 7 Power dissipation Power dissipation The calculation of the power dissipation depends upon the selected slew rate and decay mode of the device. In Figure 12 the set up was selected with a fast decay. Figure 12. Current flow and voltage drop during fast decay Vs ON OFF OUT-B OFF OUT-A OUT-B ON ON IL URon Vs ON OUT-A IL OFF gnd OFF gnd ON FW fast decay VOUT-A Vs VOUT-B t tr/f PWM tPulse t tD For a rough calculation of the power dissipation, three different phases are selected: 7.1 1. Static ON 2. Static free wheeling (FW), fast decay 3. Dynamic on and off with slew rate. Static ON Only the RDS,on of the high and low side switches are used for generating power dissipation. DocID14109 Rev 3 21/26 25 Power dissipation 7.2 AN2650 Static freewheeling Only the RDS,on of the high and low side switches are used for free wheeling and generating power dissipation. 7.3 Dynamic slew rate power dissipation During the H-bridge switching, the voltage and the current chang in a triangular form with the defined slew rate. 7.4 Power dissipation for one PWM phase The temporary power dissipations, explained above, are summed for the complete PWM phase. t Pulse – t r ⁄ f t D – t Pulse – t r ⁄ f 2 ⋅ t r ⁄ f P = P ON ⋅ ------------------------------- + P FW ⋅ ------------------------------------------- + 2 ⋅ P SR ⋅ ----------------- t t tD D D t D – 2 ⋅ t r ⁄ f t r ⁄ f P = P ON ⋅ ---------------------------- + 2 ⋅ P SR ⋅ 2 ⋅ --------- tD tD t r ⁄ f 2 t D – 2 ⋅ t r ⁄ f P = 2 ⋅ R DSON ⋅ I ⋅ ---------------------------- + 2 ⋅ U ⋅ I ⋅ --------- tD tD 22/26 DocID14109 Rev 3 AN2650 8 PCB footprint proposal PCB footprint proposal Figure 13. Power SSO24 solder mask layout (all values in mm) DocID14109 Rev 3 23/26 25 PCB footprint proposal AN2650 Figure 14. Power SSO24 solder mask opening (all values in mm) 24/26 DocID14109 Rev 3 AN2650 9 Revision history Revision history Table 2. Document revision history Date Revision Changes 2-Nov-2007 1 Initial release. 22-Sep-2013 2 Updated Disclaimer. 05-Dec-2013 3 Updated equation into Section 7.4: Power dissipation for one PWM phase DocID14109 Rev 3 25/26 25 AN2650 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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