ETC1 BU-61689G0 Miniature advanced communication engine (mini-ace) and mini-ace plus Datasheet

BU-65178/65179*/61588/61688*/61689*
MINIATURE ADVANCED
COMMUNICATION ENGINE
(MINI-ACE) AND MINI-ACE PLUS*
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has...
®
FEATURES
• 5 Volt Only
• Fully Integrated MIL-STD-1553 A/B
STANAG 3838 Compliant Terminals
• One-Square-Inch Package
• Smallest BC/RT/MT In The Industry
• Hardware and Software
Compatible with BU-61580 ACE
Series
• Flexible Processor/Memory
Interface
• Bootable RT* Option
• 4K x 16 or 64K x 16* Shared RAM
• Automatic BC Retries
DESCRIPTION
• Programmable BC Gap Times
The BU-61588 Mini-ACE and BU-61688 Mini-ACE Plus* integrates two
5-volt-only transceivers, protocol, memory management, processor interface
logic, and 4K x 16, or 64K x 16* words of RAM in a choice of pin grid array
(PGA), quad flat pack or gull lead packages. The Mini-ACE is packaged in a
1.0 square inch, low profile, cofired ceramic multi-chip-module (MCM) package making it the smallest integrated MIL-STD-1553 BC/RT/MT in the industry.
• Programmable Illegalization
• Simultaneous RT/Monitor Mode
• Operates From 10*/12 /16 / 20* MHz
Clock
The Mini-ACE provides full compatibility to DDC’s BU-61580 and BU-65170
Advanced Communication Engine (ACE). As such, the Mini-ACE includes all
the hardware and software architectural features of the ACE.
The Mini-ACE contains internal address latches and bidirectional data buffers
to provide a direct interface to a host processor bus. The memory management scheme for RT mode provides three data structures for buffering data.
These structures, combined with the Mini-ACE’s extensive interrupt capability, serve to ensure data consistency while off-loading the host processor.
The Mini-ACE Plus* can optionally boot-up as a RT with the Busy bit set for
1760 applications. The Mini-ACE BC mode implements several features
aimed at providing an efficient real-time software interface to the host processor including automatic retries, programmable intermessage gap times, automatic frame repetition, and flexible interrupt generation.
The advanced architectural features of the Mini-ACE, combined with its small size
and high reliability, make it an ideal choice for demanding military and industrial
processor-to-1553 applications.
FOR MORE INFORMATION CONTACT:
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
Technical Support:
1-800-DDC-5757 ext. 7771
All trademarks are the property of their respective owners.
©
1998, 1999 Data Device Corporation
Data Device Corporation
www.ddc-web.com
2
BU-65178/65179*/61688*/61689*
K-04/05-0
MISCELLANEOUS
RT_AD_LAT
RT ADDRESS
CH. B
CH. A
TRANSCEIVER
B
TRANSCEIVER
A
DUAL
ENCODER/DECODER,
MULTIPROTOCOL
AND
MEMORY
MANAGEMENT
PROCESSOR
AND
MEMORY
INTERFACE
LOGIC
ADDRESS
BUFFERS
ADDRESS BUS
A15-A0
D15-D0
INT
ADDR_LAT/MEMOE, ZERO_WAIT/MEMWR,
8/16-BIT/DTREQ, POLARITY_SEL/DTACK
IOEN, READYD
TRANSPARENT/BUFFERED, STRBD, SELECT,
RD/WR, MEM/REG, TRIGGER_SEL/MEMENA-IN,
MSB/LSB/DTGRT
DATA
BUFFERS
DATA BUS
*
4K X 16
OR
64K X 16
SHARED
RAM
FIGURE 1. BU-65178/65179*/61588/61688*/61689*
CLK_IN,
MSTCLR,SSFLAG/EXT_TRG
RTAD4-RTAD0, RTADP
TX/RX_B
TX/RX_B
TX/RX_A
TX/RX_A
INTERRUPT
REQUEST
PROCESSOR
AND
MEMORY
CONTROL
PROCESSOR
ADDRESS BUS
PROCESSOR
DATA BUS
TABLE 1. BU-65178/65179*/61588/61688*/61689*
SPECIFICATIONS (CONT.)
TABLE 1. BU-65178/65179*/61588/61688*/61689*
SPECIFICATIONS
PARAMETER
ABSOLUTE MAXIMUM RATING
Supply Voltage
„ Logic +5 V
„ Transceiver +5 V (Note 12)
Logic
„ Voltage Input Range
RECEIVER
Differential Input Resistance
(Notes 1-7)
Differential Input Capacitance
(Notes 1-7)
Threshold Voltage, Transformer
Coupled, Measured on Stub
Common Mode Voltage (Note 7)
TRANSMITTER
Differential Output Voltage
„ Direct Coupled Across 35 Ω,
Measured on Bus
„ Transformer Coupled Across
70 Ω, Measured on Bus:
• Standard Product = – XX0
• 1760 Amplitude Compliant
Product = – XX2
( Note 13 and Ordering
Information – Test Criteria)
Output Noise, Differential (Direct
Coupled)
Output Offset Voltage, Transformer
Coupled Across 70 ohms
Rise/Fall Time
LOGIC
VIH
VIL
IIH (Vcc = 5.5 V, VIN = Vcc)
IIH (Vcc = 5.5 V, VIN = 2.7 V)
„ SSFLAG/EXT_TRIG
„ All Other Inputs
IIL (Vcc = 5.5 V, VIN = 0.4 V)
„ SSFLAG/EXT_TRIG
„ All Other Inputs
VOH (Vcc = 4.5 V, VIH = 2.7 V,
VIL = 0.2 V, IOH = max)
VOL (Vcc = 4.5 V, VIH = 2.7 V,
VIL = 0.2 V, IOL = max)
IOL
„ DB15-DB0
A15-A0
MEMOE/ADDR_LAT
MEMWR/ZEROWAIT
DTREQ/16/8
DTACK/POLARITY_SEL
„ INT
READYD
IOEN
IOH
„ DB15-DB0
A15-A0
MEMOE/ADDR_LAT
MEMWR/ZEROWAIT
DTREQ/16/8
DTACK/POLARITY_SEL
„ INT
READYD
IOEN
CI (Input Capacitance)
CIO (Bi-directional signal input
capacitance)
Data Device Corporation
www.ddc-web.com
MIN
TYP
MAX
-0.3
-0.3
6.0
7.0
V
V
-0.3
Vcc+0.3
V
2.5
18
20
7
pF
0.860
Vp-p
10
Vpeak
9
Vp-p
27
27
Vp-p
Vp-p
10
250
mVp-p,
diff
mV
300
nsec
-10
0.8
10
V
V
µA
-692
-346
-84
-42
µA
µA
-794
-397
2.4
-100
-50
µA
µA
V
0.4
V
-250
100
21
22
5
150
2.0
6.4
POWER DISSIPATION
Total Hybrid
„ BU-65178/65179/61588X0
• +5 V (Logic)
„ BU-65178/61588/65179X3
• Idle
• 25% Duty Cycle
• 50% Duty Cycle
• 100% Duty Cycle
„ BU-61688*/61689X0*
• +5 V (Logic)
„ BU-61688*/61689X3*
• Idle
• 25% Duty Cycle
• 50% Duty Cycle
• 100% Duty Cycle
Hottest Die
„ BU-65178/61588X3/65179X3*/
BU-61688*/61689X3*
• Idle
• 25% Duty Cycle
• 50% Duty Cycle
• 100% Duty Cycle
mA
-6.4
mA
-3.2
mA
50
50
pF
pF
TYP
MAX
UNITS
µs
µs
2.5
9.5
POWER SUPPLY REQUIREMENTS
Voltages/Tolerances
„ BU-65178/61588X3
• +5 V (Logic)
• +5 V (Ch. A, Ch. B)
Current Drain (Total Hybrid)
„ BU-65178/65179/61588X0
• +5 V (Logic)
„ BU-65178/65179/61588X3
• +5 V (Logic, Ch. A, Ch. B)
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
„ BU-61688*/61689X0*
• +5 V (Logic)
„ BU-61688*/61689X3*
• +5 V (Logic, Ch. A, Ch. B)
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
mA
3.2
MIN
1553 MESSAGE TIMING
Completion of CPU Write (BC
Start)- to-Start of Next Message
BC Intermessage Gap (Note 8)
BC/RT/MT Response Timeout
(Note 9)
„ 18.5 nominal
„ 22.5 nominal
„ 50.5 nominal
„ 128.0 nominal
T Response Time (Note 11)
Transmitter Watchdog Timeout
kohm
0.20
0
6
PARAMETER
UNITS
17.5 18.5
21.5 22.5
49.5 50.5
127 129.5
4
668
19.5
23.5
51.5
131
7
µs
µs
µs
µs
µs
µs
4.5
4.75
5.0
5.0
5.5
5.25
V
V
23
100
mA
116
222
328
540
160
265
370
580
mA
mA
mA
mA
46
200
mA
116
217
318
519
180
285
390
600
mA
mA
mA
mA
0.115
0.5
W
0.64
0.93
1.22
1.81
0.88
1.11
1.33
1.97
W
W
W
W
0.230
1.0
W
0.64
0.93
1.22
1.80
0.99
1.22
1.45
1.90
W
W
W
W
0.18
0.42
0.66
1.14
0.28
0.51
0.75
1.22
W
W
W
W
* Mini-ACE PLUS with 64K Words of RAM. RAM impact to Power
Supply is based on Host Processor activity; subtract 140 mA if Host
is idle.
3
BU-65178/65179*/61688*/61689*
K-04/05-0
Table 1 Notes (Cont.):
TABLE 1. BU-65178/65179*/61588/61688*/61689*
SPECIFICATIONS (CONT.)
PARAMETER
MIN
Frequency
„ BU-61588/61688*/65178
• Default Mode
• Software Programmable Option
„ BU-61689*
• Default Mode
• Software Programmable Option
„ BU-65179*
• Pin Programmable Option
TYP
MAX
UNITS
16
12
MHz
MHz
20
10
MHz
MHz
10/12/16/20
(8) Typical value for minimum intermessage gap time. Under software
control, may be lengthened to (65,535 µs minus message time), in
increments of 1 µs.
(9) Software programmable (4 options). Includes RT-to-RT Timeout (MidParity of Transmit Command to Mid-Sync of Transmitting RT Status).
(10) For both +5 V logic and transceiver. +5 V for channels A and B.
(11) Measured from mid-parity crossing of Command Word to mid-sync
crossing of RT’s Status Word.
(12) External 10 µF Tantalum and 0.1 µF capacitors should be located
as close as possible to Pins 20 and 72 on the Flat Package
and Pins A9 and J3 on the PGA package, and 0.1 µF at Pin 37/D3.
(13) MIL-STD–1760 requires that the Mini-ACE produce a 20 Vp-p minimum output on the stub connection.
MHz
„ Long Term Tolerance
• 1553A Mode
• 1553B Mode
„ Short Term Tolerance, 1 second
• 1553A Mode
• 1553B Mode
„ Duty Cycle
• 16 MHz
• 12 MHz
• 10 MHz*
• 20 MHz
THERMAL
Thermal Resistance, Junction-toCase, Hottest Die (θJC)
„ BU-65178/61588X3*
Operating Junction Temperature
Storage Temperature
Lead Temperature (soldering, 10
sec.)
PHYSICAL CHARACTERISTICS
Size
„ BU-65178/61588 P
BU-65179*/61688*/61689*
„ BU-65178/61588 F/G
BU-65179*/61688*/61689*
Weight
„ BU-65178/61588 F/P/G
BU-65179*/61688*/61689*
33
40
40
40
0.01
0.1
%
%
0.001
0.01
%
%
67
60
60
60
%
%
%
%
6.8
150
150
+300
°C/W
°C
°C
°C
1.0 X 1.0 X 0.150
(25.4 x 25.4 x 3.81)
1.0 X 1.0 X 0.155
(25.4 x 25.4 x 3.94)
in.
(mm)
in.
(mm)
-55
-65
0.3
(9)
oz
(g)
Notes: Notes 1 through 6 are applicable to the Receiver Differential
Resistance and Differential Capacitance specifications:
(1) Specifications include both transmitter and receiver (tied together internally).
(2) Measurement of impedance is directly between pins TX/RX A(B)
and TX/RX A(B) of the BU-65178/61588X3 hybrid.
(3) Assuming the connection of all power and ground inputs to the hybrid.
(4) The specifications are applicable for both unpowered and powered conditions.
(5) The specifications assume a 2 volt rms balanced, differential, sinusoidal input. The applicable frequency range is 75 kHz to 1 MHz.
(6) Minimum resistance and maximum capacitance parameters are
guaranteed, but not tested, over the operating range.
(7) Assumes a common mode voltage within the frequency range of dc to 2
MHz, applied to pins of the isolation transformer on the stub side (either direct
or transformer coupled), referenced to hybrid ground. Use a DDC recommended transformer or other transformer that provides an equivalent CMRR.
Data Device Corporation
www.ddc-web.com
4
BU-65178/65179*/61688*/61689*
K-04/05-0
NOTES
** Note that the Test Output pins on the flat pack are pads located on
the bottom of the package.
1. BU-65179*, A15/A14 pins are actually CLK SEL 1 / CLK SEL 0 respectively.
2. BU-65179*, A12 pin selects the RT_BOOT_L OPTIONAL MODE.
3. BU-65179*, A13 pin has no connection.
TABLE 2. BU-65178/65179*/61588/61688*/61689* PIN
LISTINGS (QFP QUAD FLAT PACK, PGA-PIN GRID
ARRAY AND GULL LEAD)
QFP PGA
NAME
QFP
PGA
NAME
1
B4
MEM/REG
42
H9
D00
2
B5
MSTCLR
43
F9
D02
3
C2
A11
44
F7
D03
4
C3
A10
45
G5
D05
5
C1
TX/RX-A
46
E7
D08
6
D2
A08
47
E9
D07
7
D1
TX/RX-A
48
D7
D13
8
C4
A14, See NOTE 1
49
B2
D12
9
10
11
E3
F2
E1
A04
A03
A07
50
51
52
D9
B9
A2
D14
D09
D11
12
F3
A02
53
D8
D15
13
G1
TX/RX-B
54
A1
D10
14
G4
MEMOE/ADDR_LAT
55
C9
TRANSPARENT/
BUFFERED
15
G3
A00
56
B8
READYD
16
H1
TX/RX-B
57
C8
INT
17
A7
LOGIC GND
58
A3
IOEN
18
A8
LOGIC GND
59
B7
TX_INH_A
19
J8
LOGIC GND
60
C7
TX_INH_B
20
A9
+5V VCC2
61
C6
SELECT
21
J7
RTAD2
62
A6
STRBD
22
F1
A06
63
A5
RD/WR
23
J2
MEMWR/
ZEROWAIT
64
J1
DTGRT/MSB/LSB
24
H5
DTREQ/16/8
65
A4
Test Output (RX-A)
25
H3
Test Output (RX-B)
66
C5
A15, See NOTE 1
26
H4
Test Output (RX-B)
67
B6
Test Output (RX-A)
27
G2
A01
68
E2
A05
28
J5
MEMENA_IN/
TRIGGER_SEL
69
J4
A09
29
J6
70
B3
A12, See NOTE 2
30
H6
DTACK/
POLARITY_SEL
CLOCK_IN
71
B1
A13, See NOTE 3
31
G7
RT_AD_LAT
72
J3
+5V VCC1
32
H2
SSFLAG/EXT_TRIG
**
D4
33
H7
RTAD0
34
G8
RTAD3
TestOutput(A_RExt)
Test Output
(A_Test1)
35
H8
RTAD4
36
E8
D06
37
D3
+5V VCC
38
F8
D01
39
G6
D04
40
41
G9
J9
RTADP
RTAD1
Data Device Corporation
www.ddc-web.com
**
D5
**
D6
Test Output
(AB_Test4)
**
E4
TestOutput(B_RExt)
**
E6
TestOutput
(AB_Tstck)
**
F4
**
F5
**
F6
TestOutput
(AB_Test3)
TestOutput
(B_Test1)
N/A
E5
No Connect
TestOutput
(AB_Test2)
5
BU-65178/65179*/61688*/61689*
K-04/05-0
2.000 ±0.015
(50.800 ±0.381)
1.000 SQ ±0.010
(25.400 ±0.254)
0.500 ±0.005
(12.70 ±0.127)
0.200 ±0.005
(5.080 ±0.127)
0.100 DIA.
(2.540) (see note 4)
P8
P7
P6
P5
P4
P3
P2
P1
72
1
INDEX DENOTES
PIN NO. 1
0.018 ±0.002 0.050 ±0.005
(0.457 ±0.051) (1.270 ±0.127)
VIEW "B"
VIEW "B"
0.850 ±0.008
(21.590 ±0.203)
VIEW "A"
BOTTOM VIEW
0.010 ±0.002
(0.254 ±0.051)
0.035 ±0.005
(0.889 ±0.127)
0.130 MAX
(3.31)
1.024 ±0.014 NOM.
(26.010 ±0.356)
VIEW "A"
0.050 ±0.005
(1.270 ±0.127)
0.040 ±0.004
(1.016 ±0.102)
0.090 ±0.010
(2.286 ±0.254)
SIDE VIEW
Notes:
1) Dimensions are in inches (mm).
2) Package Material: Alumina (AL2O3)
3) Lead Material: Kovar, Plated by 50µ in. minimum nickel under 60µ in. minimum gold.
4) There are 8 test pads located on the bottom of the package. These pads are recessed
so as not to interfere when mounting the hybrid.
FIGURE 2. BU-65178F / 65179F* /61588F /61688F*/61689F* MECHANICAL OUTLINE (QUAD FLAT PACK - QFP)
Data Device Corporation
www.ddc-web.com
6
BU-65178/65179*/61688*/61689*
K-04/05-0
0.800 ±0.005
(20.320 ±0.127)
0.100 ±0.005
(2.540 ±0.127)
9
8
7
6
5
4
3
2
1
0.070 ±0.005
(1.778 ±0.127)
0.070 ±0.005
(1.778 ±0.127)
J H G F E D C B A
0.180 ±0.008
(4.572 ±0.203)
BOTTOM VIEW
0.155 MAX
(3.810)
1.000 SQ ±0.010
(25.400 ±0.254)
0.018 ±0.002
(0.457 ±0.051)
Indicates
Pin A1
TOP VIEW
SIDE VIEW
Notes:
1) Dimensions are in inches (mm).
2) Package Material: Alumina (AL2O3)
3) Lead Material: Kovar, Plated by 50µ in. minimum nickel under 60µ in. minimum gold.
FIGURE 3. BU-65178P / 65179P* /61588P /61688P*/61689P* MECHANICAL OUTLINE (PIN GRID ARRAY - PGA)
1.38 ±0.02
(35.05 ±0.51)
1.00 SQ ±0.01
(25.40 ±0.25)
0.19 Ref
(4.83 Ref)
0.100 DIA.
(2.540) (see note 4)
P8
P7
P6
P5
P4
P3
P2
P1
72
Notes:
1) Dimensions are in inches (mm).
2) Package Material: Alumina (AL2O3)
3) Lead Material: Kovar, Plated by 50µ in. minimum nickel
under 60µ in. minimum gold.
4) There are 8 test pads located on the bottom of the package.
These pads are recessed so as not to interfere when
mounting the hybrid.
1
VIEW "B"
0.850 ±0.008
(21.590 ±0.203)
0.018 ±0.002 0.050 ±0.005
(0.457 ±0.051) (1.270 ±0.127)
BOTTOM VIEW
VIEW "B"
0.08 MIN FLAT
(2.03)
INDEX DENOTES
PIN NO. 1
0.012 R. MAX
(0.305 R.)
0.130 MAX
(3.31)
VIEW "A"
0.010 ±0.002
(0.254 ±0.051)
1.024 ±0.014 NOM.
(26.010 ±0.356)
0.05 MIN FLAT
(1.27)
0.075 MAX FLAT
(1.91)
SIDE VIEW
0.050 ±0.005
(1.27 ±0.127)
0.006 -0.004,+0.010
(0.152 -0.100,+ 0.254)
VIEW "A"
FIGURE 4. BU-65178G / 65179G* /61588G /61688G*/61689G* MECHANICAL OUTLINE (GULL LEAD)
Data Device Corporation
www.ddc-web.com
7
BU-65178/65179*/61688*/61689*
K-04/05-0
TRANSFORMERS
In selecting isolation transformers to be used with the Mini-ACE,
there is a limitation on the maximum amount of leakage inductance. If this limit is exceeded, the transmitter rise and fall times
may increase, possibly causing the bus amplitude to fall below
the minimum level required by MIL-STD-1553. In addition, an
excessive leakage imbalance may result in a transformer dynamic offset that exceeds 1553 specifications.
This inductance must be less than 6.0 µH. Similarly, if the other
side of the primary is shorted to the primary center-tap, the
inductance measured across the “secondary” (stub side) winding must also be less than 6.0 µH.
The difference between these two measurements is the
“differential” leakage inductance. This value must be less than
1.0 µH.
The maximum allowable leakage inductance is 6.0 µH, and
is measured as follows:
Beta Transformer Technology Corporation (BTTC), a subsidiary
of DDC, manufactures transformers in a variety of mechanical
configurations with the required turns ratios of 1:2.5 direct coupled, and 1:1.79 transformer coupled. TABLE 3 provides a listing
of many of these transformers. For further information, contact
BTTC at 631-244-7393 or at www.bttc-beta.com.
The side of the transformer that connects to the
Mini-ACE is defined as the “primary” winding. If one side of the
primary is shorted to the primary center-tap, the inductance
should be measured across the “secondary” (stub side) winding.
TABLE 3. BTTC TRANSFORMERS FOR USE WITH MINI-ACE
TRANSFORMER CONFIGURATION
BTTC PART NO.
Single epoxy transformer, through-hole, 0.625" X 0.625", 0.250" max height
B-3067
B-3226
Single epoxy transformer, through-hole, 0.625" X 0.625", 0.220" max height.
B-3818
Single epoxy transformer, flat pack, 0.625" X 0.625", 0.275" max height
B-3231
Single epoxy transformer, surface mount, 0.625" X 0.625", 0.275" max height
B-3227
Single epoxy transformer, surface mount, hi-temp solder, 0.625" X 0.625", 0.220" max height.
B-3819
Single epoxy transformer, flat pack, 0.625" X 0.625", 0.150" max height
LPB-5014
Single epoxy transformer, surface mount, 0.625" X 0.625", 0.150" max height
LPB-5015
Single epoxy transformer, through hole, transformer coupled only, 0.500" X 0.350", 0.250" max height
B-3229
Dual epoxy transformer, twin stacked, 0.625" X 0.625", 0.280" max height
TST-9007
Dual epoxy transformer, twin stacked, surface mount, 0.625" X 0.625", 0.280" max height
TST-9017
Dual epoxy transformer, twin stacked, flat pack, 0.625" X 0.625", 0.280" max height
TST-9027
Dual epoxy transformer, side by side, through-hole, 0.930" X 0.630", 0.155" max height
TLP-1205
Dual epoxy transformer, side by side, flat pack, 0.930" X 0.630", 0.155" max height
TLP-1105
Dual epoxy transformer, side by side, surface mount, 0.930" X 0.630", 0.155" max height
TLP-1005
Dual epoxy transformer, side by side, surface mount, 1.410" X 0.750", 0.130" max height
DLP-7115 (see note1)
Single metal transformer, hermetically sealed, flat pack, 0.630" X 0.630", 0.175" max height
HLP-6014
Single metal transformer, hermetically sealed, surface mount, 0.630" X 0.630", 0.175" max height
HLP-6015
NOT RECOMMENDED
DLP-7014
SLP-8007
SLP-8024
Notes:
1. DLP-7115 operates to +85°C max. All other transformers listed operate to +130°C max.
Data Device Corporation
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BU-65178/65179*/61688*/61689*
K-04/05-0
INTERFACE TO MIL-STD-1553 BUS
FIGURE 5 illustrates the interface between the various versions
of the Mini-ACE and a MIL-STD-1553 bus. Connections for both
direct (short stub) and transformer (long stub) coupling, as well
as the nominal peak-to-peak voltage levels at various points
(when transmitting), are indicated in the diagram.
DATA
BUS
Z0
SHORT STUB
(DIRECT COUPLED)
(1:2.5)
1 FT MAX
55 Ω
TX/RX
11.2 Vpp
7 Vpp
28 Vpp
Mini-ACE
55 Ω
TX/RX
ISOLATION
TRANSFORMER
OR
(1:1.79)
LONG STUB
(TRANSFORMER
COUPLED)
(1:1.41)
0.75 Z0
20 FT MAX
28 Vpp
20 Vpp
11.2 Vpp
Mini-ACE
7 Vpp
0.75 Z0
COUPLING
TRANSFORMER
ISOLATION
TRANSFORMER
Z0
NOTES: 1. Z 0 = 70 TO 85 OHMS
2. NOMINAL VOLTAGE
LEVELS SHOWN
FIGURE 5. MINIATURE ADVANCED COMMUNICATIONS ENGINE INTERFACE TO MIL-STD-1553 BUS
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BU-65178/65179*/61688*/61689*
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ORDERING INFORMATION
BU-61588F3-11XX
Supplemental Process Requirements:
S = Pre-Cap Source Inspection
L = Pull Test
Q = Pull Test and Pre-Cap Source Inspection
K = One Lot Date Code
W = One Lot Date Code and Pre-Cap Source Inspection
Y = One Lot Date Code and 100% Pull Test
Z = One Lot Date Code, Pre-Cap Source Inspection and 100% Pull Test
Blank = None of the Above
Test Criteria:
0 = Standard Testing
2 = MIL-STD-1760 Amplitude Compliant - Applies to +5 Volt Transceiver Option Only
Process Requirements:
0 = Standard DDC processing, no Burn-In (See table on next page)
1 = MIL-PRF-38534 Compliant
2 = B*
3 = MIL-PRF-38534 Compliant with PIND Testing
4 = MIL-PRF-38534 Compliant with Solder Dip
5 = MIL-PRF-38534 Compliant with PIND Testing and Solder Dip
6 = B* with PIND Testing
7 = B* with Solder Dip
8 = B* with PIND Testing and Solder Dip
9 = Standard DDC Processing with Solder Dip, no Burn-In (See table on next page)
Temperature Range/Data Requirements:
1 = -55°C to +125°C
2 = -40°C to +85°C
3 = 0°C to +70°C
4 = -55°C to +125°C with Variables Test Data
5 = -40°C to +85°C with Variables Test Data
8 = 0°C to +70°C with Variables Test Data
Voltage/Transceiver Option:
0 = No Transceivers
3 = +5 Volts, rise/fall times=100 to 300 ns (-1553B) (See Test Criteria - 1760 Compliant with option -XX2)
Package Type:
F = 72-Pin Quad Flat Pack
P = 81-Pin PGA
G = 72-Pin Gull Lead (Contact factory.)
Product Type:
65178 = RT Only, 16/12 MHz, 4K RAM
61588 = BC/RT/MT, 16/12 MHz, 4K RAM
65179 = RT/RT_BOOT, 10/12/16/20 MHz, 4K RAM
61688 = BC/RT/MT, 12/16 MHz, 64K RAM
61689 = BC/RT/MT, 10/20 MHz, 64K RAM
*Standard DDC Processing with burn-in and full temperature test, see table on next page.
Data Device Corporation
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BU-65178/65179*/61688*/61689*
K-04/05-0
STANDARD DDC PROCESSING
FOR HYBRID AND MONOLITHIC HERMETIC PRODUCTS
MIL-STD-883
TEST
METHOD(S)
CONDITION(S)
INSPECTION
2009, 2010, 2017, and 2032
—
SEAL
1014
A and C
TEMPERATURE CYCLE
1010
C
CONSTANT ACCELERATION
2001
3000g
BURN-IN
1015 (note 1), 1030 (note 2)
TABLE 1
Notes:
1. For Process Requirement "B*" (refer to ordering information), devices may be non-compliant with MILSTD-883, Test Method 1015, Paragraph 3.2. Contact factory for details.
2. When applicable.
Data Device Corporation
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BU-65178/65179*/61688*/61689*
K-04/05-0
The information in this data sheet is believed to be accurate; however, no responsibility is
assumed by Data Device Corporation for its use, and no license or rights are
granted by implication or otherwise in connection therewith.
Specifications are subject to change without notice.
Please visit our Web site at www.ddc-web.com for the latest information.
105 Wilbur Place, Bohemia, New York, U.S.A. 11716-2482
For Technical Support - 1-800-DDC-5757 ext. 7771
Headquarters, N.Y., U.S.A. - Tel: (631) 567-5600, Fax: (631) 567-7358
Southeast, U.S.A. - Tel: (703) 450-7900, Fax: (703) 450-6610
West Coast, U.S.A. - Tel: (714) 895-9777, Fax: (714) 895-4988
United Kingdom - Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264
Ireland - Tel: +353-21-341065, Fax: +353-21-341568
France - Tel: +33-(0)1-41-16-3424, Fax: +33-(0)1-41-16-3425
Germany - Tel: +49-(0)89-15 00 12-11, Fax: +49-(0)89-15 00 12-22
Japan - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689
World Wide Web - http://www.ddc-web.com
RM
®
I
FI
REG
U
ST
ERED
DATA DEVICE CORPORATION
REGISTERED TO ISO 9001:2000
FILE NO. A5976
K-04/05-0
12
PRINTED IN THE U.S.A.
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