Vishay DG408AK-E3 8-ch/dual 4-ch high-performance cmos analog multiplexer Datasheet

DG408MIL, DG409MIL
Vishay Siliconix
8-Ch/Dual 4-Ch High-Performance CMOS Analog Multiplexers
DESCRIPTION
FEATURES
The DG408 is an 8 channel single-ended analog multiplexer
designed to connect one of eight inputs to a common output
as determined by a 3-bit binary address (A0, A1, A2). The
DG409 is a dual 4 channel differential analog multiplexer
designed to connect one of four differential inputs to a
common dual output as determined by its 2-bit binary
address (A0, A1). Break-before-make switching action
protects against momentary crosstalk between adjacent
channels.
•
•
•
•
•
•
•
An on channel conducts current equally well in both
directions. In the off state each channel blocks voltages up
to the power supply rails. An enable (EN) function allows the
user to reset the multiplexer/demultiplexer to all switches off
for stacking several devices. All control inputs, address (Ax)
and enable (EN) are TTL compatible over the full specified
operating temperature range.
Applications for the DG408, DG409 include high speed data
acquisition, audio signal switching and routing, ATE
systems, and avionics. High performance and low power
dissipation make them ideal for battery operated and
remote instrumentation applications.
Designed in the 44 V silicon-gate CMOS process, the
absolute maximum voltage rating is extended to 44 V.
Additionally, single supply operation is also allowed. An
epitaxial layer prevents latchup.
For additional information please see Technical Article
TA201.
Low on-resistance - RDS(on): 100 
Low charge injection - Q: 20 pC
Fast transition time - tTRANS: 160 ns
Low power - ISUPPLY: 10 μA
Single supply capability
44 V supply max. rating
TTL compatible logic
BENEFITS
•
•
•
•
•
•
Reduced switching errors
Reduced glitching
Improved data throughput
Reduced power consumption
Increased ruggedness
Wide supply ranges (± 5 V to ± 20 V)
APPLICATIONS
•
•
•
•
•
•
•
Data acquisition systems
Audio signal routing
ATE systems
Battery powered systems
High rel systems
Single supply systems
Medical instrumentation
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
CerDIP
DG408
CerDIP
DG409
Top View
Top View
A0
EN
VS1
S2
S3
S4
D
1
2
16
Decoders/Drivers
15
3
14
4
13
5
12
6
11
7
10
8
9
Document Number: 67952
S11-1003-Rev. A, 23-May-11
A1
A0
A2
EN
GND
V-
V+
S1a
S5
S2a
S6
S3a
S7
S4a
S8
Da
1
2
16
Decoders/Drivers
15
3
14
4
13
5
12
6
11
7
10
8
9
A1
GND
V+
S1b
S2b
S3b
S4b
Db
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DG408MIL, DG409MIL
Vishay Siliconix
DG408
DG409
Top View
EN
A0
NC
A1
Top View
A2
Key
EN
A0
NC
A1
GND
3
2
1
20
19
Key
3
2
1
20
19
V-
4
18
V+
V+
S1a
5
17
S1b
16
NC
NC
6
16
NC
7
15
S5
S2a
7
15
S2b
8
14
S6
S3a
8
14
S3b
V-
4
18
GND
S1
5
17
NC
6
S2
S3
LCC-20
LCC-20
9
10
11
12
13
9
10
11
12
13
S4
D
NC
S8
S7
S4a
Da
NC
Db
S4b
DG408
DG409
Top View
Top View
A0
1
16
A1
A0
1
16
A1
EN
2
15
A2
EN
2
15
GND
V-
3
14
GND
V-
3
14
V+
S1
4
13
V+
S1a
4
13
S1b
S2
5
12
S5
S2a
5
12
S2b
S3
6
11
S6
S3a
6
11
S3b
S4
7
10
S7
S4a
7
10
S4b
D
8
9
S8
Da
8
9
Db
FLATPACK
TRUTH TABLE (DG408)
FLATPACK
TRUTH TABLE (DG409)
A2
A1
A0
EN
ON SWITCH
A1
A0
EN
ON SWITCH
X
X
X
0
None
X
X
0
None
0
0
0
1
1
0
0
1
1
0
0
1
1
2
0
1
1
2
0
1
0
1
3
1
0
1
3
0
1
1
1
4
1
1
1
4
1
0
0
1
5
1
0
1
1
6
1
1
0
1
7
1
1
1
1
8
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Notes
• Logic “0” = VAL  0.8 V
• Logic “1” = VAH  2.4 V
• X = Do not care
Document Number: 67952
S11-1003-Rev. A, 23-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG408MIL, DG409MIL
Vishay Siliconix
ORDERING INFORMATION (Hi-Rel)
PART
CONFIGURATION
DG408
8:1 x 1
TEMP. RANGE
- 55 °C to 125 °C
PACKAGE
ORDERING PART
DG408AK
DG408AK
-
16-pin CerDIP
DG408AK-E3
DG408AK-E3
-
9204201EA
DG408AK/883
5962-9204201MEA
LCC-20
Flat-pack 16
92042012A
92042012C
9204201XA
9204201XC
DG409AK
16-pin CerDIP
DG409
4:1 x 2
- 55 °C to 125 °C
LCC-20
Flat-pack 16
GENERIC
DG408AZ/883
DG408AL/883
DSCC NUMBER
5962-9204201M2A
5962-9204201M2C
5962-9204201MXA
5962-9204201MXC
DG409AK
-
DG409AK-E3
DG409AK-E3
-
9204202EA
DG409AK/883
5962-9204202MEA
92042022A
92042022C
9204202XA
9204202XC
DG409AZ/883
DG409AL/883
5962-9204202M2A
5962-9204202M2C
5962-9204202MXA
5962-9204202MXC
Note
• Block diagram and pin configuration for Flat-pack 16 not shown.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltages Referenced to VDigital
Inputsa,
V+
GND
LIMIT
44
25
Current (any terminal)
30
Peak Current, S or D (pulsed at 1 ms, 10 % duty cycle max.)
100
Power Dissipation (Package)b
V
(V-) - 2 to (V+) + 2
or 20 mA, whichever occurs first
VS, VD
Storage Temperature
UNIT
(A suffix)
- 65 to 150
16-pin CerDIPc
900
LCC-20d
750
mA
°C
mW
Notes
a. Signals on SX, DX or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 12 mW/°C above 75 °C.
d. Derate 10 mW/°C above 75 °C.
Document Number: 67952
S11-1003-Rev. A, 23-May-11
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DG408MIL, DG409MIL
Vishay Siliconix
SPECIFICATIONSa
TEST CONDITIONS UNLESS
OTHERWISE SPECIFIED
PARAMETER
SYMBOL
V+ = 15 V, V- = - 15 V
TEMP.b
TYP.c
VAL = 0.8 V, VAH = 2.4 VF
A SUFFIX
- 55 °C to 125 °C
UNIT
MIN.d
MAX.d
Analog Switch
Analog Signal Rangee
Drain-Source
On-Resistance
RDS(on) Matching Between
Channelsg
Source Off Leakage Current
VANALOG
DG408
DG409
DG409
15
Room
40
-
100
Full
-
-
125
RDS(on)
VD = ± 10 V
Room
-
-
15
IS(off)
VS = ± 10 V,
VD = ± 10 V, VEN = 0 V
Room
-
- 0.5
0.5
50
ID(off)
VD = ± 10 V,
VS = ± 10 V,
VEN = 0 V
DG408
Drain On Leakage
Current
- 15
VD = ± 10 V, IS = - 10 mA
DG409
DG408
-
RDS(on)
DG408
Drain Off Leakage
Current
Full
ID(on)
VS = VD = ± 10 V
sequence each
switch on
DG409
Full
-
- 50
Room
-
-1
1
Full
-
- 100
100
Room
-
-1
1
Full
-
- 50
50
Room
-
-1
1
Full
-
- 100
100
Room
-
-1
1
Full
-
- 50
50
V

nA
Digital Control
Logic High Input Voltage
VINH
Full
-
2.4
-
Logic Low Input Voltage
VINL
Full
-
-
0.8
Logic High Input Current
IAH
VA = 2.4 V, 15 V
Full
-
- 10
10
Logic Low Input Current
IAL
VEN = 0 V, 2.4 V, VA = 0 V
Full
-
- 10
10
Logic Input Capacitance
Cin
f = 1 MHz
Room
8
-
250
V
μA
pF
Dynamic Characteristics
Transition Time
tTRANS
see figure 2
Full
160
-
Break-Before-Make Interval
tOPEN
see figure 4
Room
-
10
-
Room
115
-
150
see figure 3
Full
-
-
225
Room
105
-
150
Q
CL = 10 nF, VS = 0 V
Room
20
-
-
Off Isolationh
OIRR
VEN = 0 V, RL = 1 k,
f = 1 MHz
Room
- 75
-
-
Source Off Capacitance
CS(off)
VEN = 0 V, VS = 0 V,
f = 1 MHz
Room
3
-
-
Room
26
-
-
Enable Turn-On Time
tON(EN)
Enable Turn-Off Time
tOFF(EN)
Charge Injection
Drain Off
Capacitance
Drain On
Capacitance
DG408
DG409
DG408
DG409
CD(off)
CD(on)
VEN = 0 V,
VD = 0 V,
f = 1 MHz
Room
14
-
-
Room
37
-
-
Room
25
-
-
Full
10
-
75
Full
1
- 75
-
Room
0.2
-
0.5
Full
-
-
2
Full
-
- 500
-
ns
pC
pF
Power Supplies
Positive Supply Current
I+
Negative Supply Current
I-
Positive Supply Current
I+
Negative Supply Current
I-
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VEN = VA = 0 V or 5 V
VEN = VA = 0 V or 5 V
μA
mA
μA
Document Number: 67952
S11-1003-Rev. A, 23-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG408MIL, DG409MIL
Vishay Siliconix
SPECIFICATIONSa (Single Supply)
TEST CONDITIONS UNLESS
OTHERWISE SPECIFIED
PARAMETER
SYMBOL
V+ = 12 V, V- = 0 V
VAL = 0.8 V, VAH = 2.4
TEMP.b
TYP.c
VF
A SUFFIX
- 55 °C to 125 °C
UNIT
MIN.d
MAX.d
Analog Switch
Drain-Source
On-Resistancee, f
RDS(on)
VD = 3 V, 10 V, IS = - 1 mA
Room
90
-
-
Switching Time of
Multiplexere
tTRANS
VS1 = 8 V, VS8 = 0 V, VIN = 2.4 V
Room
180
-
-
Enable Turn-On Timee
tON(EN)
VINH = 2.4 V, VINL = 0 V,
VS1 = 5 V
Room
180
-
-
Enable Turn-Off Timee
tOFF(EN)
Room
120
-
-
CL = 1 nF, VS = 0 V, RS = 0
Room
5
-
-

Dynamic Characteristics
Charge Injectione
Q
ns
pC
Notes
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. RDS(on) = RDS(on) max. - RDS(on) min.
h. Worst case isolation occurs on channel 4 due to proximity to the drain pin.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 67952
S11-1003-Rev. A, 23-May-11
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DG408MIL, DG409MIL
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
80
60
VS = 0 V for I D(off)
VS = V D for ID(on)
V+ = 15 V
V- = - 15 V
40
60
CD(on)
DG408 ID(off)
CD(off)
I D (pA)
C S, D (pF)
20
40
DG409 ID(off)
DG409 ID(on)
0
- 20
20
DG408 ID(on)
CS(off)
- 40
0
- 60
- 15
- 10
-5
0
5
10
15
0
2
VANALOG - Analog Voltage (V)
100
15
- 20
- 60
DG409 ID(on)
- 100
5
0
DG408 ID(on), ID(off)
- 140
- 15
V+ = 15 V
V- = - 15 V
10
DG409 ID(off)
IS(off) (pA)
I D (pA)
20
V+ = 15 V
V- = - 15 V
VS = - VD for ID(off)
VD = V S(open) for ID(on)
20
12
Drain Leakage Current vs. Source/Drain Voltage
(Single 12 V Supply)
Source/Drain Capacitance vs. Analog Voltage
60
4
6
8
10
VANALOG - Analog Voltage (V)
V+ = 12 V
V- = 0 V
-5
- 10
- 10
-5
0
5
10
VD or V S - Drain or Source Voltage (V)
15
- 15
0
-5
5
VS - Source Voltage (V)
- 10
10
15
Source Leakage Current vs. Source Voltage
Drain Leakage Current vs. Source/Drain Voltage
2.0
- 100 mA
VSUPPLY = ± 15 V
- 10 mA
1.5
VEN = 2.4 V
I-
V TH (V)
- 1 mA
1.0
- 100 µA
- 10 µA
VEN = 0 V or 5 V
0.5
- 1 µA
- 0.1 µA
0.0
4
8
12
16
20
+ VSUPPLY (V)
Input Switching Threshold vs. Supply Voltage
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100
1K
10K
100K
1M
10M
Switching Frequency (Hz)
Negative Supply Current vs. Switching Frequency
Document Number: 67952
S11-1003-Rev. A, 23-May-11
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG408MIL, DG409MIL
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100 µA
100 mA
VSUPPLY = 15 V
10 µA
10 mA
1 µA
100 nA
I+, I-
VEN = 2.4 V
I+
I+
1 mA
10 nA
1 nA
100 µA
- (I-)
VEN = 0 V or 5 V
VSUPPLY = ± 15 V
VA = 0 V
VEN = 0 V
100 pA
10 µA
10 pA
100
1K
10K
100K
1M
- 55 - 35
10M
- 15
25
5
45
65
85
Switching Frequency (Hz)
Temperature (°C)
Positive Supply Current vs. Switching Frequency
ISUPPLY vs. Temperature
105
125
90
CL = 10 000 pF
VIN = 5 Vp-p
80
20
70
60
10
Q (pC)
I+ (µA)
15
V+ = 15 V
V- = - 15 V
VIN = 0 V
VEN = 0 V
50
V+ = 15 V
V- = - 15 V
40
30
20
5
10
V+ = 12 V
V- = 0 V
0
0
- 55
- 35 - 15
25
5
65
45
85
105
- 10
- 15
125
- 10
-5
5
0
10
15
Temperature (°C)
VS - Source Voltage (V)
Positive Supply Current vs. Temperature (DG408)
Charge Injection vs. Analog Voltage
160
120
140
V+ = 7.5 V
100
±5V
120
R DS(on) (Ω)
R DS(on) (Ω)
80
±8V
± 10 V
± 12 V
60
10 V
100
12 V
80
15 V
60
20 V
40
22 V
40
± 20 V
20
0
- 20
V- = 0 V
± 15 V
20
0
- 16 - 12
-8
-4
0
4
8
12
VD - Drain Voltage (V)
RDS(on) vs. VD and Supply
Document Number: 67952
S11-1003-Rev. A, 23-May-11
16
20
0
4
8
12
16
20
22
VD - Drain Voltage (V)
RDS(on) vs. VD and Supply (Single Supply)
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
130
80
V+ = 15 V
V- = - 15 V
70
85 °C
60
125 °C
50
90
85 °C
40
RDS(on) ()
R DS(on) (Ω)
125 °C
110
25 °C
30
25 °C
70
0 °C
- 40 °C
50
20
0 °C
- 40 °C
- 55 °C
- 55 °C
30
10
0
V+ = 12 V
V- = 0 V
10
- 10
- 15
-5
5
0
10
0
15
6
8
10
12
VD - Drain Voltage (V)
RDS(on) vs. VD and Temperature (Single Supply)
RDS(on) vs. VD and Temperature
- 150
1
RL = 1 kΩ
V+ = 15 V
V- = - 15 V
RL = 1 kΩ
- 130
0
V+ = 15 V
V- = - 15 V
Ref. 1 VRMS
-1
LOSS (dB)
- 110
(dB)
4
2
VD - Drain Voltage (V)
- 90
Off-Isolation
- 70
-2
-3
-4
Crosstalk
- 50
RL = 50 Ω
-5
- 30
-6
100
1K
10K
100K
1M
10M
10
100M
10 0
1K
f - Frequency (Hz)
10K
100K
1M
10M
100M
f - Frequency (Hz)
Off Isolation and Crosstalk vs. Frequency
Insertion Loss vs. Frequency
140
275
250
120
225
t (ns)
t (ns)
tTRANS
100
tOFF(EN)
200
tTRANS
175
tOFF(EN)
tON(EN)
80
150
tON(EN)
125
60
± 10
± 12
± 14
± 16
± 18
± 20
± 22
100
8
9
10
11
12
13
14
VSUPPLY (V)
VSUPPLY (V)
Switching Time vs. Bipolar Supply
Switching Time vs. Single Supply
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Document Number: 67952
S11-1003-Rev. A, 23-May-11
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SCHEMATIC DIAGRAM (Typical Channel)
V+
VREF
GND
D
A0
V+
Level
Shift
AX
V-
Decode/
Drive
S1
V+
EN
Sn
V-
Fig. 1
TEST CIRCUITS
+ 15 V
V+
A2
S1
A1
± 10 V
S2 - S7
A0
DG408
S8
EN
± 10 V
VO
D
GND
V-
50 %
0V
35 pF
300 Ω
50 Ω
Logic
Input
tr < 20 ns
tf < 20 ns
3V
- 15 V
VS1
90 %
Switch
Output
+ 15 V
VO
0V
V+
A1
A0
± 10 V
S1
90 %
VS8
S1a - S4a, Da
DG409
S4b
tTRANS
± 10 V
S1 ON
VO
Db
EN
GND
tTRANS
S8 ON
V300 Ω
50 Ω
35 pF
- 15 V
Fig. 2 - Transition Time
Document Number: 67952
S11-1003-Rev. A, 23-May-11
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TEST CIRCUITS
+ 15 V
V+
S1
-5V
EN
S2 - S8
A0
DG408
A1
A2
GND
VO
D
V-
50 Ω
Logic
Input
50 %
0V
35 pF
1 kΩ
tr < 20 ns
tf < 20 ns
3V
tON(EN)
- 15 V
tOFF(EN)
0V
+ 15 V
Switch
Output
VO
V+
S1b
90 %
-5V
VO
EN
A0
A1
10 %
S1a - S4a, Da
S2b - S4b
DG409
Db
GND
VO
V-
50 Ω
35 pF
1 kΩ
- 15 V
Fig. 3 - Enable Switching Time
+ 15 V
EN
+ 2.4 V
V+
Logic
Input
All S and Da
+5V
tr < 20 ns
tf < 20 ns
3V
50 %
0V
A0
DG408
DG409
A1
A2
GND
50 Ω
Db, D
VO
VS
V-
- 15 V
300 Ω
80 %
Switch
Output
35 pF
VO
0V
tOPEN
Fig. 4 - Break-Before-Make Interval
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Document Number: 67952
S11-1003-Rev. A, 23-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG408MIL, DG409MIL
Vishay Siliconix
TEST CIRCUITS
+ 15 V
Rg
V+
SX
Logic
Input
EN
OFF
ON
OFF
0V
A0
Channel
Select
3V
VO
D
A1
CL
10 nF
A2
GND
V-
ΔVO
Switch
Output
ΔVO is the measured voltage due to charge transfer
error Q, when the channel turns off.
Q = CL x ΔVO
- 15 V
Fig. 5 - Charge Injection
+ 15 V
+ 15 V
VIN
V+
SX
VS
Rg = 50 Ω
VIN
SX
VS
S8
A0
D
V+
S1
S8
VO
A1
A0
A2
GND
RL
1 kΩ
V-
EN
Rg = 50 Ω
VO
D
A1
A2
GND
EN
RL
1 kΩ
V-
- 15 V
VOUT
Off Isolation = 20 log
- 15 V
VIN
Crosstalk = 20 log
VOUT
VIN
Fig. 7 - Crosstalk
Fig. 6 - Off Isolation
VS
S1
+ 15 V
+ 15 V
V+
V+
Rg = 50 Ω
S1
Meter
A2
A0
D
VO
A1
Channel
Select
HP4192A
Impedance
Analyzer
or Equivalent
S8
A1
A0
A2
GND
EN
V-
RL
1 kΩ
- 15 V
Insertion Loss = 20 log
D
GND
VOUT
EN
f = 1 MHz
V- 15 V
VIN
Fig. 8 - Insertion Loss
Document Number: 67952
S11-1003-Rev. A, 23-May-11
Fig. 9 - Source Drain Capacitance
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG408MIL, DG409MIL
Vishay Siliconix
APPLICATION HINTS
Overvoltage Protection
A very convenient form of overvoltage protection consists of
adding two small signal diodes (1N4148, 1N914 type) in
series with the supply pins (see figure 10). This arrangement
effectively blocks the flow of reverse currents. It also floats
the supply pin above or below the normal V+ or V- value. In
this case the overvoltage signal actually becomes the power
supply of the IC. From the point of view of the chip, nothing
has changed, as long as the difference VS - (V-) does not
exceed + 44 V. The addition of these diodes will reduce the
analog signal range to 1 V below V+ and 1 V above V-, but it
preserves the low channel resistance and low leakage
characteristics.
V+
1N4148
SX
D
Vg
DG408
1N4148
V-
Fig. 10 - Overvoltage Protection Using Blocking Diodes
Differential 4-Channel Sequential Multiplexer/Demultiplexer
8-Channel Sequential Multiplexer/Demultiplexer
+ 15 V
V+
S1
GND
V+
S1a
V-
S3
S4
DG408
D
NC
DM7493
QB
QC
S2b
QA
r01
r02 GND
NC
Db
S3b
A1
A2
S4b
A0
EN
QD
AIN
Differential
Analog
Outputs
(Inputs)
S1b
+ 15 V
BIN
Da
DG409
S7
Clock
In
V-
S4a
S6
+ 15 V
GND
S3a
Differential
Analog
Inputs
(Outputs)
S5
S8
A0
- 15 V
S2a
Analog
Output
(Input)
S2
Analog
Inputs
(Outputs)
+ 15 V
- 15 V
Clock
In
J
Q
1/2 MM74C73
CLK
K
CLEAR
+ 15 V
Q
GND
A1
EN
J
Q
1/2 MM74C73
CLK
NC
Q
K
NC
CLEAR
6
Enable In
Reset Enable
(MUX On-Off Control)
Fig. 11
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?70062.
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Document Number: 67952
S11-1003-Rev. A, 23-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
CERDIP: 16ĆLEAD
16
15
14
13
12
11
10
9
E1 E
1
2
3
4
5
6
7
8
D
S
Q1
A
A1
L1
L
e1
C
B
B1
MILLIMETERS
Dim
A
A1
B
B1
C
D
E
E1
e1
eA
L
L1
Q1
S
∝
eA
INCHES
Min
Max
Min
Max
4.06
5.08
0.160
0.200
0.51
1.14
0.020
0.045
0.38
0.51
0.015
0.020
1.14
1.65
0.045
0.065
0.20
0.30
0.008
0.012
19.05
19.56
0.750
0.770
7.62
8.26
0.300
0.325
6.60
7.62
0.260
0.300
2.54 BSC
∝
0.100 BSC
7.62 BSC
0.300 BSC
3.18
3.81
0.125
0.150
3.81
5.08
0.150
0.200
1.27
2.16
0.050
0.085
0.38
1.14
0.015
0.045
0°
15°
0°
15°
ECN: S-03946—Rev. G, 09-Jul-01
DWG: 5403
Document Number: 71282
03-Jul-01
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1
Packaging Information
Vishay Siliconix
20ĆLEAD LCC
A1
D
L1
A
Dim
28
e
1
2
E
A
A1
B
D
E
e
L
L1
MILLIMETERS
Min
Max
INCHES
Min
Max
1.37
2.24
0.054
0.088
1.63
2.54
0.064
0.100
0.56
0.71
0.022
0.028
8.69
9.09
0.342
0.358
8.69
9.09
0.442
0.358
1.27 BSC
0.050 BSC
1.14
1.40
0.045
0.055
1.96
2.36
0.077
0.093
ECN: S-03946—Rev. B, 09-Jul-01
DWG: 5321
L
Document Number: 71290
02-Jul-01
B
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1
Package Information
www.vishay.com
Vishay Siliconix
Flat Pack: 16 Leads
D
L
E3
16 15 14
13
12
11 10 9
E2
1 2
3
4
5
6
7 8
C
e
Q
B
S
DIM.
A
S1
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
A
1.52
2.54
0.060
0.100
B
0.38
0.48
0.015
0.019
C
0.10
0.15
0.004
0.006
D
9.91
10.41
0.390
0.410
E
6.60
7.11
0.260
0.280
E2
4.45
4.95
0.175
0.195
E3
0.76
1.27
0.030
0.050
e
1.27 BSC
0.050 BSC
L
7.62
8.89
0.300
0.350
Q
0.66
1.14
0.026
0.045
S
-
1.14
-
0.045
S1
0.013
-
0.005
-
ECN: S15-1674-Rev. D, 27-Jul-15
DWG: 5343
Revison: 27-Jul-15
1
Document Number: 74786
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
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Vishay
Disclaimer
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Revision: 13-Jun-16
1
Document Number: 91000
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