MIC5031 Micrel MIC5031 High-Speed High-Side MOSFET Driver Not Recommended for New Designs General Description Features The MIC5031 MOSFET driver is designed to switch an N-channel enhancement-type MOSFET from a TTL control signal in a high-side switch application. The MIC5031 provides overcurrent protection, can accommodate loads with high-inrush current, and is designed to survive automotive power disturbances. This driver is suitable for up to 30kHz PWM operation with 0% to 100% duty cycle. The MIC5031 is powered by the +4.5V to +30V load voltage. An external bootstrap capacitor and internal charge pump drive the gate output higher than the supply voltage. The bootstrap capacitor provides speed, while the charge pump can sustain the high gate output voltage continuously. • +4.5V to +30V operation • Fast gate drive (rise time = 70ns, fall time = 50ns, with 1000pF load and 5V supply) • Overcurrent detection across MOSFET • Overcurrent shutdown delay • Charge pump for high-side dc applications • TTL compatible input • Overtemperature shutdown • Automotive load dump protection • Reverse battery protection • Open-collector fault flag • Near zero-current disable state The MIC5031 features a resistor programmable overcurrent shutdown (circuit breaker) function that monitors the voltage drop across the external MOSFET. A capacitor programmable shutdown delay allows a high-inrush current load to be energized without causing undesired shutdown. An openload detection feature is included and can be used by adding an external high-value resistor. The MIC5031 is protected against automotive load dump and reverse battery conditions. The driver is also protected from excessive power dissipation by an internal overtemperature shutdown circuit. An open-collector fault flag output indicates overcurrent, overtemperature, or open-load fault conditions. Applications • • • • Automotive power switch Automotive PWM control Circuit breaker PWM circuits Ordering Information Part Number Temperature Range Package MIC5031BM –40°C to +85°C 16-lead SOIC Typical Application +4.5V to +30V 100µF 51k 100nF 10k§ MIC5031 7 0.01µF§ Enable Disable 4 On Off 3 0.01µF 10 8 0.01µF 11 9 5 VDD EN CTL FLG RV G CP1+ CB CP1– S CP2+ RI CP2– CS GND DLY 1 14 Normal Fault 1k* IRF540 16 12 100k† 0.1µF 13 15 6 2 0.1µF 50pF‡ 12k* M 2N5822 15µF * Sets Overcurrent Trip to MOSFET VDS ≈ 102mV † Optional Resistor for Open-Load Detection ‡ Optional Capacitor for Overcurrent Delay § Optional Resistor and Capacitor for Power-up Sequence High-Side Power Switch and Circuit Breaker Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com August 1999 1 MIC5031 MIC5031 Micrel Pin Configuration FLG 1 16 G DLY 2 15 RI CTL 3 14 RV EN 4 13 S GND 5 12 CB CS 6 11 CP2+ VDD 7 10 CP1+ CP1– 8 9 CP2– 16-lead SOIC (M) Pin Description Pin Number Pin Name 1 FLG Fault Flag: (Output): Open-collector output sinks current upon overcurrent, open-load, or overtemperature detection. 10mA maximum load. 2 DLY Overcurrent Delay Time Capacitor: Optional. Capacitor to ground delays activation of overcurrent shutdown. 3 CTL Control (Input): TTL compatible on/off control input. Logic high drives the gate output above the supply voltage. Logic low forces the gate output near ground. Logic low also resets the overcurrent fault latch. 4 EN Enable (Input): CMOS compatible input. Logic high enables the charge pump. Logic low disables the charge pump and draws near zero supply current. 5 GND 6 CS 7 VDD Supply (Input): +4.5V to +30V supply. 8 CP1– Charge Pump Capacitor #1: Refer to CP1+. 9 CP2– Charge Pump Capacitor #2: Refer to CP2+. 10 CP1+ Charge Pump Capacitor #1: External 0.01µF voltage tripler capacitor. 11 CP2+ Charge Pump Capacitor #2: External 0.01µF voltage tripler capacitor. 12 CB 13 S 14 RV Reference Voltage Resistor: Resistor to VDD provides a reference voltage drop. A voltage drop across the external MOSFET that is greater than the voltage drop across the reference resistor indicates an overcurrent condition. (Refer to applications section) Zero temperature coefficient resistor recommended. 15 RI Reference Current Resistor: Resistor to GND sets constant current value through RV resistor (Refer to applications section) and matches temperature compensation of RV resistor. Zero temperature coefficient resistor recommended. 16 G Gate (Output) : Gate connection to external MOSFET. MIC5031 Pin Function Ground: Power return. Internal Supply Storage Capacitor: 10µF external capacitor to GND. Provides additional current to internal circuitry during switching transitions. Bootstrap Capacitor: 0.1µF capacitor to source for fastest rise time. Source: Source connection to external MOSFET. 2 August 1999 MIC5031 Micrel Absolute Maximum Ratings Operating Ratings Supply Voltage (VDD) .................................................. +36V Enable Input Voltage (VEN) ......................................... +36V Control Input Voltage (VCTL) VDD ≤ 15V ..................................................................VDD VDD > 15V ............................................................... +15V Flag Output Voltage (VFLG) ......................................... +36V Reference Voltage Input (VRV) .................................... +36V Junction Temperature (TJ) ........................................ 150°C Supply Voltage (VDD) ................................... +4.5V to +30V Ambient Temperature Range (TA) A-temperature range ............................ –55°C to +125°C B-temperature range .............................. –40°C to +85°C Package Thermal Resistance (θJA) SOIC ................................................................. 115°C/W Electrical Characteristics VDD = 12V; CB = 0.1µF, CP1 = CP2 = 0.01µF; TA = 25°C; unless noted Symbol Parameter Condition IDD Supply current Min Typ Max Units VEN = 0V, VCTL = 0V 0.3 3 µA VEN = 12V, VCTL = 0V 1.0 mA VEN = 12V, VCTL = 5V 0.72 mA VDD = –12V –0.2 –5 µA IDDR Reverse voltage leakage current VCTL Control input voltage threshold VCTLH Control input voltage hysteresis ICTL Control input current VEN Enable input voltage threshold IEN Enable input current VIOS Overcurrent comparator offset IRV Current limit reference current RRI = 12.0k tSHDL Overcurrent shut down delay CDLY = 50pF 16 µs VG Gate drive voltage VEN = 12V, VCTL = 5V 25 V tDLR Gate turn-on delay VEN = 12V, CL = 1000p 420 ns tR Gate rise time CL = 1000pF 90 ns tDLF Gate turnoff delay CL = 1000pF 300 ns tF Gate fall time CL = 1000pF 50 ns VOLTH Open-load threshold voltage VEN = 12V, VCTL = 0V 6.3 V TOT Overtemperature shut down VEN = 12V, VCTL = 5V 140 °C TOTH Overtemp. shut down hysteresis VEN = 12V, VCTL = 5V fCP Charge pump frequency VDD = 5V, Note 1 190 kHz VFLG Flag active voltage open load error, IFLG = 2mA (sink) 0.2 V 1.55 0.2 V 0.5 1.0 V 0.1 1 µA 6 0.1 97 100 V 1 µA ±5 mV 103 µA °C 10 General Note: Devices are ESD protected; however, handling precautions are recommended. Note 1: Oscillator burst mode at VDD ≥ 5.2V. August 1999 3 MIC5031 MIC5031 Micrel Block Diagram VSUPPLY C1 CP1– CP1+ C2 CP2– CP1+ VDD Charge Pump CS Bias Regulator Voltage Tripler Oscillator Gate Drive Regulator CB C3 Osc. Disable Gate Driver External N-Channel MOSFET G Reset Open-Load Detect Resistor (Optional) Logic CTL (TTL) Open-Load Detect S EN (CMOS) Voltage Comp. R1 Inductive Load Current Limit Delay RV DLY 1.23V Bandgap Reference Overcurrent Delay Capacitor (Optional) Ref. Current Amp. C4 RI Lockout Latch R2 FLAG Overtemp. Detect MIC5031 GND MIC5031 with External Components MIC5031 4 August 1999 MIC5031 Micrel Current Sense Refer to the “Voltage Reference (Simplified)” diagram. Functional Description Refer to “Functional Diagram.” The MIC5031 is a noninverting device. Applying a CMOS logic high signal to EN (enable input) activates the driver’s internal circuitry. Applying a TTL logic high signal to CTL (control input) produces gate drive output. The G (gate) output is used to turn on an external N-channel MOSFET. The MIC5031 detects an overcurrent condition by comparing the voltage drop across the external MOSFET to a reference voltage drop created across R1. If VDS exceeds VR1, a comparator (not shown) shuts off the external MOSFET by way of the current limit delay, lockout latch, and logic. The bandgap reference, op amp and NPN create a constant voltage (1.23V) across R2. This results in a constant current, IR2, through R2. Ignoring a small amount of base current, the same current (IR2) flows through R1. R1 is selected to achieve the desired reference voltage drop, VR1. Refer to the applications section for formulas. Control CTL (control) is a TTL compatible input. The threshold is approximately 1.4V, independent of the supply voltage. The falling edge of a signal applied to CTL also resets the overcurrent lockout latch. Enable EN (enable) is a CMOS compatible input. EN enables or disables all internal circuitry. The enable threshold is approximately half the supply voltage. The MIC5031 supply current is near zero when the driver is disabled (low). See “Applications Information: Power-Up Sequence.” Supply VR1 IR2 External N-Channel VDS MOSFET RV Load 1.23V Bandgap Reference Charge Pump The charge pump produces a voltage that is higher than the supply voltage. This higher voltage is required to drive the external N-channel MOSFET in high-side switch circuits. The charge pump consists of an oscillator and a voltage tripler. When the driver is enabled, the charge pump is switched on and off to regulate its output voltage. R1 RI IR2 1.23V R2 Voltage Reference (Simplified) External capacitors C1 and C2 are required. The charge pump will not operate without these capacitors. Bootstrap Capacitor An overcurrent condition also activates the fault flag output when the lockout latch is activated. Overcurrent-Shutdown Delay The external bootstrap capacitor is necessary to achieve the fastest gate rise times. The bootstrap capacitor (C3) supplies additional current at a higher voltage to the gate drive regulator as the MOSFET is switched on. When the MOSFET is off, the gate drive regulator voltage is applied to the boost capacitor . As the MOSFET turns on, the MOSFET source-to-ground voltage increases. The increasing source voltage is added to the voltage across the capacitor for a voltage doubling effect. Gate Drive Regulator The overcurrent-shutdown delay circuit permits a delay between overcurrent detection and latch activation for highinrush current loads. The delay can be increased by adding capacitance from DLY to GND. Open-Load Detect The open load detect resistor is an external high-value pullup resistor that causes the source voltage of the external MOSFET to increase when the load is missing. The MIC5031 monitors the S-pin voltage only when the gate driver is off. If the voltage on the S-pin rises above the openload detect threshold, the fault flag is activated. The gate drive regulator manages the voltage from the bootstrap capacitor, the supply, and the charge pump. The gate drive regulator charges the bootstrap capacitor when the MOSFET is off and limits the voltage from the bootstrap capacitor as the MOSFET is switched on. It also performs skip-mode control by switching the charge pump on and off to regulate the gate drive output voltage. Overtemperature Detect The overtemperature detect circuit switches the logic to turn the output off at approximately 140°C. An overtemperature shutdown condition is restored to normal automatically When the device cools to about 130°C (10°C hysteresis). Gate Output When the MIC5031 is enabled and CTL is high, the gate driver steers regulated voltage to G (gate output). When CTL is low, the gate driver grounds G. This respectively charges or discharges the external MOSFET’s gate, . August 1999 An overtemperature condition also activates the fault flag output. Fault Flag FLT (fault flag) is an open-collector NPN transistor. Fault is active (pulls collector near ground) upon overcurrent, openload, or overtemperature. 5 MIC5031 MIC5031 Micrel Reference Current Resistor Resistor R2 sets the reference current. For most applications, a reference current of 100µA is suggested. Applications Information Power-Up Sequence The supply voltage (VDD) must be applied to VDD before EN is asserted. If EN is not required for the application, an RC network must be used to delay the voltage rise applied to EN with respect to VDD. See Figure 1. R2 = where: R2 = reference current resistor (Ω) +4.5V to +30V 100µF IR2 = reference current (A) [R2 = 12kΩ for approximately 100µA] Reference Voltage Resistor 100nF MIC5031 7 0.01µF 10k On Off 0.01µF 4 3 10 8 0.01µF 11 9 5 VDD EN CTL CP1+ FLG RV G CB CP1– S CP2+ RI CP2– CS GND DLY 1 14 The reference voltage resistor value is calculated from the reference current and the reference voltage (overcurrent drop voltage). IRF540 16 0.1µF 12 13 V R1 = R1 IR2 15 6 R1 IR2 0.1µF 2 12k* M 2N5822 where: 15µF R1 = reference voltage resistor (Ω) VR1 = reference voltage (V) [see above] IR2 = reference current (A) [see above] Overcurrent Delay Capacitor Figure 1. Enable Application Refer to “Typical Application” for controlling EN from opencollector or open-drain logic. The 10k resistor and 0.01µF capacitor connected to VDD, GND, and EN keep EN low during power up before the open-collector or open-drain logic becomes active. For lamp switching applications, the delay capacitor (CDLY) may be as high as several microfarads. Lamps often have an inrush current of 10× their steady-state operating current. In PWM applications, pay attention to the input frequency vs. the overcurrent delay. They can conflict with each other if not properly planned. The 10k resistor and 0.01µF capacitor can be omitted if EN is held low by the external logic until VDD is powered. Overcurrent Detection Using the MOSFET manufacturer’s data and the maximum allowable load current, determine the maximum drain-tosource voltage drop, VDS, that will occur across the external MOSFET in normal operation. This will also be the reference voltage and the overcurrent trip voltage, VR1. VR1 = maximum RDS(on) × maximum load current Supply VR1 IR2 R1 External N-Channel VDS MOSFET RV Load 1.23V Bandgap Reference RI IR2 1.23V R2 Figure 2. Resistor Calculations MIC5031 6 August 1999 MIC5031 Micrel Package Information PIN 1 0.157 (3.99) 0.150 (3.81) DIMENSIONS: INCHES (MM) 0.020 (0.51) REF 0.050 (1.27) BSC 0.0648 (1.646) 0.0434 (1.102) 0.020 (0.51) 0.013 (0.33) 0.0098 (0.249) 0.0040 (0.102) 0.394 (10.00) 0.386 (9.80) SEATING PLANE 45° 0°–8° 0.050 (1.27) 0.016 (0.40) 0.244 (6.20) 0.228 (5.79) 16-Lead SOIC (M) August 1999 7 MIC5031 MIC5031 Micrel MICREL INC. TEL 1849 FORTUNE DRIVE SAN JOSE, CA 95131 + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB USA http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 1999 Micrel Incorporated MIC5031 8 August 1999