IRF IRS21858SPBF High(dual mode) side driver Datasheet

June 7, 2010
Datasheet No – PD 97420
IRS21858SPBF
High(Dual Mode) Side Driver
Product Summary
Features
•
•
•
•
•
•
•
High side programmable ramp gate drive
High side generic gate driver integrated using the
same high side output pin
Additional high side generic gate driver
Under voltage lockout for VCC & VBS
5V input logic compatible
Tolerant to negative transient voltage on VS
RoHS compliant
Topology
PDP
VOFFSET
≤ 600 V
Io+ & I o- (typical)
290mA & 600mA
tON & tOFF (typical)
160ns & 160ns
Package Options
SOIC16N
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IRS21858SPBF
Table of Contents
Page
Description
3
Simplified Block Diagram
4
Typical Application Diagram
5
Qualification Information
6
Absolute Maximum Ratings
7
Recommended Operating Conditions
7
Static Electrical Characteristics
8
Dynamic Electrical Characteristics
9
Timing Diagram and logic truth table
10
Input/Output Pin Equivalent Circuit Diagram
14
Lead Definitions
15
Lead Assignments
15
Package Details
16
Tape and Reel Details
17
Part Marking Information
18
Ordering information
19
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IRS21858SPBF
Description
The IRS21858 is high voltage and programmable ramp slope control gate driver for MOSFET and IGBT with
single high side dual mode driver and additional generic gate driver. Proprietary HVIC and latch immune
CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with 5V
standard CMOS or LSTTL output. The output driver features a programmable slope control by external R
and input signal. The floating channels can be used to drive an N-channel power MOSFET or IGBT in the
high side configuration, which operates up to 600 volts above the COM ground.
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IRS21858SPBF
Simplified Block Diagram
VB
HO3
UVLO
VCC
UVLO
HIN1
HIN2
HIN 3
Logic
&
Pulse
Generator
R
Pulse
R
Filter
Q
-
Conditioning
And Op- amp
Driving
HO
+
S
VSE
Reference
Generating
VREF
9 V
regulator
VS
RES1
COM
RES2
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IRS21858SPBF
Typical Connection Diagrams
VSUS
25V Max
VCC
VB
COM
HO3
HIN3
HO
IRS21858
HIN1
VSE
SON16
HIN2
RRES1
RES1
Optional CC
RRES2
NC
RES2
NC
VS
NC
VREF
Panel
CREF
Linear Ramp driver’s connection diagram (Dual slope)
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© 2008 International Rectifier
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IRS21858SPBF
Qualification Information†
Qualification Level
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
IC Latch-Up Test
RoHS Compliant
Industrial††
Comments: This family of ICs has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification
level is granted by extension of the higher Industrial
level.
MSL2††† 260°C
(per IPC/JEDEC J-STD-020)
Class B
(per JEDEC standard JESD22-A115)
Class 2
(per EIA/JEDEC standard EIA/JESD22-A114)
Class I , Level A
(per JESD78)
Yes
†
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
†† Higher qualification ratings may be available should the user have such requirements. Please
contact your International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
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© 2008 International Rectifier
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IRS21858SPBF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM.
Symbol
Definition
VCC
Low side supply voltage
VIN
Logic input voltage (HIN1, HIN2, HIN3)
VVSE,
High side inputs voltage
VVREF
VRES1,
High side inputs voltage
VRES2
VB
High side floating well supply voltage
VS
High side floating well supply return voltage
VHO
Floating gate drive output voltage
VHO3
Floating gate drive output voltage
dVS/dt Allowable VS offset supply transient relative to COM
PD
Package Power Dissipation @ TA<=+25ºC
RθJA
Thermal Resistance, Junction to Ambient
TJ
Junction Temperature
TS
Storage Temperature
TL
Lead temperature (Soldering, 10 seconds)
Min
-0.3
COM-0.3
Max
25
VCC +0.3
Units
V
V
VS-0.3
VB+0.3
V
VS-0.3
VB+0.3
V
-0.3
VB-25
VS-0.3
VS-0.3
-55
-55
-
625
VB+0.3
VB+0.3
VB+0.3
50
1.0
120
150
150
300
V
V
V
V
V/ns
W
ºC/W
ºC
ºC
ºC
Recommended Operating Conditions
For proper operation, the device should be used within the recommended conditions. All voltage parameters
are absolute voltages referenced to COM. The offset rating are tested with supplies of (VCC-COM) = (VBVS)=15V.
Symbol
VCC
VIN
VHO3
VB
VRES1,RES2
V VREF, VSE
VS
VHO
RRES1
RRES2
TA
†
††
Definition
Low side supply voltage
HIN1, HIN2, LIN3 input voltage
High side gate drive output voltage
High side floating well supply voltage
RES input voltage
VREF and VSE input voltage
High side floating well supply offset voltage
Floating gate drive output voltage
RES1 resistor
RES2 resistor
Ambient Temperature
Min
10
COM
VS
VS+10
VS
VS
Note2
VS
50
2.5
-40
Max
20
VCC
VB
VS+20
VB
VB -3
600
VB
300
300
125
Units
V
V
V
V
V
V
V
V
kΩ
kΩ
ºC
VS and VB voltages will be tolerant to short negative transient spikes. These will be defined and
specified in the future.
Logic operation for Vs of -5 to 600V. Logic state held for Vs of -5V to –VBS. (Please refer to Design
Tip DT97-3 for more details).
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IRS21858SPBF
Static Electrical Characteristics (All values are target data)
(VCC-COM) = (VB-VS)=15V. TA = 25ºC. The VIN, VIN TH and IIN parameters are referenced to COM. The VO
and IO parameters are referenced to VS and are applicable to the respective output leads HO, HO3. The
VCCUV parameters are referenced to COM. The VBSUV parameters are referenced to VS.
Symbol
VCCUV+
VCCUVVBSUV+
VBSUVILK
IQBS
Definition
VCC supply undervoltage positive going
threshold
VCC supply undervoltage negative
going threshold
VBS supply undervoltage positive going
threshold
VBS supply undervoltage negative
going threshold
High side floating well offset supply
leakage current
Min
Typ
Max
8.0
8.9
9.8
7.4
8.2
9.0
8.0
8.9
9.8
7.4
8.2
9.0
---
---
50
---
2.5
3.75
Quiescent VBS supply current
---
1.45
2.2
---
120
250
---
---
VIH
Logic “1” input voltage
VIL
Logic “0” input voltage
---
---
0.8
IIN+
Logic “1” input bias current
---
10
---
Io-_ HO,HO3
VOL _
HO, HO3
VOH _
HO, HO3
µA
3.5
Logic “0” input bias current
---
VB = VS = 600V
IN1, 2 = 5V
mA
Quiescent VCC supply current
Io+_ HO,HO3
Test Conditions
V
IQCC
IIN -
Units
µA
IN1, 2 = 0V
IN1,2,3 = 0V or 5V
V
VIN =5V
µA
VIN =0V
---
0
---
290
---
---
600
---
Low level output voltage
---
30
110
mV
Io=2mA
High level output voltage, Vbias-Vo
---
50
130
mV
Io=2mA
Output high short circuit pulsed current
mA
Output low short circuit pulsed current
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VO=15V,VIN=5V,
PW<=10us
VO=0V,VIN=0V,
PW<=10us
© 2008 International Rectifier
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IRS21858SPBF
Dynamic Electrical Characteristics (All values are target data)
(VCC-COM)= (VB-VS)=15V. TA = 25ºC. CL = 1000pF unless otherwise specified. All parameters are
reference to COM.
Symbol
Definition
Min
Typ
Max Units
Test Conditions
Internal Operational Amplifier Characteristics
GBD*
CREF =1nF, VSE open,
RRES1 =100K, HIN1=5V,
HIN2=com
GBD*
CREF =1nF, VSE open,
RRES2 =4.99K, HIN1=5V,
HIN2=5V
t ref_ln_ramp1
Vref Falling time of Linear ramp
reference 9V to 2V
---
277.8
---
µs
t ref_ln_ramp2
Vref Falling time of Linear ramp
reference 9V to 2V
---
14
---
µs
I ref_ln_ramp1
Vref DC current of Linear ramp
reference at 5V
22.68
25.2
27.72
uA
CREF =1nF, VSE open,
RRES1 =100K, HIN1=5V,
HIN2=com
I ref_ln_ramp2
Vref DC current of Linear ramp
reference at 5V
450
500
550
uA
CREF =1nF, VSE open,
RRES2 =4.99K, HIN1=5V,
HIN2=5V
Gm
OTA transconductance
---
12
---
mS
CL_HO=1nF,
RRES1,2 open
Gopen loop
Open loop gain
45
60
---
dB
Cc =1nF,
RRES1,2 open
BWSS
Small signal bandwidth
---
3.5
---
MHz
Cc =1nF,
RRES1,2 open
VOS
Input offset voltage
---
20
---
mV
RRES1,2 open
HO SR+
Output positive slew rate
---
4.5
---
V/µs
CL_HO=1nF,
RRES1,2 open
CMRR
Common mode rejection ratio
50
65
---
dB
RRES1,2 open
PSRR
Power supply rejection ratio
50
65
---
dB
RRES1,2 open
ns
Gate Drive Mode
CL =1nF
Propagation Delay Characteristics
t on
Turn-on delay (HO, HO3)
---
160
260
t off
Turn-off delay (HO, HO3)
---
160
260
tr
Turn-on rise from 10% to 90%
---
60
110
tf
Turn-off fall from 90% to 10%
---
20
50
MT
Delay matching, HO & HO3 turnon/off
50
GBD*: Guaranteed by design
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IRS21858SPBF
Figure 1A Input/Output Timing Diagram: Linear Ramp (Dual slope)
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IRS21858SPBF
VREF
VSE
HIN1
HIN2
HIN3
HO
HO3
Figure 1B
Input/Output Timing Diagram : HO/HO3 outputs
Logic Truth Table
HIN1
HIN2
HIN3
OTA of HO
Gate driver of HO
Gate driver of HO3
0
0
0
High impedance (HIZ)
0
0
0
0
1
High impedance (HIZ)
0
1
0
1
0
High impedance (HIZ)
1
0
0
1
1
High impedance (HIZ)
1
1
1
0
0
1
0
1
1
1
0
1
1
1
1
Step(0/1)
1 or 0
Linear ramp rate
controlled by RES1
Linear ramp rate
controlled by RES1
Linear ramp rate
controlled by RES2
Linear ramp rate
controlled by RES2
Stepwise linear
(Dual slope)
High impedance
(HIZ)
High impedance
(HIZ)
High impedance
(HIZ)
High impedance
(HIZ)
High impedance
(HIZ)
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0
1
0
1
1 or 0
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IRS21858SPBF
Figure 2
Timing Definitions of VREF
Figure 3 Switching Time Waveform Definitions of HO and HO3
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IRS21858SPBF
Figure 4 Delay Matching Waveform Definitions
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IRS21858SPBF
Input/Output Pin Equivalent Circuit Diagrams
VB
VB
ESD
Diode
VSE,
VREF
ESD
Diode
RES1,
RES2
RESD
ESD
Diode
RESD
ESD
Diode
VS
VS
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IRS21858SPBF
Lead Definitions
PIN#
Symbol
Description
1
VCC
Low side supply voltage
2
COM
Low side supply return
3
HIN3
Logic input for high side gate driver output
4
HIN1
Logic input for HO ramp reference control
5
HIN2
Logic input for high side gate driver outputs, in phase
6
NC
No Connection
7
NC
No Connection
8
NC
No Connection
9
VREF
10
VS
11
RES1
Adjustable current source resistor input
12
RES2
Adjustable current source resistor input
13
VSE
Voltage sense input
14
HO
High side gate driver output
15
HO3
High side gate driver output
16
VB
External programmable R/C input for ramp generation
High side gate drive floating supply return
High side gate drive floating supply
Lead Assignments
VCC
1
16
VB
COM
2
15
HO3
HIN3
3
14
HO
HIN1
4
13
VSE
IRS21858
SO16N
HIN2
5
12
RES1
NC
6
11
RES2
NC
7
10
VS
NC
8
9
VREF
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IRS21858SPBF
Package Details: SOIC16N
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IRS21858SPBF
Tape and Reel Details: SOIC16N
LOADED TAPE FEED DIRECTION
A
B
H
D
F
C
NOTE : CONTROLLING
DIM ENSION IN M M
E
G
CARRIER TAPE DIMENSION FOR
Metric
Code
Min
Max
A
7.90
8.10
B
3.90
4.10
C
15.70
16.30
D
7.40
7.60
E
6.40
6.60
F
10.20
10.40
G
1.50
n/a
H
1.50
1.60
16SOICN
Imperial
Min
Max
0.311
0.318
0.153
0.161
0.618
0.641
0.291
0.299
0.252
0.260
0.402
0.409
0.059
n/a
0.059
0.062
F
D
C
B
A
E
G
H
REEL DIMENSIONS FOR 16SOICN
Metric
Imperial
Code
Min
Max
Min
Max
A
329.60
330.25
12.976
13.001
B
20.95
21.45
0.824
0.844
C
12.80
13.20
0.503
0.519
D
1.95
2.45
0.767
0.096
E
98.00
102.00
3.858
4.015
F
n/a
22.40
n/a
0.881
G
18.50
21.10
0.728
0.830
H
16.40
18.40
0.645
0.724
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IRS21858SPBF
Part Marking Information
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IRS21858SPBF
Ordering Information
Standard Pack
Base Part Number
IRS21858S
Package Type
SOIC16N
Complete Part Number
Form
Quantity
Tube/Bulk
45
IRS21858SPBF
Tape and Reel
2500
IRS21858STRPBF
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no
responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any
infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by
implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document
are subject to change without notice. This document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252-7105
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© 2008 International Rectifier
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