TI1 LMR64010 Simple switcherâ® 40vout, 1a step-up voltage regulator in sot-23 Datasheet

LMR64010
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SNVS736A – SEPTEMBER 2011 – REVISED NOVEMBER 2011
LMR64010 SIMPLE SWITCHER® 40Vout, 1A Step-Up Voltage Regulator in SOT-23
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FEATURES
DESCRIPTION
•
•
•
•
•
•
•
•
•
The LMR64010 switching regulators is a currentmode boost converter operating at a fixed frequency
of 1.6 MHz.
1
2
Input Voltage Range of 2.7V to 14V
Output Voltage up to 40V
Switch Current up to 1A
1.6 MHz Switching Frequency
Low Shutdown Iq, <1 µA
Cycle-by-Cycle Current Limiting
Internally Compensated
SOT-23-5 Packaging (2.92 x 2.84 x 1.08mm)
Fully Enabled for WEBENCH® Power Designer
PERFORMANCE BENEFITS
•
•
Extremely Easy to Use
Tiny Overall Solution Reduces System Cost
The use of SOT-23 package, made possible by the
minimal power loss of the internal 1A switch, and use
of small inductors and capacitors result in the
industry's highest power density. The 40V internal
switch makes these solutions perfect for boosting to
voltages of 16V or greater.
These parts have a logic-level shutdown pin that can
be used to reduce quiescent current and extend
battery life.
Protection is provided through cycle-by-cycle current
limiting and thermal shutdown. Internal compensation
simplifies design and reduces component count.
APPLICATIONS
•
•
•
•
•
Boost Conversions from 3.3V, 5V, and 12V
Rails
Space Constrained Applications
Embedded Systems
LCD Displays
LED Applications
System Performance
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
LMR64010
SNVS736A – SEPTEMBER 2011 – REVISED NOVEMBER 2011
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L1/10 PH
5VIN
VIN
SHDN
GND
R3
51k
U1
D1
SW
LMR64010
SHDN
GND
C1
2.2 PF
R1/205k
FB
CF
120 pF
R2
13.3k
20V
OUT
170 mA
(TYP)
C2
4.7 PF
Top View
Figure 1. 5-Lead SOT-23 Package
See Package Number DBV0005A
PIN DESCRIPTIONS
2
Pin
Name
1
SW
2
GND
3
FB
4
SHDN
5
VIN
Function
Drain of the internal FET switch.
Analog and power ground.
Feedback point that connects to external resistive divider.
Shutdown control input. Connect to VIN if this feature is not used.
Analog and power input.
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Storage Temperature Range
−65°C to +150°C
Operating Junction
Temperature Range
−40°C to +125°C
Lead Temp. (Soldering, 5 sec.)
300°C
Power Dissipation (3)
Internally Limited
−0.4V to +6V
FB Pin Voltage
−0.4V to +40V
SW Pin Voltage
−0.4V to +14.5V
Input Supply Voltage
−0.4V to VIN + 0.3V
SHDN Pin Voltage
θJ-A (SOT-23-5)
ESD Rating
(4)
265°C/W
Human Body Model
2 kV
Machine Model
200V
For soldering specifications: http://www.ti.com/lit/SNOA549
(1)
(2)
(3)
(4)
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply
when operating the device outside of the limits set forth under the operating ratings which specify the intended range of operating
conditions.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
The maximum power dissipation which can be safely dissipated for any application is a function of the maximum junction temperature,
TJ(MAX) = 125°C, the junction-to-ambient thermal resistance for the SOT-23 package, θJ-A = 265°C/W, and the ambient temperature,
TA. The maximum allowable power dissipation at any ambient temperature for designs using this device can be calculated using the
formula:
If power dissipation exceeds the maximum specified above, the internal thermal protection
circuitry will protect the device by reducing the output voltage as required to maintain a safe junction temperature.
The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin.
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Electrical Characteristics
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range
(−40°C ≤ TJ ≤ +125°C). Unless otherwise specified: VIN = 5V, VSHDN = 5V, IL = 0A.
Parameter
VIN
Test Conditions
Input Voltage
Min (1)
Typ (2)
2.7
(3)
ISW
Switch Current Limit
See
RDS(ON)
Switch ON Resistance
ISW = 100 mA
SHDNTH
Shutdown Threshold
Device ON
1.0
Shutdown Pin Bias Current
Units
14
V
650
mΩ
1.5
500
A
1.5
Device OFF
ISHDN
Max (1)
0.50
VSHDN = 0
0
VSHDN = 5V
0
2
1.230
1.255
V
mA
VFB
Feedback Pin Reference Voltage
VIN = 3V
IFB
Feedback Pin Bias Current
VFB = 1.23V
60
IQ
Quiescent Current
VSHDN = 5V, Switching
2.1
3.0
VSHDN = 5V, Not Switching
400
500
VSHDN = 0
0.024
1
2.7V ≤ VIN ≤ 14V
0.02
ΔVFB
ΔV IN
FB Voltage Line Regulation
FSW
Switching Frequency
DMAX
Maximum Duty Cycle
IL
Switch Leakage
(1)
(2)
(3)
4
V
Not Switching VSW = 5V
1.205
1.15
1.6
87
93
µA
nA
µA
%/V
1.85
MHz
1
µA
%
Limits are ensuredd by testing, statistical correlation, or design.
Typical values are derived from the mean value of a large quantity of samples tested during characterization and represent the most
likely expected value of the parameter at room temperature.
Switch current limit is dependent on duty cycle (see Typical Performance Characteristics). Limits shown are for duty cycles ≤ 50%.
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Typical Performance Characteristics
Unless otherwise specified: VIN = 5V, SHDN pin is tied to VIN.
Iq VIN (Active) vs Temperature
Oscillator Frequency vs Temperature
Figure 2.
Figure 3.
Max. Duty Cycle vs Temperature
Feedback Voltage vs Temperature
93.4
MAX DUTY CYCLE (%)
93.3
93.2
93.1
93.0
92.9
92.8
92.7
-40
-25
0
25
50
75
100
125
o
TEMPERATURE ( C)
Figure 4.
Figure 5.
RDS(ON) vs Temperature
Current Limit vs Temperature
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
Unless otherwise specified: VIN = 5V, SHDN pin is tied to VIN.
RDS(ON) vs VIN
Efficiency vs Load Current (VOUT = 12V)
Figure 8.
Figure 9.
Efficiency vs Load Current (VOUT = 15V)
Efficiency vs Load Current (VOUT = 20V)
100
100
90
90
VIN = 10V
VIN = 5V
70
60
VIN = 3.3V
50
40
VIN = 10V
80
EFFICIENCY (%)
EFFICIENCY (%)
80
VIN = 5V
70
VIN = 3.3V
60
50
40
30
30
20
20
10
10
0
0
0
200
400
600
800
0
1000
100
LOAD CURRENT (mA)
200
600 700
Figure 11.
Efficiency vs Load Current (VOUT = 25V)
Efficiency vs Load Current (VOUT = 30V)
100
100
90
90
VIN = 10V
70
VIN = 5V
60
50
40
VIN = 10V
80
EFFICIENCY (%)
80
EFFICIENCY (%)
500
LOAD CURRENT (mA)
Figure 10.
70
VIN = 5V
60
50
40
30
30
20
20
10
10
0
0
0
50
100 150 200 250 300 350 400
LOAD CURRENT (mA)
0
50
100
150
200
250
300 350
LOAD CURRENT (mA)
Figure 12.
6
300 400
Figure 13.
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Typical Performance Characteristics (continued)
Unless otherwise specified: VIN = 5V, SHDN pin is tied to VIN.
Efficiency vs Load Current (VOUT = 35V)
Efficiency vs Load Current (VOUT = 40V)
100
90
90
80
VIN = 10V
VIN=10V
70
70
EFFICIENCY (%)
EFFICIENCY (%)
80
60
50
40
30
60
50
40
30
20
20
10
10
0
0
0
50
100
150
0
200
LOAD CURRENT (mA)
50
100
150
200
LOAD CURRENT (mA)
Figure 14.
Figure 15.
Block Diagram
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LMR64010
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APPLICATION INFORMATION
Theory of Operation
The LMR64010 is a switching converter IC that operates at a fixed frequency (1.6 MHz) using current-mode
control for fast transient response over a wide input voltage range and incorporates pulse-by-pulse current
limiting protection. Because this is current mode control, a 50 mΩ sense resistor in series with the switch FET is
used to provide a voltage (which is proportional to the FET current) to both the input of the pulse width
modulation (PWM) comparator and the current limit amplifier.
At the beginning of each cycle, the S-R latch turns on the FET. As the current through the FET increases, a
voltage (proportional to this current) is summed with the ramp coming from the ramp generator and then fed into
the input of the PWM comparator. When this voltage exceeds the voltage on the other input (coming from the
Gm amplifier), the latch resets and turns the FET off. Since the signal coming from the Gm amplifier is derived
from the feedback (which samples the voltage at the output), the action of the PWM comparator constantly sets
the correct peak current through the FET to keep the output volatge in regulation.
Q1 and Q2 along with R3 - R6 form a bandgap voltage reference used by the IC to hold the output in regulation.
The currents flowing through Q1 and Q2 will be equal, and the feedback loop will adjust the regulated output to
maintain this. Because of this, the regulated output is always maintained at a voltage level equal to the voltage at
the FB node "multiplied up" by the ratio of the output resistive divider.
The current limit comparator feeds directly into the flip-flop, that drives the switch FET. If the FET current reaches
the limit threshold, the FET is turned off and the cycle terminated until the next clock pulse. The current limit
input terminates the pulse regardless of the status of the output of the PWM comparator.
Application Hints
SELECTING THE EXTERNAL CAPACITORS
The best capacitors for use with the LMR64010 are multi-layer ceramic capacitors. They have the lowest ESR
(equivalent series resistance) and highest resonance frequency which makes them optimum for use with high
frequency switching converters.
When selecting a ceramic capacitor, only X5R and X7R dielectric types should be used. Other types such as
Z5U and Y5F have such severe loss of capacitance due to effects of temperature variation and applied voltage,
they may provide as little as 20% of rated capacitance in many typical applications. Always consult capacitor
manufacturer’s data curves before selecting a capacitor.
SELECTING THE OUTPUT CAPACITOR
A single ceramic capacitor of value 4.7 µF to 10 µF will provide sufficient output capacitance for most
applications. For output voltages below 10V, a 10 µF capacitance is required. If larger amounts of capacitance
are desired for improved line support and transient response, tantalum capacitors can be used in parallel with the
ceramics. Aluminum electrolytics with ultra low ESR such as Sanyo Oscon can be used, but are usually
prohibitively expensive. Typical AI electrolytic capacitors are not suitable for switching frequencies above 500
kHz due to significant ringing and temperature rise due to self-heating from ripple current. An output capacitor
with excessive ESR can also reduce phase margin and cause instability.
SELECTING THE INPUT CAPACITOR
An input capacitor is required to serve as an energy reservoir for the current which must flow into the coil each
time the switch turns ON. This capacitor must have extremely low ESR, so ceramic is the best choice. We
recommend a nominal value of 2.2 µF, but larger values can be used. Since this capacitor reduces the amount of
voltage ripple seen at the input pin, it also reduces the amount of EMI passed back along that line to other
circuitry.
8
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FEED-FORWARD COMPENSATION
Although internally compensated, the feed-forward capacitor Cf is required for stability (see Basic Application
Circuit). Adding this capacitor puts a zero in the loop response of the converter. Without it, the regulator loop can
oscillate. The recommended frequency for the zero fz should be approximately 8 kHz. Cf can be calculated using
the formula:
Cf = 1 / (2 X π X R1 X fz)
(1)
SELECTING DIODES
The external diode used in the typical application should be a Schottky diode. If the switch voltage is less than
15V, a 20V diode such as the MBR0520 is recommended. If the switch voltage is between 15V and 25V, a 30V
diode such as the MBR0530 is recommended. If the switch voltage exceeds 25V, a 40V diode such as the
MBR0540 should be used.
The MBR05XX series of diodes are designed to handle a maximum average current of 0.5A. For applications
exceeding 0.5A average but less than 1A, a Toshiba CRS08 can be used.
LAYOUT HINTS
High frequency switching regulators require very careful layout of components in order to get stable operation
and low noise. All components must be as close as possible to the LMR64010 device. It is recommended that a
4-layer PCB be used so that internal ground planes are available.
As an example, a recommended layout of components is shown:
Figure 16. Recommended PCB Component Layout
Some additional guidelines to be observed:
1. Keep the path between L1, D1, and C2 extremely short. Parasitic trace inductance in series with D1 and C2
will increase noise and ringing.
2. The feedback components R1, R2 and CF must be kept close to the FB pin of U1 to prevent noise injection
on the FB pin trace.
3. If internal ground planes are available (recommended) use vias to connect directly to ground at pin 2 of U1,
as well as the negative sides of capacitors C1 and C2.
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SETTING THE OUTPUT VOLTAGE
The output voltage is set using the external resistors R1 and R2 (see Basic Application Circuit). A value of
approximately 13.3 kΩ is recommended for R2 to establish a divider current of approximately 92 µA. R1 is
calculated using the formula:
R1 = R2 X (VOUT/1.23 − 1)
(2)
Figure 17. Basic Application Circuit
DUTY CYCLE
The maximum duty cycle of the switching regulator determines the maximum boost ratio of output-to-input
voltage that the converter can attain in continuous mode of operation. The duty cycle for a given boost
application is defined as:
VOUT + VDIODE - VIN
Duty Cycle =
VOUT + VDIODE - VSW
(3)
This applies for continuous mode operation.
The equation shown for calculating duty cycle incorporates terms for the FET switch voltage and diode forward
voltage. The actual duty cycle measured in operation will also be affected slightly by other power losses in the
circuit such as wire losses in the inductor, switching losses, and capacitor ripple current losses from self-heating.
Therefore, the actual (effective) duty cycle measured may be slightly higher than calculated to compensate for
these power losses. A good approximation for effctive duty cycle is :
DC (eff) = (1 - Efficiency x (VIN/VOUT))
where
•
the efficiency can be approximated from the curves provided.
(4)
INDUCTANCE VALUE
The first question we are usually asked is: “How small can I make the inductor?” (because they are the largest
sized component and usually the most costly). The answer is not simple and involves tradeoffs in performance.
Larger inductors mean less inductor ripple current, which typically means less output voltage ripple (for a given
size of output capacitor). Larger inductors also mean more load power can be delivered because the energy
stored during each switching cycle is:
E =L/2 X (lp)2
where
•
10
“lp” is the peak inductor current.
(5)
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An important point to observe is that the LMR64010 will limit its switch current based on peak current. This
means that since lp(max) is fixed, increasing L will increase the maximum amount of power available to the load.
Conversely, using too little inductance may limit the amount of load current which can be drawn from the output.
Best performance is usually obtained when the converter is operated in “continuous” mode at the load current
range of interest, typically giving better load regulation and less output ripple. Continuous operation is defined as
not allowing the inductor current to drop to zero during the cycle. It should be noted that all boost converters shift
over to discontinuous operation as the output load is reduced far enough, but a larger inductor stays “continuous”
over a wider load current range.
To better understand these tradeoffs, a typical application circuit (5V to 12V boost with a 10 µH inductor) will be
analyzed. We will assume:
VIN = 5V, VOUT = 12V, VDIODE = 0.5V, VSW = 0.5V
Since the frequency is 1.6 MHz (nominal), the period is approximately 0.625 µs. The duty cycle will be 62.5%,
which means the ON time of the switch is 0.390 µs. It should be noted that when the switch is ON, the voltage
across the inductor is approximately 4.5V.
Using the equation:
V = L (di/dt)
(6)
We can then calculate the di/dt rate of the inductor which is found to be 0.45 A/µs during the ON time. Using
these facts, we can then show what the inductor current will look like during operation:
Figure 18. 10 µH Inductor Current,5V–12V Boost
During the 0.390 µs ON time, the inductor current ramps up 0.176A and ramps down an equal amount during the
OFF time. This is defined as the inductor “ripple current”. It can also be seen that if the load current drops to
about 33 mA, the inductor current will begin touching the zero axis which means it will be in discontinuous mode.
A similar analysis can be performed on any boost converter, to make sure the ripple current is reasonable and
continuous operation will be maintained at the typical load current values.
VIN
SHDN
R3
51k
U1
SW
LMR64010
SHDN
GND
GND
D1
MBR0520
L1/10 PH
5VIN
C1
2.2 PF
R1/117K
FB
R2
13.3k
CF
220 pF
12V
OUT
330 mA
(TYP)
C2
4.7 PF
Figure 19. Typical Application, 5V–12V Boost
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MAXIMUM SWITCH CURRENT
The maximum FET swtch current available before the current limiter cuts in is dependent on duty cycle of the
application. This is illustrated in the graphs below which show both the typical and specified values of switch
current as a function of effective (actual) duty cycle:
1600
SWITCH CURRENT LIMIT (mA)
1400
VIN = 5V
1200
1000
VIN = 3.3V
800
VIN = 2.7V
600
400
200
0
0
20
40
60
80
100
DUTY CYCLE (%) = [1 - EFF*(VIN/VOUT))]
Figure 20. Switch Current Limit vs Duty Cycle
CALCULATING LOAD CURRENT
As shown in the figure which depicts inductor current, the load current is related to the average inductor current
by the relation:
ILOAD = IIND(AVG) x (1 - DC)
where
•
"DC" is the duty cycle of the application.
(7)
ISW = IIND(AVG) + ½ (IRIPPLE)
(8)
Inductor ripple current is dependent on inductance, duty cycle, input voltage and frequency:
IRIPPLE = DC x (VIN-VSW) / (f x L)
(9)
combining all terms, we can develop an expression which allows the maximum available load current to be
calculated:
ILOAD(max) = (1 - DC) x (ISW(max) - DC (VIN - VSW))
2fL
12
(10)
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The equation shown to calculate maximum load current takes into account the losses in the inductor or turn-OFF
switching losses of the FET and diode. For actual load current in typical applications, we took bench data for
various input and output voltages and displayed the maximum load current available for a typical device in graph
form:
Figure 21. Max. Load Current vs VIN
DESIGN PARAMETERS VSW AND ISW
The value of the FET "ON" voltage (referred to as VSW in the equations) is dependent on load current. A good
approximation can be obtained by multiplying the "ON Resistance" of the FET times the average inductor
current.
FET on resistance increases at VIN values below 5V, since the internal N-FET has less gate voltage in this input
voltage range (see Typical Performance Characteristics curves). Above VIN = 5V, the FET gate voltage is
internally clamped to 5V.
The maximum peak switch current the device can deliver is dependent on duty cycle. The minimum value is
specified to be > 1A at duty cycle below 50%. For higher duty cycles, see Typical Performance Characteristics
curves.
THERMAL CONSIDERATIONS
At higher duty cycles, the increased ON time of the FET means the maximum output current will be determined
by power dissipation within the LMR64010 FET switch. The switch power dissipation from ON-state conduction is
calculated by:
P(SW) = DC x IIND(AVE)2 x RDSON
(11)
There will be some switching losses as well, so some derating needs to be applied when calculating IC power
dissipation.
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MINIMUM INDUCTANCE
In some applications where the maximum load current is relatively small, it may be advantageous to use the
smallest possible inductance value for cost and size savings. The converter will operate in discontinuous mode in
such a case.
The minimum inductance should be selected such that the inductor (switch) current peak on each cycle does not
reach the 1A current limit maximum. To understand how to do this, an example will be presented.
In the example, minimum switching frequency of 1.15 MHz will be used. This means the maximum cycle period
is the reciprocal of the minimum frequency:
TON(max) = 1/1.15M = 0.870 µs
(12)
We will assume the input voltage is 5V, VOUT = 12V, VSW = 0.2V, VDIODE = 0.3V. The duty cycle is:
Duty Cycle = 60.3%
Therefore, the maximum switch ON time is 0.524 µs. An inductor should be selected with enough inductance to
prevent the switch current from reaching 1A in the 0.524 µs ON time interval (see below):
Figure 22. Discontinuous Design, 5V–12V Boost
The voltage across the inductor during ON time is 4.8V. Minimum inductance value is found by:
V = L X dl/dt, L = V X (dt/dl) = 4.8 (0.524µ/1) = 2.5 µH
(13)
In this case, a 2.7 µH inductor could be used assuming it provided at least that much inductance up to the 1A
current value. This same analysis can be used to find the minimum inductance for any boost application.
When selecting an inductor, make certain that the continuous current rating is high enough to avoid saturation at
peak currents. A suitable core type must be used to minimize core (switching) losses, and wire power losses
must be considered when selecting the current rating.
SHUTDOWN PIN OPERATION
The device is turned off by pulling the shutdown pin low. If this function is not going to be used, the pin should be
tied directly to VIN. If the SHDN function will be needed, a pull-up resistor must be used to VIN (approximately
50k-100kΩ recommended). The SHDN pin must not be left unterminated.
14
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PACKAGE OPTION ADDENDUM
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24-Jan-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LMR64010XMF/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SF9B
LMR64010XMFE/NOPB
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SF9B
LMR64010XMFX/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SF9B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Only one of markings shown within the brackets will appear on the physical device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
LMR64010XMF/NOPB
SOT-23
DBV
5
1000
178.0
8.4
LMR64010XMFE/NOPB
SOT-23
DBV
5
250
178.0
LMR64010XMFX/NOPB
SOT-23
DBV
5
3000
178.0
3.2
3.2
1.4
4.0
8.0
Q3
8.4
3.2
3.2
1.4
4.0
8.0
Q3
8.4
3.2
3.2
1.4
4.0
8.0
Q3
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMR64010XMF/NOPB
SOT-23
DBV
5
1000
203.0
190.0
41.0
LMR64010XMFE/NOPB
SOT-23
DBV
5
250
203.0
190.0
41.0
LMR64010XMFX/NOPB
SOT-23
DBV
5
3000
206.0
191.0
90.0
Pack Materials-Page 2
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