TI1 INA128U/2K5G4 Ina12x precision, low power instrumentation amplifier Datasheet

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INA128, INA129
SBOS051C – OCTOBER 1995 – REVISED OCTOBER 2015
INA12x Precision, Low Power Instrumentation Amplifiers
1 Features
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1
3 Description
The INA128 and INA129 are low-power, general
purpose instrumentation amplifiers offering excellent
accuracy. The versatile 3-op amp design and small
size make these amplifiers ideal for a wide range of
applications. Current-feedback input circuitry provides
wide bandwidth even at high gain (200 kHz at G =
100).
Low Offset Voltage: 50 μV Maximum
Low Drift: 0.5 μV/°C Maximum
Low Input Bias Current: 5 nA Maximum
High CMR: 120 dB minimum
Inputs Protected to ±40 V
Wide Supply Range: ±2.25 V to ±18 V
Low Quiescent Current: 700 μA
8-PIN Plastic Dip, SO-8
A single external resistor sets any gain from 1 to
10,000. The INA128 provides an industry-standard
gain equation; the INA129 gain equation is
compatible with the AD620.
2 Applications
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•
•
•
•
The INA12x is laser-trimmed for very low offset
voltage (50 μV), drift (0.5 μV/°C) and high commonmode rejection (120 dB at G ≥ 100). The INA12x
operates with power supplies as low as ±2.25 V, and
quiescent current is only 700 μA, ideal for batteryoperated systems. Internal input protection can
withstand up to ±40 V without damage.
Bridge Amplifier
Thermocouple Amplifier
RTD Sensor Amplifier
Medical Instrumentation
Data Acquisition
The INA12x is available in 8-pin plastic DIP and SO-8
surface-mount packages, specified for the –40°C to
85°C temperature range. The INA128 is also
available in a dual configuration, the INA2128.
Device Information(1)
PART NUMBER
INA128
INA129
PACKAGE
BODY SIZE (NOM)
SOIC (8)
3.91 mm × 4.9 mm
PDIP (8)
6.35 mm × 9.81 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
V+
7
2
−
VIN
INA128:
INA128, INA129
G=1+
Over-Voltage
Protection
A1
40kΩ
1
G=1+
A3
8
+
VIN
3
INA129:
40kΩ
25k (1)
RG
50kΩ
RG
6
49.4kΩ
RG
VO
25kΩ(1)
Over-Voltage
Protection
5
A2
Ω
NOTE: (1) INA129: 24.7kΩ
40kΩ
Ref
40kΩ
4
V−
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA128, INA129
SBOS051C – OCTOBER 1995 – REVISED OCTOBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
6.1
6.2
6.3
6.4
6.5
6.6
3
3
4
4
4
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 11
7.1 Overview ................................................................. 11
7.2 Functional Block Diagram ....................................... 11
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 11
8
Application and Implementation ........................ 13
8.1 Application Information............................................ 13
8.2 Typical Application ................................................. 13
9
Power Supply Recommendations...................... 16
9.1 Low Voltage Operation ........................................... 16
10 Layout................................................................... 18
10.1 Layout Guidelines ................................................. 18
10.2 Layout Example .................................................... 19
11 Device and Documentation Support ................. 20
11.1
11.2
11.3
11.4
11.5
Community Resources..........................................
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
20
12 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (February 2005) to Revision C
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
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5 Pin Configuration and Functions
D and P Packages
8 Pin SOIC and PDIP
Top View
RG
1
8
RG
IN
2
7
V+
V+IN
3
6
VO
V−
4
5
Ref
V
−
Pin Functions
PIN
NAME
REF
NO.
I/O
DESCRIPTION
5
I
RG
1,8
—
Reference input. This pin must be driven by low impedance or connected to ground.
Gain setting pin. For gains greater than 1, place a gain resistor between pin 1 and pin 8.
V-
4
—
Negative supply
V+
7
—
Positive supply
VIN-
2
I
Negative input
VIN+
3
I
Positive input
VO
6
I
Output
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
Supply voltage
±18
V
Analog input voltage
±40
V
Output short circuit (to ground)
continuous
Operating temperature
Tstg
(1)
–40
125
°C
Junction temperature
150
°C
Lead temperature (soldering, 10s)
300
°C
125
°C
Storage temperature
–55
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
V(ESD)
(1)
(2)
Electrostatic discharge
UNIT
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±50
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
V power supply
Input common-mode voltage range for VO = 0
MIN
NOM
±2.25
±15
MAX
UNIT
±18
V
V – +2 V
V + –2 V
TA operating temperature INA128-HT
–55
175
°C
TA operating temperature INA129-HT
–55
210
°C
6.4 Thermal Information
INA12x
THERMAL METRIC
(1)
D (SOIC)
P (PDIP)
8 PINS
8 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
110
46.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
57
34.1
°C/W
RθJB
Junction-to-board thermal resistance
54
23.4
°C/W
ψJT
Junction-to-top characterization parameter
11
11.3
°C/W
ψJB
Junction-to-board characterization parameter
53
23.2
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
At TA = 25°C, VS = ±15 V, RL = 10 kΩ, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
INA128P, U
INA129P, U
±10±100/G
±50±500/G
INA128PA, UA
INA129PA, UA
±25±100/G
±125±1000/G
INA128P, U
INA129P, U
±0.2±2/G
±0.5±0/G
INA128PA, UA
INA129PA, UA
±0.2±5/G
±1±20/G
±0.2±20/G
±1±100/G
UNIT
INPUT
Initial
Offset
Voltage, RTI
vs Temperature
vs Power Supply
TA = 25°C
TA = TMIN to
TMAX
VS = ±2.25 V to
±18 V
µV
µV/°C
INA128P, U
INA129P, U
µV/V
INA128PA, UA
INA129PA, UA
±2±200/G
Long-Term Stability
±0.1±3/g
Differential
1010 || 2
Common-Mode
1011 || 9
Impedance
Common-Mode Voltage Range (1)
VO = 0 V
(V+) - 2
(V+) - 1.4
(V-) + 2
(V-) + 1.7
Safe Input Voltage
(1)
4
µV/mo
Ω || pF
V
±40
V
Input common-mode range varies with output voltage - see Typical Characteristics.
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Electrical Characteristics (continued)
At TA = 25°C, VS = ±15 V, RL = 10 kΩ, unless otherwise noted.
PARAMETER
TEST CONDITIONS
G=1
G = 10
Common-Mode Rejection
VCM = ±13 V,
ΔRS = 1 kΩ
G = 100
G = 1000
MIN
TYP
INA128P, U
INA129P, U
80
86
INA128PA, UA
INA129PA, UA
73
INA128P, U
INA129P, U
INA128PA, UA
INA129PA, UA
100
dB
INA128P, U
INA129P, U
120
INA128PA, UA
INA129PA, UA
110
INA128P, U
INA129P, U
120
INA128PA, UA
INA129PA, UA
110
130
nA
±30
INA128P, U
INA129P, U
±1
±5
±10
±30
f = 10 Hz
f = 1 kHz
pA/°C
nA
INA128PA, UA
INA129PA, UA
f = 100 Hz
±5
±10
Offset Current vs Temperature
Noise Current
125
±2
Bias Current vs Temperature
Noise
Voltage, RTI
106
INA128PA, UA
INA129PA, UA
Offset Current
UNIT
93
INA128P, U
INA129P, U
Bias Current
MAX
pA/°C
10
8
G = 1000, RS = 0Ω
nV/√Hz
8
fB = 0.1 Hz to 10 Hz
0.2
f = 10 Hz
0.9
f = 1 kHz
0.3
FB = 0.1 Hz to 10 Hz
30
µVPP
pA/√Hz
pAPP
GAIN
Gain
Equation
INA128
1 + (50 kΩ/RG)
INA129
1 + (49.4
kΩ/RG)
Range of Gain
1
G=1
G = 10
Gain Error
G = 100
G = 1000
INA128P, U
INA129P, U
10000
±0.01%
INA128PA, UA
INA129PA, UA
INA128P, U
INA129P, U
±0.02%
INA128PA, UA
INA129PA, UA
±0.024%
±0.4%
±0.5%
±0.05%
INA128PA, UA
INA129PA, UA
INA128P, U
INA129P, U
V/V
±0.01%
INA128PA, UA
INA129PA, UA
INA128P, U
INA129P, U
V/V
±0.5%
±0.7%
±0.5%
±1%
±2%
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Electrical Characteristics (continued)
At TA = 25°C, VS = ±15 V, RL = 10 kΩ, unless otherwise noted.
PARAMETER
Gain vs Temperature (2)
TEST CONDITIONS
50-kΩ (or 49.4-kΩ) Resistance (2) (3)
VO = ±13.6 V, G = 1
INA128P, U
INA129P, U
TYP
MAX
±1
±10
±25
±100
±0.0001
±0.001
INA128PA, UA
INA129PA, UA
±0.0003
INA128PA, UA
INA129PA, UA
ppm/°C
±0.002
±0.004
INA128P, U
INA129P, U
G = 100
UNIT
±0.002
INA128P, U
INA129P, U
G = 10
Nonlinearity
MIN
G=1
±0.0005
INA128PA, UA
INA129PA, UA
% of FSR
±0.002
±0.004
G = 1000
±0.001
(4)
OUTPUT
Voltage
Positive
RL = 10 kΩ
(V+) - 1.4
(V+) - 0.9
Negative
RL = 10 kΩ
(V-) + 1.4
(V-) + 0.8
V
Load Capacitance Stability
1000
pF
Short Circuit Current
6/–15
mA
G=1
1.3
MHz
G = 10
700
G = 100
200
G = 1000
20
FREQUENCY RESPONSE
Bandwidth, –3 dB
Slew Rate
Settling Time, 0.01%
Overload Recovery
VO = ±10 V, G = 10
4
G=1
7
G = 10
7
G = 100
9
G = 1000
80
50% Overdrive
kHz
V/µs
µs
4
µs
POWER SUPPLY
Voltage Range
Current, Total
±2.25
VIN = 0 V
±15
±18
V
±700
±750
µA
TEMPERATURE RANGE
Specification
–40
85
°C
Operating
–40
125
°C
(2)
(3)
(4)
6
Specified by wafer test.
Temperature coefficient of the 50 kΩ (or 49.4 kΩ) term in the gain equation.
Nonlinearity measurements in G = 1000 are dominated by noise. Typical non-linearity is ±0.001%.
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6.6 Typical Characteristics
At TA = 25°C, VS = ±15 V, unless otherwise noted.
60
140
G = 1000V/V
G = 100V/V
G = 1000V/V
Common−Mode Rejection (dB)
50
40
Gain (dB)
G = 100V/V
30
20
G = 10V/V
10
0
G = 1V/V
− 10
− 20
120
G = 10V/V
100
G = 1V/V
80
60
40
20
0
1k
10k
100k
1M
10M
10
100
1k
Frequency (Hz)
100k
10k
1M
Frequency (Hz)
Figure 1. Gain vs Frequency
Figure 2. Common-Mode Rejection vs Frequency
140
140
Power Supply Rejection (dB)
Power Supply Rejection (dB)
G = 1000V/V
120
G = 1000V/V
100
G = 100V/V
80
60
G = 10V/V
40
G = 1V/V
20
0
10
100
1k
10k
100k
G = 100V/V
100
80
60
G = 10V/V
40
G = 1V/V
20
0
10
1M
100
1k
10k
100k
1M
Frequency (Hz)
Frequency (Hz)
Figure 3. Positive Power Supply Rejection vs Frequency
Figure 4. Negative Power Supply Rejection vs Frequency
15
5
G ≥ 10
G ≥ 10
G=1
G=1
5
VD/2
0
VD/2
+
−5
VCM
+15V
−
+
VO
−
Ref
+
− 15V
−10
3
2
G=1
G=1
G ≥ 10
1
0
G=1
−1
−2
−3
VS = ±5V
VS = ±2.5V
−4
−15
−15
G ≥ 10
G ≥ 10
4
10
Common−Mode Voltage (V)
Common−Mode Voltage (V)
120
−5
−10
−5
0
5
10
15
−5
−4
−3
−2
−1
0
1
2
3
4
5
Output Voltage (V)
Output Voltage (V)
Figure 5. Input Common-Mode Range vs Output Voltage,
VS = ±15 V
Figure 6. Input Common-Mode Range vs Output Voltage,
VS = ±5 V, ±2.5 V
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Typical Characteristics (continued)
100
100
)
1k
10
100
G = 10V/V
1
10
G = 100, 1000V/V
Current Noise
0.01%
Settling Time (ms)
G = 1V/V
Input Bias Current Noise (pA/
Input-Referred Voltage Noise (nV/√Hz)
At TA = 25°C, VS = ±15 V, unless otherwise noted.
0.1
1
1
10
100
0.1%
10
1
10k
1k
1
10
100
1000
Gain (V/V)
Frequency (Hz)
Figure 7. Input-Referred Noise vs Frequency
Figure 8. Settling Time vs Gain
0.85
6
0.8
5
5
Slew Rate
0.7
3
IQ
0.65
Input Current (mA)
4
0.75
3
Slew Rate (V/µs)
Quiescent Current (µA)
4
2
Flat region represents
normal linear operation.
2
G = 1V/V
0
−1
−50
−25
0
25
50
Temperature (°C)
75
100
+15V
G = 1V/V
−2
−3
−5
−50
1
125
VIN
G = 1000V/V
−4
06
−75
G = 1000V/V
1
−40
0
−30 −20 −10
IIN −15V
10
20
30
40
50
Input Voltage (V)
Figure 9. Quiescent Current and Slew Rate vs Temperature
Figure 10. Input Overvoltage V/I Characteristics
10
2
6
Input Bias Current (nA)
Offset Voltage Change (µV)
8
4
2
0
−2
−4
1
IOS
0
IB
−1
Typical IB and IOS
Range ±2nA at 25°C
−6
−8
−10
0
8
100
200
300
400
500
−2
−75
−50
−25
0
25
50
75
100
125
Time (µs)
Temperature (°C)
Figure 11. Input Offset Voltage Warm-Up
Figure 12. Input Bias Current vs Temperature
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Typical Characteristics (continued)
(V+)
(V+)
(V+)−0.4
(V+)−0.4
(V+)−0.8
(V+)−1.2
(V−)+1.2
(V−)+0.8
(V−)+0.4
(V+)−0.8
(V+)−1.2
(V−)+1.2
(V−)+0.8
(V−)+0.4
(V−)
(V−)
0
1
2
3
Output Voltage Swing (V)
(V+)
(V+)−0.4
Output Voltage Swing (V)
Output Voltage (V)
At TA = 25°C, VS = ±15 V, unless otherwise noted.
+25°C
(V+)−0.8
(V+)−1.2
+85°C
−40°C
RL = 10kΩ
+25°C
(V−)+1.2
−40°C
+85°C
(V−)+0.8
+85°C
−40°C
(V−)+0.4
4
(V−)
Output Current (mA)
0
5
10
15
20
Power Supply Voltage (V)
Figure 13. Output Voltage Swing vs Output Current
Figure 14. Output Voltage Swing vs Power Supply Voltage
18
Short−Circuit Current (mA)
Peak−to−Peak Output Voltage (VPP)
30
16
−ISC
14
12
10
8
6
+ISC
4
2
0
G = 10, 100
25
G=1
G = 1000
20
15
10
5
0
−75
−50
0
−25
25
50
75
100
125
1k
10k
100k
1M
Temperature (°C)
Frequency (Hz)
Figure 15. Short Circuit Output Current vs Temperature
Figure 16. Maximum Output Voltage vs Frequency
1
THD + N (%)
VO = 1Vrms
500kHz Measurement
Bandwidth
0.1
G=1
RL = 10kΩ
G=1
G = 100, RL = 100kΩ
20mV/div
0.01
G = 1, RL = 100kΩ
Dashed Portion
is noise limited.
0.001
100
1k
10k
G = 10V/V
RL = 100kΩ
G = 10
100k
5µs/div
Frequency (Hz)
Figure 17. Total Harmonic Distortion + Noise vs Frequency
Figure 18. Small Signal (G = 1, 10)
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Typical Characteristics (continued)
At TA = 25°C, VS = ±15 V, unless otherwise noted.
G = 100
G=1
20mV/div
5V/div
G = 1000
G = 10
5µs/div
20µs/div
Figure 20. Large Signal (G = 1, 10)
Figure 19. Small Signal (G = 100, 1000)
G = 100
5V/div
0.1µV/div
G = 1000
20µs/div
1s/div
Figure 21. Large Signal (G = 100, 1000)
10
Figure 22. Voltage Noise 0.1 to 10-Hz Input-Referred, G ≥
100
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7 Detailed Description
7.1 Overview
The INA12x instrumentation amplifier is a type of differential amplifier that has been outfitted with input protection
circuit and input buffer amplifiers, which eliminate the need for input impedance matching and make the amplifier
particularly suitable for use in measurement and test equipment. Additional characteristics of the INA128 include
a very low DC offset, low drift, low noise, very high open-loop gain, very high common-mode rejection ratio, and
very high input impedances. The INA12x is used where great accuracy and stability of the circuit both short and
long term are required.
7.2 Functional Block Diagram
V+
INA128:
7
50 kW
RG
G=1+
INA128, INA129
2
-
VIN
Over-Voltage
Protection
INA129:
A1
40 kW
1
G=1+
40 kW
(1)
49.4 kW
RG
25 kW
A3
RG
8
6
VO
(1)
25 kW
+
VIN
3
Over-Voltage
Protection
5
A2
40 kW
Ref
40 kW
4
NOTE: (1) INA129: 24.7 kW
V-
7.3 Feature Description
The INA12x devices are low power, general-purpose instrumentation amplifiers offering excellent accuracy. The
versatile three-operational-amplifier design and small size make the amplifiers ideal for a wide range of
applications. Current-feedback input circuitry provides wide bandwidth, even at high gain. A single external
resistor sets any gain from 1 to 10,000. The INA128 is laser trimmed for very low offset voltage (25 μV typical)
and high common-mode rejection (93 dB at G ≥ 100). These devices operate with power supplies as low as
±2.25 V, and quiescent current of 2 mA, typically. The internal input protection can withstand up to ±40 V without
damage.
7.4 Device Functional Modes
7.4.1 Noise Performance
The INA12x provides very low noise in most applications. Low-frequency noise is approximately 0.2 µVPP
measured from 0.1 to 10 Hz (G ≥ 100). This provides dramatically improved noise when compared to state-ofthe-art chopper-stabilized amplifiers.
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Device Functional Modes (continued)
0.1mV/div
1s/div
G ≥ 100
Figure 23. 0.1-Hz to 10-Hz Input-Referred Voltage Noise
7.4.2 Input Common-Mode Range
The linear input voltage range of the input circuitry of the INA12x is from approximately 1.4 V below the positive
supply voltage to 1.7 V above the negative supply. As a differential input voltage causes the output voltage
increase, however, the linear input range is limited by the output voltage swing of amplifiers A1 and A2. Thus the
linear common-mode input range is related to the output voltage of the complete amplifier. This behavior also
depends on supply voltage (see performance curve Figure 6).
Input-overload can produce an output voltage that appears normal. For example, if an input overload condition
drives both input amplifiers to their positive output swing limit, the difference voltage measured by the output
amplifier will be near zero. The output of A3 will be near 0 V even though both inputs are overloaded.
12
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The INA12x measures small differential voltage with high common-mode voltage developed between the
noninverting and inverting input. The high-input voltage protection circuit in conjunction with high input
impedance make the INA12x suitable for a wide range of applications. The ability to set the reference pin to
adjust the functionality of the output signal offers additional flexibility that is practical for multiple configurations.
8.2 Typical Application
Figure 24 shows the basic connections required for operation of the INA12x. Applications with noisy or high
impedance power supplies may require decoupling capacitors close to the device pins as shown. The output is
referred to the output reference (Ref) terminal which is normally grounded. This must be a low-impedance
connection to assure good common-mode rejection. A resistance of 8 Ω in series with the Ref pin will cause a
typical device to degrade to approximately 80dB CMR (G = 1).
V+
INA129:
INA128:
G
1
50k
RG
G
INA128
DESIRED
GAIN (V/V)
1
2
5
10
20
50
100
200
500
1000
2000
5000
10000
RG
(Ω)
NC
50.00k
12.50k
5.556k
2.632k
1.02k
505.1
251.3
100.2
50.05
25.01
10.00
5.001
1
0.1µF
49.4k
RG
NC
49.9k
12.4k
5.62k
2.61k
1.02k
511
249
100
49.9
24.9
10
4.99
RG
(Ω)
NC
49.4k
12.35k
5489
2600
1008
499
248
99
49.5
24.7
9.88
4.94
INA128, INA129
−
VIN
INA129
NEAREST
1% RG (Ω)
7
NEAREST
1% RG (Ω
NC
49.9k
12.4k
5.49k
2.61k
1k
499
249
100
49.9
24.9
9.76
4.87
NC: No Connection
2
Over−Voltage
Protection
A1
40kΩ
1
−
+
VO = G • (VIN − VIN )
A3
RG
3
6
+
8
+
VIN
40kΩ
25kΩ(1)
25kΩ(1)
Load VO
A2
Over−Voltage
Protection
40kΩ
NOTE: (1) INA129: 24.7kΩ
4
40kΩ
5
Ref
−
0.1µF
−
V IN
V−
Also drawn in simplified form:
RG
+
V IN
INA128
VO
Ref
Figure 24. Basic Connections
8.2.1 Design Requirements
The device can be configured to monitor the input differential voltage when the gain of the input signal is set by
the external resistor RG. The output signal references to the Ref pin. The most common application is where the
output is referenced to ground when no input signal is present by connecting the Ref pin to ground, as Figure 24
shows. When the input signal increases, the output voltage at the OUT pin increases, too.
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Typical Application (continued)
8.2.2 Detailed Design Procedure
8.2.2.1 Setting the Gain
Gain is set by connecting a single external resistor, RG, connected between pins 1 and 8:
INA128: g = 1 + 50 kΩ/RG
(1)
Commonly used gains and resistor values are shown in Figure 24.
The 50-kΩ term in Equation 1 comes from the sum of the two internal feedback resistors of A1 and A2. These onchip metal film resistors are laser-trimmed to accurate absolute values. The accuracy and temperature coefficient
of these internal resistors are included in the gain accuracy and drift specifications of the INA128.
The stability and temperature drift of the external gain setting resistor, RG, also affects gain. RG’s contribution to
gain accuracy and drift can be directly inferred from Equation 1. Low resistor values required for high gain can
make wiring resistance important. Sockets add to the wiring resistance, which contributes additional gain error
(possibly an unstable gain error) in gains of approximately 100 or greater.
8.2.2.2 Dynamic Performance
The typical performance curve Figure 1 shows that, despite its low quiescent current, the INA12x achieves wide
bandwidth even at high gain. This is due to the current-feedback topology of the input stage circuitry. Settling
time also remains excellent at high gain.
8.2.2.3 Offset Trimming
The INA12x is laser-trimmed for low-offset voltage and offset voltage drift. Most applications require no external
offset adjustment. Figure 25 shows an optional circuit for trimming the output offset voltage. The voltage applied
to the Ref terminal is summed with the output. The op amp buffer provides low impedance at the Ref terminal to
preserve good common-mode rejection.
V−
IN
V+
RG
INA128
VO
100µA
1/2 REF200
Ref
+
VIN
OPA177
±10mV
Adjustment Range
10kΩ
100Ω
100Ω
100µA
1/2 REF200
V−
Figure 25. Optional Trimming of Output Offset Voltage
8.2.2.4 Input Bias Current Return Path
The input impedance of the INA12x is extremely high: approximately 1010 Ω. However, a path must be provided
for the input bias current of both inputs. This input bias current is approximately ±2 nA. High input impedance
means that this input bias current changes very little with varying input voltage.
Input circuitry must provide a path for this input bias current for proper operation. Figure 26 shows various
provisions for an input bias current path. Without a bias current path, the inputs will float to a potential which
exceeds the common-mode range, and the input amplifiers will saturate.
14
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Typical Application (continued)
If the differential source resistance is low, the bias current return path can be connected to one input (see the
thermocouple example in Figure 26). With higher source impedance, using two equal resistors provides a
balanced input, with possible advantages of lower input offset voltage due to bias current and better highfrequency common-mode rejection.
Microphone,
Hydrophone
etc.
INA128
47kΩ
47kΩ
Thermocouple
INA128
10kΩ
INA128
Center−tap provides
bias current return.
Figure 26. Providing an Input Common-Mode Current Path
8.2.3 Application Curves
G=1
G = 10 0
20mV/div
20mV/div
G = 10
G = 10 0 0
20ms/div
5ms/div
G = 100, 1000
G = 1, 10
Figure 28. Small Signal
Figure 27. Small Signal
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Typical Application (continued)
G=1
G =100
5V/div
5V/div
G = 10
G =1000
5ms/div
20ms/div
G = 1, 10
G = 100, 1000
Figure 29. Large Signal
Figure 30. Large Signal
9 Power Supply Recommendations
The minimum power supply voltage for INA12x is ±2.25 V and the maximum power supply voltage is ±18 V. This
minimum and maximum range covers a wide range of power supplies; but for optimum performance, ±15 V is
recommended. TI recommends adding a bypass capacitor at the input to compensate for the layout and power
supply source impedance.
9.1 Low Voltage Operation
The INA12x can be operated on power supplies as low as ±2.25 V. Performance remains excellent with power
supplies ranging from ±2.25 V to ±18 V. Most parameters vary only slightly throughout this supply voltage
range—see Typical Characteristics.
Operation at very low supply voltage requires careful attention to assure that the input voltages remain within
their linear range. Voltage swing requirements of internal nodes limit the input common-mode range with low
power supply voltage. Figure 6 shows the range of linear operation for ±15-V, ±5-V, and ±2.5-V supplies.
+5V
2.5V − ∆V
300Ω
RG
VO
INA128
Ref
2.5V + ∆V
Figure 31. Bridge Amplifier
16
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Low Voltage Operation (continued)
−
VIN
+
RG
VO
INA128
Ref
R1
1MΩ
C1
0.1µF
1
f−3dB=
2πR1C1
OPA130
= 1.59Hz
Figure 32. AC-Coupled Instrumentation Amplifier
V+
10.0V
6
REF102
R1
2
R2
4
Pt100
Cu
K
Cu
RG
INA128
Ref
R3
100Ω = Pt100 at 0°C
ISA
TYPE
E
J
K
T
MATERIAL
µV/
+ Chromel
− Constantan
+ Iron
− Constantan
+ Chromel
− Alumel
+ Copper
− Constantan
SEEBECK
COEFFICIENT
(
C)
VO
R1, R2
58.5
66.5kΩ
50.2
76.8kΩ
39.4
97.6kΩ
38.0
102kΩ
Figure 33. Thermocouple Amplifier with RTD Cold-Junction Compensation
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Low Voltage Operation (continued)
−
VIN
RG
V IN
R1
IO
R1
INA128
G
+
Ref
IB
A1
A1
IO
Load
IB ERROR
OPA177
± 1.5nA
OPA131
± 50pA
OPA602
± 1pA
OPA128
± 75fA
Figure 34. Differential Voltage to Current Converter
RG = 5.6kΩ
2.8kΩ
G = 10
LA
RA
RG/2
INA128
VO
Ref
2.8kΩ
390kΩ
1/2
OPA2131
RL
390kΩ
VG
10kΩ
VG
1/2
OPA2131
NOTE: Due to the INA128’s current-feedback
topology, VG is approximately 0.7V less than
the common-mode input voltage. This DC offset
in this guard potential is satisfactory for many
guarding applications.
Figure 35. ECG Amplifier with Right-Leg Drive
10 Layout
10.1 Layout Guidelines
Place the power-supply bypass capacitor as closely as possible to the supply and ground pins. The
recommended value of this bypass capacitor is 0.1 μF to 1 μF. If necessary, additional decoupling capacitance
can be added to compensate for noisy or high-impedance power supplies. These decoupling capacitors must be
placed between the power supply and INA12x devices.
The gain resistor must be placed close to pin 1 and pin 8. This placement limits the layout loop and minimizes
any noise coupling into the part.
18
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10.2 Layout Example
Gain Resistor
Bypass
Capacitor
VIN
VIN
–
+
R6
R6
V–IH
V+
V+IH
VO
V–
REF
V+
VOUT
GND
Bypass
Capacitor
V–
GND
Figure 36. Recommended Layout
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11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 1. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
INA128
Click here
Click here
Click here
Click here
Click here
INA129
Click here
Click here
Click here
Click here
Click here
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
20
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PACKAGE OPTION ADDENDUM
www.ti.com
24-Apr-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA128P
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
INA128P
INA128PA
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
INA128P
A
INA128PAG4
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
INA128P
A
INA128PG4
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
INA128P
INA128U
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA
128U
INA128U/2K5
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA
128U
INA128U/2K5G4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA
128U
INA128UA
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
INA
128U
A
INA128UA/2K5
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
INA
128U
A
INA128UA/2K5E4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
INA
128U
A
INA128UA/2K5G4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
INA
128U
A
INA128UAE4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
INA
128U
A
INA128UAG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
INA
128U
A
INA128UG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
Addendum-Page 1
INA
128U
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Apr-2015
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA129P
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
INA129P
INA129PA
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
INA129P
A
INA129PAG4
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
INA129P
A
INA129PG4
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
INA129P
INA129U
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA
129U
INA129U/2K5
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA
129U
INA129U/2K5G4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA
129U
INA129UA
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
INA
129U
A
INA129UA/2K5
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
INA
129U
A
INA129UA/2K5E4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
INA
129U
A
INA129UA/2K5G4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
INA
129U
A
INA129UAE4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
INA
129U
A
INA129UG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 2
INA
129U
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Apr-2015
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA128, INA129 :
• Enhanced Product: INA129-EP
NOTE: Qualified Version Definitions:
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Apr-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
INA128U/2K5
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
INA128UA/2K5
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
INA129U/2K5
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
INA129UA/2K5
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Apr-2015
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA128U/2K5
SOIC
D
8
2500
367.0
367.0
35.0
INA128UA/2K5
SOIC
D
8
2500
367.0
367.0
35.0
INA129U/2K5
SOIC
D
8
2500
367.0
367.0
35.0
INA129UA/2K5
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
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www.ti.com/computers
DLP® Products
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logic.ti.com
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RFID
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www.ti.com/omap
TI E2E Community
e2e.ti.com
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