Lyontek LY61L10248AML-10IT 1m x 8 bit high speed cmos sram Datasheet

®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
REVISION HISTORY
Revision
Description
Issue Date
Rev. 1.0
Rev. 1.1
Initial Issued
1.“CE# ≧VCC - 0.2V” revised as ”CE# ≦0.2” for TEST
CONDITION of Average Operating Power supply Current
Icc1 on page3
2.Revised ORDERING INFORMATION Page11
2012/2/21
July.19. 2012
Rev. 1.2
1. Revise “TEST CONDITION” for VOH, VOL on page 4
IOH = -8mA revised as -4mA
IOL =4mA revised as 8mA
2. Revise VIH(max) & VIL(min) note on page 4
VIH(max) = VCC + 2.0V for pulse width less than 6ns.
VIL(min) = VSS - 2.0V for pulse width less than 6ns.
Revised the address pin sequence of TSOP-II pin configuration on
page 3 in order to be compatible with industry convention. (No
function specifications and applications have been changed and all
the characteristics are kept all the same as Rev 1.2 )
June. 04. 2013
Rev. 1.3
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
0
Oct. 30. 2013
®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
FEATURES
GENERAL DESCRIPTION
„ Fast access time : 8/10/12ns
„ Very low power consumption:
Operating current:
90/80/70mA(TYP. 8/10/12ns)
Standby current(Normal version):
3mA(TYP.)
„ Single 3.3V power supply
„ All inputs and outputs TTL compatible
„ Fully static operation
„ Tri-state output
„ Data retention voltage : 1.5V (MIN.)
„ Green package available
Package : 44-pin 400 mil TSOP-II
48-ball 6mmx8mm TFBGA
The LY61L10248A is a 8M-bit high speed CMOS
static random access memory organized as 1,024K
words by 8 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of
operating temperature.
The LY61L10248A operates from a single power
supply of 3.3V and all inputs and outputs are fully
TTL compatible
PRODUCT FAMILY
Product
Family
LY61L10248A
LY61L10248A(I)
LY61L10248A
LY61L10248A(I)
Operating
Temperature
0 ~ 70℃
-40 ~ 85℃
0 ~ 70℃
-40 ~ 85℃
Vcc Range
Speed
3.0 ~ 3.6V
3.0 ~ 3.6V
2.7 ~ 3.6V
2.7 ~ 3.6V
8/10/12ns
8/10/12ns
10/12ns
10/12ns
Power Dissipation
Standby(ISB1,TYP.) Operating(Icc1,TYP.)
3mA
90/80/70mA
3mA
90/80/70mA
3mA
80/70mA
80/70mA
3mA
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
1
®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
Vcc
Vss
A0-A19
DECODER
DQ0-DQ7
I/O DATA
CIRCUIT
CE#
WE#
OE#
CONTROL
CIRCUIT
1024Kx8
MEMORY ARRAY
SYMBOL
DESCRIPTION
A0 - A19
Address Inputs
DQ0 – DQ7
Data Inputs/Outputs
CE#
Chip Enable Inputs
WE#
Write Enable Input
OE#
Output Enable Input
VCC
Power Supply
VSS
Ground
NC
No Connection
COLUMN I/O
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
2
®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
PIN CONFIGURATION
44-pin TSOP(Type II)
48-ball 6mmx8mm TFBGA
A
NC
OE#
A0
A1
A2
NC
B
NC
NC
A3
A4
CE#
NC
C
DQ0
NC
A5
A6
NC
DQ4
D
Vss DQ1 A17
A7
E
Vcc DQ2
NC
A16 DQ6 Vss
F
DQ3
NC
A14
A15
G
NC
NC
A12
A13 WE#
NC
H
A18
A8
A9
A10
A11
A19
1
2
3
4
TFBGA
5
6
DQ5 Vcc
NC
DQ7
TFBGA
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
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®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Voltage on VCC relative to VSS
Voltage on any other pin relative to VSS
SYMBOL
VT1
VT2
RATING
UNIT
-0.5 to 4.6
V
-0.5 to VCC+0.5
V
0 to 70(C grade)
℃
Operating Temperature
TA
-40 to 85(I grade)
℃
Storage Temperature
TSTG
-65 to 150
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum
rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
H
L
L
L
OE#
X
H
L
X
WE#
X
H
H
L
SUPPLY CURRENT
ISB1
ICC
ICC
ICC
I/O OPERATION
High-Z
High-Z
DOUT
DIN
H = VIH, L = VIL, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
Supply Voltage
VCC
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage
Current
VIH
*2
VIL
ILI
Output High Voltage
VOH
Output Low Voltage
*1
ILO
VCC ≧ VIN ≧ VSS
VCC ≧ VOUT ≧ VSS,
Output Disabled
MIN.
3.0
2.7
2.2
- 0.3
-1
TYP.
3.3
3.3
-
*4
MAX.
3.6
3.6
VCC+0.3
0.8
1
UNIT
V
V
V
V
µA
-1
-
1
µA
IOH = -4mA
2.4
-
-
V
VOL
IOL =8mA
-
-
0.4
V
Icc
CE# = VIL , II/O = 0mA
;f=max
-
110
100
90
90
80
70
140
130
120
120
110
100
mA
mA
mA
mA
mA
mA
-
-
40
mA
-
3
25
mA
Average Operating
Power supply Current
Icc1
Standby Power
Supply Current
Standby Power
Supply Current
TEST CONDITION
-8
-10/12
Isb
ISB1
-8
-10
-12
-8
-10
-12
CE# ≦0.2, Other pin is
at 0.2V or Vcc-0.2V
II/O = 0mA;f=max
CE# ≧Vih
Other pin is at Vil or Vih
CE# ≧VCC - 0.2V;
Other pin is at 0.2V or Vcc-0.2V
Notes:
1. VIH(max) = VCC + 2.0V for pulse width less than 6ns.
2. VIL(min) = VSS - 2.0V for pulse width less than 6ns.
3. Over/Undershoot specifications are characterized on engineering evaluation stage, not for mass production test.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at VCC = VCC(TYP.) and TA = 25℃
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
4
®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
CAPACITANCE (TA = 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
CIN
CI/O
MIN.
MAX
8
10
-
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
speed
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
8ns/10/12ns
0.2V to Vcc-0.2V
3ns
1.5V
CL = 30pF + 1TTL,
IOH/IOL = -4mA/8mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
LY61L10248A
-8
LY61L10248A
-10
LY61L10248A
-12
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
MIN.
8
2
0
2
MIN.
10
2
0
2
MIN.
12
3
0
2
SYM.
LY61L10248A
-8
LY61L10248A
-10
LY61L10248A
-12
MIN.
8
6.5
6.5
0
6.5
0
MAX.
-
MIN.
10
8
8
0
8
0
MAX.
-
MIN.
12
10
10
0
10
0
MAX.
-
ns
ns
ns
ns
ns
ns
5
-
6
-
7
-
ns
0
2
-
3
0
2
-
4
0
2
-
5
ns
ns
ns
SYM.
MAX.
8
8
4.5
3
3
-
MAX.
10
10
4.5
4
4
-
MAX.
12
12
5
5
5
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
(2) WRITE CYCLE
PARAMETER
Data to Write Time Overlap
tWC
tAW
tCW
tAS
tWP
tWR
tDW
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
tDH
tOW*
tWHZ*
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
*These parameters are guaranteed by device characterization, but not production tested.
TIMING WAVEFORMS
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
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UNIT
®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
READ CYCLE 1 (Address Controlled) (1,2)
tRC
Address
tAA
Dout
tOH
Previous Data Valid
Data Valid
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)
tRC
Address
tAA
CE#
tACE
OE#
tOE
tOH
tOHZ
tCHZ
tOLZ
tCLZ
Dout
High-Z
Data Valid
High-Z
Notes :
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low.
3.Address must be valid prior to or coincident with CE# = low,; otherwise tAA is the limiting parameter.
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
6
®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6)
tWC
Address
tAW
CE#
tCW
tAS
tWP
tWR
WE#
tWHZ
Dout
TOW
High-Z
(4)
tDW
(4)
tDH
Data Valid
Din
WRITE CYCLE 2 (CE# Controlled) (1,2,5,6)
tWC
Address
tAW
CE#
tAS
tWR
tCW
tWP
WE#
tWHZ
Dout
High-Z
(4)
tDW
tDH
Data Valid
Din
Notes :
1.WE#, CE# must be high during all address transitions.
2.A write occurs during the overlap of a low CE#, low WE#.
3.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be
placed on the bus.
4.During this period, I/O pins are in the output state, and input signals must not be applied.
5.If the CE# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance state.
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
7
®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
DATA RETENTION CHARACTERISTICS
PARAMETER
VCC for Data Retention
Data Retention Current
Chip Disable to Data
Retention Time
Recovery Time
tRC* = Read Cycle Time
SYMBOL
TEST CONDITION
VDR CE# ≧ VCC - 0.2V
VCC =1.5V
IDR
CE# ≧VCC - 0.2V;
Other pin is at 0.2V or Vcc-0.2V
See Data Retention
tCDR
Waveforms (below)
tR
MIN.
1.5
TYP.
-
MAX.
3.6
UNIT
V
-
3
25
mA
0
-
-
ns
tRC*
-
-
ns
DATA RETENTION WAVEFORM
VDR ≧ 1.5V
Vcc
Vcc(min.)
Vcc(min.)
tCDR
CE#
VIH
tR
CE# ≧ Vcc-0.2V
VIH
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
8
®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
PACKAGE OUTLINE DIMENSION
44-pin 400mil TSOP-Ⅱ Package Outline Dimension
SYMBOLS
A
A1
A2
b
c
D
E
E1
e
L
ZD
y
Θ
DIMENSIONS IN MILLMETERS
MIN.
NOM.
MAX.
1.20
0.05
0.10
0.15
0.95
1.00
1.05
0.30
0.45
0.12
0.21
18.212
18.415
18.618
11.506
11.760
12.014
9.957
10.160
10.363
0.800
0.40
0.50
0.60
0.805
0.076
o
o
o
3
6
0
DIMENSIONS IN MILS
MIN.
NOM.
MAX.
47.2
2.0
3.9
5.9
37.4
39.4
41.3
11.8
17.7
4.7
8.3
717
725
733
453
463
473
392
400
408
31.5
15.7
19.7
23.6
31.7
3
o
o
o
0
3
6
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
9
®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
48-ball 6mm × 8mm TFBGA Package Outline Dimension
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
10
®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
ORDERING INFORMATION
Package Type
Access Time
(Speed)(ns)
44Pin(400mil)
TSOP-II
8
Temperature
Range(℃)
0℃~70℃
-40℃~85℃
10
0℃~70℃
-40℃~85℃
12
0℃~70℃
-40℃~85℃
48-ball(6mmx8mm)
TFBGA
8
0℃~70℃
-40℃~85℃
10
0℃~70℃
-40℃~85℃
12
0℃~70℃
-40℃~85℃
Packing
Type
Tray
LY61L10248AML-8
Tape Reel
LY61L10248AML-8T
Tray
LY61L10248AML-8I
Tape Reel
LY61L10248AML-8IT
Tray
LY61L10248AML-10
Tape Reel
LY61L10248AML-10T
Tray
LY61L10248AML-10I
Tape Reel
LY61L10248AML-10IT
Tray
LY61L10248AML-12
Tape Reel
LY61L10248AML-12T
Tray
LY61L10248AML-12I
Tape Reel
LY61L10248AML-12IT
Tray
LY61L10248AGL-8
Tape Reel
LY61L10248AGL-8T
Tray
LY61L10248AGL-8I
Tape Reel
LY61L10248AGL-8IT
Tray
LY61L10248AGL-10
Tape Reel
LY61L10248AGL-10T
Tray
LY61L10248AGL-10I
Tape Reel
LY61L10248AGL-10IT
Tray
LY61L10248AGL-12
Tape Reel
LY61L10248AGL-12T
Tray
LY61L10248AGL-12I
Tape Reel
LY61L10248AGL-12IT
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
11
Lyontek Item No.
®
LY61L10248A
1M X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.3
THIS PAGE IS LEFT BLANK INTENTIONALLY.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu County 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
12
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