Rohm BD28412MUV-E2 9w9w analog input class d speaker amplifier Datasheet

Datasheet
Low Power Consumption Class D Amplifier
9W+9W Analog Input
Class D Speaker Amplifier
BD28412MUV
General Description
Key Specifications
BD28412MUV is a 9W+9W stereo (or 18W monaural)
class D amplifier, developed for battery equipped
speaker systems such as wireless speakers. This IC is
incorporated with a precise oscillator to generate
multiple switching frequencies that can avoid the AM
radio interference. In addition, 2.1Ch audio system can
be realized by master and slave operation without beat
noise caused by interference between two ICs.
Furthermore, this IC achieves lower power
consumption that eliminates the need for an external
heat sink.
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Features
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Supply Voltage Range:
4.5V to 13V
Speaker Output Power:
9W+9W (Typ)
(VCC=12V, RL=8Ω, PLIMIT=0V)
Speaker Output Power(PBTL):
18W (Typ)
(VCC=12V, RL=4Ω, PLIMIT=0V)
Total Harmonic Distortion Ratio:
0.03% (Typ) @Po=1W
(VCC=11V, RL=8Ω, PLIMIT=0V)
Crosstalk:
100dB (Typ)
PSRR:
55dB (Typ)
Output Noise Voltage:
-80dBV (Typ)
Standby Current:
0.1µA (Typ)
Operating Current:
16mA (Typ)
(No load or filter, No signal)
Operating Temperature Range:
-25°C to +85°C


Analog Differential Input
Low Standby Current
Output Feedback Circuitry Prevents Sound
Quality Degradation Caused by Power Supply
Voltage Fluctuation, Achieves Low Noise and Low
Distortion, Eliminates the Need of Large
Electrolytic-Capacitors for Decoupling
Power Limit Function
(Linearly-programmable)
Selectable Switching Frequency
(AM Avoidance Function)
Synchronization Control is Supported
(Selectable Master and Slave Operation)
Parallel BTL (PBTL) is Supported
Wide Voltage Range (VCC=4.5V to 13V)
High Efficiency and Low-heat-generation Make
the System Smaller, Thinner, and More
Power-saving
Pop Noise Prevention During Power Supply
ON/OFF
High Reliability Design by Built-in Protection
Circuits
- Overheat Protection
- Under Voltage Protection
- Output Short Protection
- Output DC Voltage Protection
Small Package (VQFN032V5050) Achieves Mount
Area Reduction

Package
W(Typ) x D(Typ) x H(Max)
VQFN032V5050
5.00mm x 5.00mm x 1.00mm
VQFN032V5050
Typical Application Circuit
TEST
OUT2N
GAIN_ BSP2N
MS_SEL
MUTEＸ
PDX
OUT2P
SYNC
FSEL<2:0>
BSP2P
BSP1N
IN2N
IN2P
IN1N
IN1P
ERRORX
OUT1P
BSP1P
MUTEＸ
PLIMIT
Wireless Speakers, Small Active Speakers,
Portable Audio Equipments, etc.
PDX

OUT1N
Applications
Figure 1. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit
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Datasheet
BD28412MUV
Pin Configuration
ERRORX
PDX
TEST
REGA
NC
VCCA
VCCP1
BSP1P
(TOP VIEW)
32
31
30
29
28
27
26
25
GNDP1
PLIMIT
3
22
OUT1N
GNDA
4
21
BSP1N
REGG
5
20
BSP2P
GAIN_MS_SEL
6
19
OUT2P
IN2P
7
18
GNDP2
IN2N
8
17
OUT2N
10
11
12
13
14
15
16
BSP2N
9
VCCP2
23
NC
2
MUTEX
IN1N
FSEL2
OUT1P
FSEL1
24
FSEL0
1
SYNC
IN1P
Figure 2. Pin Configuration
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Datasheet
BD28412MUV
Pin Description
Pin
No.
Pin Name
IO
Function
Internal Equivalent Circuit
30kΩ~127.9kΩ
1
IN1P
I
202.1kΩ~300kΩ
1
Positive input pin for Ch1
+-+
2
2
IN1N
I
30kΩ~127.9kΩ 202.1kΩ~300kΩ
Negative input pin for Ch1
4
100kΩ
3
3
PLIMIT
I
+
-
Power limit level setting pin
100kΩ
4
4
GNDA
-
GND pin for Analog signal
27
Internal power supply pin for Gate driver
Please connect a capacitor.
5
REGG
O
5
The REGG terminal of BD28412MUV should not be
used as external supply. Therefore, do not connect
anything except the capacitor for stabilization and the
resistors for setting of GAIN_MS_SEL and PLIMIT.
200kΩ
4
2kΩ
6
6
GAIN_MS_SEL
I
Gain and Master/Slave mode Setting pin
4
30kΩ~127.9kΩ
7
IN2P
I
Positive input pin for Ch2
202.1kΩ~300kΩ
7
+-+
8
8
IN2N
I
Negative input pin for Ch2
30kΩ~127.9kΩ 202.1kΩ~300kΩ
4
5
9
SYNC
I/O
Clock input/output pin to synchronize
multiple class D amplifiers
9
100kΩ
4
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Datasheet
BD28412MUV
Pin Description – continued
10
10
FSEL0
I
PWM frequency setting pin 0
100kΩ
4
5
11
FSEL1
I
PWM frequency setting pin 1
11
100kΩ
4
12
FSEL2
I
PWM frequency setting pin 2
13
MUTEX
I
Speaker output mute control pin
H: Mute OFF
L: Mute ON
14
NC
-
15
VCCP2
-
16
BSP2N
O
17
OUT2N
O
18
GNDP2
-
19
OUT2P
O
20
BSP2P
O
21
BSP1N
O
22
OUT1N
O
23
GNDP1
-
24
OUT1P
O
25
BSP1P
O
26
VCCP1
-
27
VCCA
-
28
NC
-
12, 13
100kΩ
4
Non connection
Power supply pin for Ch2 PWM signal
Please connect a capacitor.
15
Boot-strap pin of Ch2 negative PWM signal
Please connect a capacitor.
Output pin of Ch2 negative PWM signal
Please connect to output LPF.
5
16, 20
GND pin for Ch2 PWM signal
17, 19
Output pin of Ch2 positive PWM signal
Please connect to output LPF.
Boot-strap pin of Ch2 positive PWM signal
Please connect a capacitor.
Boot-strap pin of Ch1 negative PWM signal
Please connect a capacitor.
Output pin of Ch1 negative PWM signal
Please connect to output LPF.
18
26
5
21, 25
GND pin for Ch1 PWM signal
Output pin of Ch1 positive PWM signal
Please connect to output LPF.
Boot-strap pin of Ch1 positive PWM signal
Please connect a capacitor.
Power supply pin for Ch1 PWM signal
Please connect a capacitor.
Power supply pin for Analog signal
Please connect a capacitor.
Non connection
22, 24
23
27
Internal power supply pin for Gate driver
Please connect a capacitor.
29
REGA
O
29
The REGA terminal of BD28412MUV should not be
used as external supply. Therefore, do not connect
anything except the capacitor for stabilization.
180kΩ
4
30
30
TEST
I
Test pin
Please connect to GND.
100kΩ
4
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Datasheet
BD28412MUV
Pin Description – continued
27
Power down setting pin
31
PDX
I
55kΩ
31
H: Active
L: Standby
45kΩ
4
Error flag pin
Please connect to pull-up resistor.
32
ERRORX
O
500Ω
32
H: Normal
L: Error detected
An error flag occurs when Output Short Protection, DC
Voltage Protection, or High Temperature Protection is
activated. This flag shows IC condition during operation.
4
The numerical value of internal equivalent circuit is typical value, not guaranteed value.
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Datasheet
BD28412MUV
NC
REGA
29
28
BSP1P
30
VCCP1
31
VCCA
32
TEST
PDX
ERRORX
Block Diagram
27
26
25
PROTECT
CONTROL
I/F
LDO
24
OUT1P
23
GNDP1
22
OUT1N
REGG
1
21
BSP1N
REGG
IN1P
20
BSP2P
19
OUT2P
18
GNDP2
17
OUT2N
REGG
IN1N
2
DRIVER
FET
PWM
PLIMIT
3
GNDA
4
DRIVER
FET
PLIMIT
GAIN
REGG
GAIN_MS_SEL
5
DRIVER
FET
LDO
DRIVER
FET
6
PWM
IN2P
7
IN2N
8
REGG
OSC
13
14
15
NC
VCCP2
16
BSP2N
12
MUTEX
FSEL0
11
FSEL2
10
FSEL1
9
SYNC
CONTROL I/F
Figure 3. Block Diagram
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Datasheet
BD28412MUV
Absolute Maximum Ratings (Tj = 25°C)
Parameter
Symbol
Rating
Unit
VCCMAX
-0.3 to +15.5
V
VCCA,VCCP1,VCCP2
Input Voltage1(Note 1)
VIN
-0.3 to +7
V
IN1P, IN1N, IN2P, IN2N, PLIMIT, GAIN_MS_SEL,
(Note 2)
, FSEL0, FSEL1, FSEL2,
PLIMIT, SYNC
PDX, MUTEX
Input Voltage2(Note 1)
VERR
-0.3 to +7
V
ERRORX
Pin Voltage1(Note 1) (Note 3)
VPIN1
-0.3 to +VCCMAX
V
OUT1P, OUT1N, OUT2P, OUT2N
Topr
-25 to +85
°C
Tstg
-55 to +150
°C
Tj
-40 to +150
°C
Supply Voltage
(Note 1)
Operating Temperature
Range
Storage Temperature
Range
Junction Temperature
Range
Conditions
(Note 1) The voltage that can be applied reference to GND (Pin4, 18, 23).
(Note 2) SYNC pin is I/O pin. It is specified for input mode.
(Note 3) Please use under this rating including the AC peak waveform (overshoot) for all conditions.
Only undershoot is allowed at condition of ≤15.5V by the VCC reference and ≤10nsec (cf. Figure 4)
VCC
Overshoot from GND
15.5V (Max)
Undershoot from VCC
15.5V (Max)
GND
‫ أ‬10nsec
Figure 1. Overshoot and Undershoot
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Thermal Resistance (Note 4)
Parameter
Symbol
Thermal Resistance (Typ)
Unit
1s(Note 6)
2s2p(Note 7)
θJA
138.9
39.1
°C/W
ΨJT
11
5
°C/W
VQFN032V5050
Junction to Ambient
(Note 5)
Junction to Top Characterization Parameter
(Note 4) Based on JESD51-2A(Still-Air)
(Note 5) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 6) Using a PCB board based on JESD51-3.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.57mm
Copper Pattern
Thickness
Footprints and Traces
70µm
(Note 7) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.6mm
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Thermal Via(Note 8)
Pitch
1.20mm
Diameter
Φ0.30mm
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Datasheet
BD28412MUV
Top
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70µm
74.2mm x 74.2mm
35µm
74.2mm x 74.2mm
70µm
(Note 8) This thermal via connects with the copper pattern of all layers..
Use a thermal design that allows for a sufficient margin in consideration of power dissipation under actual operating
conditions. This IC exposes its frame at the backside of package. Note that this part is assumed to use after providing heat
dissipation treatment to improve heat dissipation efficiency. Try to occupy as wide as possible with heat dissipation pattern
not only on the board surface but also the backside.
Recommended Operating Conditions (Ta= -25°C to +85°C)
Parameter
Supply Voltage
Symbol
Min
Typ
Max
Unit
Conditions
VIN
4.5
-
13
V
VCCA, VCCP1, VCCP2
RL1
5.4
-
-
Ω
BTL
RL2
3.2
-
-
Ω
High Level Input Voltage
VIH
2.0
-
3.3
V
Low Level Input Voltage
VIL
0
-
0.8
V
Low Level Output Voltage
VOL
-
-
0.8
V
PBTL
FSEL0, FSEL1, FSEL2,
MUTEX, PDX
FSEL0, FSEL1, FSEL2,
MUTEX, PDX
ERRORX, IOL=0.5mA
Load Impedance (Note 9)
(Note 9) Tj<150°C
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Datasheet
BD28412MUV
Electrical Characteristics
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, RL=8Ω, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15µH, C=1µF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
Parameter
Symbol
Min
Typ
Max
Unit
Quiescent Standby Current
ICC1
-
0.1
25
µA
Quiescent Mute Current
ICC2
-
10
20
mA
Quiescent Operating Current
ICC3
-
16
32
mA
VREGG
4.45
5.55
6.05
V
Input Impedance 1
RIN1
50
-
-
kΩ
Input Impedance 2
RIN2
140
200
260
kΩ
Regulator Output Voltage
(Note 10)
Output Power
PO1
-
9
-
W
(Note 10)
Gain 1
GV1
19
20
21
dB
Gain 2(Note 10)
GV2
25
26
27
dB
Gain 3(Note 10)
GV3
31
32
33
dB
Gain 4(Note 10)
GV4
35
36
37
dB
Total Harmonic Distortion(Note 10)
THD
-
0.03
-
%
Crosstalk
(Note 10)
PSRR(Note 10)
(Note 10)
Output Noise Voltage
PWM (Pulse Width Modulation)
Frequency
Conditions
No load or filter,
PDX=L, MUTEX=L
No load or filter,
PDX=H, MUTEX=L
No load or filter, No signal,
PDX=H, MUTEX=H
PDX=H, MUTEX=H
MUTEX, PDX,
FSEL0, FSEL1, FSEL2,
SYNC(Slave mode only),
PLIMIT
CT
60
100
-
dB
VCC=12V, THD+N=10%
Po=1W,
GAIN_MS_SEL= 0V
PO=1W ,
GAIN_MS_SEL= 2/9 × VREGG
PO=1W,
GAIN_MS_SEL= 3/9 × VREGG
PO=1W,
GAIN_MS_SEL= 4/9 × VREGG
Po=1W,
BW=AES17
Po=1W, 1kHz BPF
PSRR
-
55
-
dB
VRIPPLE=0.2 VP-P, f=1kHz
VNO
-
-80
-70
dBV
fPWM1
1128
1200
1272
kHz
fPWM2
940
1000
1060
kHz
fPWM3
564
600
636
kHz
fPWM4
470
500
530
kHz
fPWM5
376
400
424
kHz
Po=0W, BW=A-Weight
FSEL2=H,
FSEL1=H,
FSEL0=H
FSEL2=H,
FSEL1=H,
FSEL0=L
FSEL2=H,
FSEL1=L,
FSEL0=H
FSEL2=H,
FSEL1=L,
FSEL0=L
FSEL2=L,
FSEL1=H,
FSEL0=H
(Note 10) The value is specified as typical application. Actual value depends on PCB layout and external components.
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Datasheet
BD28412MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15µH, C=1µF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
10
45
Current Consumption : ICC1 [µA]
9
8
Current Consumption : ICC2, ICC3 [mA]
No load or filter
No signal
“Power Down”
RL=8Ω
7
6
5
4
3
2
35
25
15
10
0
0
8
10
12
Supply Voltage : VCC [V]
VCC=5V
90
VCC=9V
6
8
10
Supply Voltage : VCC [V]
12
14
Figure 6. Current Consumption vs Supply Voltage
(MUTE, ACTIVE)
100
VCC=12V
VCC=5V
90
VCC=9V
VCC=12V
80
80
70
70
RL=8Ω
60
Efficiency [%]
Efficiency [%]
MUTE
4
14
Figure 5. Current Consumption vs Supply Voltage
(Power Down)
100
ACTIVE
without snubber
20
1
6
ACTIVE
with snubber
30
5
4
No load or filter
No signal
“MUTE”
“ACTIVE”
RL=8Ω
40
50
40
30
RL=6Ω
60
50
40
30
20
20
10
10
0
0
0
2
4
6
8
10
12
0
14
4
6
8
10
12
14
Output Power [W/Ch]
Output Power [W/Ch]
Figure 7. Efficiency vs Output Power
(RL=8Ω)
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Figure 8. Efficiency vs Output Power
(RL=6Ω)
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BD28412MUV
Typical Performance Curves - continued
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15µH, C=1µF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
16
100
VCC=5V
90
VCC=9V
VCC=12V
14
80
12
70
Output Power [W/Ch]
50
Output Power [W/Ch]
PBTL
RL=4Ω
Output LC filter:
L=10μH, C=2.2μF
60
Efficiency [%]
RL=8Ω
40
30
10
THD+N=10%
8
6
THD+N=1%
4
20
2
10
0
0
0
2
4
6
8
10 12 14 16 18 20 22
4
6
Output Power [W/Ch]
12
14
Figure 10. Output Power vs Supply Voltage
(RL=8Ω)
16
24
PBTL
RL=4Ω
Output LC filter:
L=10μH, C=2.2μF
22
14
RL=6Ω
Output Power [W/Ch]
20
Output Power [W/Ch]
12
Output Power [W/Ch]
10
Supply Voltage
Voltage :: VVCC
Supply
[V]
CC[V]
Figure 9. Efficiency vs Output Power
(PBTL, RL=4Ω)
Output Power [W/Ch]
8
THD+N=10%
10
8
6
THD+N=1%
4
18
16
14
THD+N=10%
12
10
8
THD+N=1%
6
4
2
2
0
0
4
6
8
10
12
14
4
6
8
10
12
Supply Voltage
Voltage : V
Supply
VCC
[V]
CC [V]
Supply Voltage
Voltage :: VVCC
Supply
[V]
CC[V]
Figure 11. Output Power vs Supply Voltage
(RL=6Ω)
Figure 12. Output Power vs Supply Voltage
(PBTL, RL=4Ω)
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Datasheet
BD28412MUV
Typical Performance Curves - continued
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15µH, C=1µF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
2.5
2.5
RL=6Ω
2
VCC=12V
Consumption
: ICC [A]
CurrentCurrent
Comsumption
: ICC [A]
Current
Consumption
ICC [A]
Current
Consumption
: ICC: [A]
RL=8Ω
VCC=9V
1.5
VCC=5V
1
0.5
0
VCC=9V
2
VCC=12V
1.5
VCC=5V
1
0.5
0
0
2
4
6
8
10
12
14
0
Output Power [W/Ch]
2
4
6
8
10
12
14
Output Power [W/Ch]
Figure 13. Current Consumption vs Output Power
(RL=8Ω)
Figure14. Current Consumption vs Output Power
(RL=6Ω)
Current
Consumption
: ICC [A]
Current
Consumption
: ICC [A]
2.5
PBTL
RL=4Ω
Output LC filter:
L=10μH, C=2.2μF
2
VCC=12V
VCC=9V
1.5
VCC=5V
1
0.5
0
0
2
4
6
8
10 12 14 16 18 20 22
Output Power [W/Ch]
Figure15. Current Consumption vs Output Power
(PBTL, RL=4Ω)
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BD28412MUV
Typical Performance Curves - continued
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15µH, C=1µF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
36
OUT1
OUT2
-20
No Signal
RL=8Ω
OUT1
OUT2
PO=1W
RL=8Ω
31
-40
Voltage
Gain
[dB]
Voltage
Gain
[dB]
FFT of Output
Voltage [dBV]
NoiseNoise
FFT [dBV]
0
-60
-80
-100
26
21
-120
16
-140
10
100
1k
10k
10
100k
100
100k
Figure17. Voltage Gain vs Frequency
(RL=8Ω)
Figure16. FFT of Output Noise Voltage vs Frequency
(RL=8Ω)
10
10
1
OUT1
OUT2
fIN=6kHz
fIN=1kHz
0.1
PO=1W
Filter : AES17
RL=8Ω
1
THD+N [%]
fIN=1kHz
fIN=100Hz
fIN=6kHz
THD+N [%]
10k
Freq [Hz]
Frequency
[Hz]
Freq [Hz]
Frequency
[Hz]
0.01
1k
0.1
0.01
fIN=100Hz
Filter : AES17
RL=8Ω
0.001
0.01
0.001
0.1
1
10
100
100
1k
10k
100k
Frequency
[Hz]
Freq [Hz]
Output Power
Po [W]
: Po [W]
Figure19. THD+N vs Frequency
(RL=8Ω)
Figure18. THD+N vs Output Power
(RL=8Ω)
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BD28412MUV
Typical Performance Curves - continued
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15µH, C=1µF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
0
0
OUT1 to OUT2
OUT2 to OUT1
-20
-20
-40
-60
-80
-100
-60
-80
-100
-120
0.01
-120
0.1
1
10
100
10
100
Po [W]
Output Power
: Po [W]
1k
10k
100k
Freq [Hz]
Frequency
[Hz]
Figure 21. Crosstalk vs Frequency
(RL=8Ω)
Figure 20. Crosstalk vs Output Power
(RL=8Ω)
36
0
OUT1
OUT2
-20
No Signal
RL=6Ω
OUT1
OUT2
PO=1W
RL=6Ω
31
-40
Voltage
Gain
[dB]
Voltage
Gain
[dB]
FFT of Output Noise Voltage [dBV]
Noise FFT [dBV]
PO=1W
RL=8Ω
-40
Crosstalk [dB]
Crosstalk [dB]
OUT1 to OUT2
OUT2 to OUT1
RL=8Ω
-60
-80
-100
26
21
-120
-140
10
100
1k
10k
100k
Frequency
[Hz]
Freq [Hz]
10
100
1k
10k
100k
Freq [Hz]
Frequency
[Hz]
Figure 22. FFT of Output Noise Voltage vs Frequency
(RL=6Ω)
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Figure 23. Voltage Gain vs Frequency
(RL=6Ω)
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Datasheet
BD28412MUV
Typical Performance Curves - continued
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15µH, C=1µF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
10
10
THD+N [%]
1
fIN=6kHz
PO=1W
Filter : AES17
RL=6Ω
1
fIN=1kHz
0.1
0.01
OUT1
OUT2
THD+N [%]
fIN=1kHz
fIN=100Hz
fIN=6kHz
0.1
0.01
fIN=100Hz
Filter : AES17
RL=6Ω
0.001
0.01
0.001
0.1
1
10
10
100
100
0
0
OUT1 to OUT2
OUT2 to OUT1
OUT1 to OUT2
OUT2 to OUT1
RL=6Ω
-20
-40
PO=1W
RL=6Ω
-40
Crosstalk [dB]
Crosstalk [dB]
100k
Figure 25. THD+N vs Frequency
(RL=6Ω)
Figure 24. THD+N vs Output Power
(RL=6Ω)
-60
-80
-100
-120
0.01
10k
Frequency
[Hz]
Freq [Hz]
Output Power
Po [W]: Po [W]
-20
1k
-60
-80
-100
-120
0.1
1
10
100
Output Power
Po [W]: Po [W]
100
1k
10k
100k
Frequency
[Hz]
Freq [Hz]
Figure 27. Crosstalk vs Frequency
(RL=6Ω)
Figure 26. Crosstalk vs Output Power
(RL=6Ω)
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BD28412MUV
Typical Performance Curves - continued
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=10µH, C=2.2µF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
36
No Signal
PBTL
RL=4Ω
-20
PO=1W
PBTL
RL=4Ω
31
-40
Voltage
GainGain
[dB][dB]
Voltage
FFT of Noise
OutputFFT
Noise
Voltage [dBV]
[dBV]
0
-60
-80
-100
26
21
-120
-140
10
100
1k
10k
16
100k
10
100
1k
Frequency
Freq [Hz]
[Hz]
Figure 29. Voltage Gain vs Frequency
(PBTL, RL=4Ω)
10
10
fIN=1kHz
fIN=100Hz
fIN=6kHz
1
THD+N [%]
THD+N [%]
PO=1W
Filter : AES17
PBTL
RL=4Ω
fIN=6kHz
1
fIN=1kHz
0.1
0.1
0.1
0.01
fIN=100Hz
Filter : AES17
PBTL
RL=4Ω
0.001
0.01
100k
Frequency
Freq [Hz][Hz]
Figure 28. FFT of Output Noise Voltage vs Frequency
(PBTL, RL=4Ω)
0.01
10k
1
10
0.001
100
100
1k
10k
100k
Frequency
[Hz]
Freq [Hz]
Po [W]: Po [W]
Output Power
Figure 31. THD+N vs Frequency
(PBTL, RL=4Ω)
Figure 30. THD+N vs Output Power
(PBTL, RL=4Ω)
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BD28412MUV
Typical Performance Curves - continued
(Unless otherwise specified, Ta=25°C, VCC=11V, fIN=1kHz, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15µH, C=1µF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
36
OUT1
OUT2
-20
fPWM=400kHz
No Signal
RL=8Ω
fPWM=400kHz
31
-40
Voltage Gain [dB]
FFT of Output Noise Voltage [dBV]
0
-60
-80
-100
26
21
-120
16
-140
10
100
1k
10k
10
100k
100
100k
Figure 33. Voltage Gain vs Frequency
(fPWM=400kHz, RL=8Ω)
Figure 32. FFT of Output Noise Voltage vs Frequency
(fPWM=400kHz, RL=8Ω)
10
fIN=1kHz
fIN=100Hz
fIN=6kHz
1
10k
Frequency [Hz]
Frequency [Hz]
10
1k
OUT1
OUT2
fPWM=400kHz
PO=1W
Filter : AES17
RL=8Ω
1
fIN=6kHz
THD+N [%]
THD+N [%]
fIN=1kHz
0.1
0.01
OUT1
0.1
0.01
fIN=100Hz
OUT2
fPWM=400kHz
Filter : AES17
RL=8Ω
0.001
0.01
0.1
1
10
100
Output Power : PO [W]
10
100
1k
10k
100k
Frequency [Hz]
Figure 35. THD+N vs Frequency
(fPWM=400kHz, RL=8Ω)
Figure 34. THD+N vs Output Power
(fPWM=400kHz, RL=8Ω)
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BD28412MUV
Typical Performance Curves - continued
(Unless otherwise specified, Ta=25°C, VCC=11V, fIN=1kHz, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15µH, C=1µF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
0
-20
0
OUT1 to OUT2
OUT2 to OUT1
fPWM=400kHz
RL=8Ω
-20
Crosstalk [dB]
Crosstalk [dB]
fPWM=400kHz
PO=1W
RL=8Ω
-40
-40
-60
-80
-60
-80
-100
-100
-120
0.01
OUT1 to OUT2
OUT2 to OUT1
-120
0.1
1
10
100
100
1k
10k
100k
Frequency [Hz]
Output Power : PO [W]
Figure 37. Crosstalk vs Frequency
(fPWM=400kHz, RL=8Ω)
Figure 36. Crosstalk vs Output Power
(fPWM=400kHz, RL=8Ω)
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BD28412MUV
Application Information
1.
Power Up / Down Sequence
① Power up VCCP1, VCCP2, VCCA simultaneously.
⑧ Power down VCCP1, VCCP2, VCCA simultaneously.
VCCP1
VCCP2
VCCA
t
② After VCC rises,
please set PDX to High.
⑦ Set PDX to Low.
PDX
t
④ Input audio signal.
⑤ Stop audio signal.
IN1P
IN1N
IN2P
IN2N
MUTEX
t
More than
200msec
③ After input rises,
please set MUTEX to High.
⑥ After input signal stops,
please set MUTEX to Low.
t
OUT1P
OUT1N
OUT2P
OUT2N
t
Speaker
BTL output
(After LC filter)
t
Figure 38. Power Up / Down Sequence
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BD28412MUV
2.
Function Description
(1) Power Down and Mute Setting
PDX
MUTEX
L
L/H
H
L
H
H
Normal
PWM output
(Note 12)
ERRORX
OUT1P, 1N, 2P, 2N
(Note 11)
High-Z_Low
H
(Power down)
(Note 11)
High-Z_Low
H
(MUTE_ON)
Active
H
(MUTE_OFF)
ERROR Detection
PWM output
(Note 12)
ERRORX
OUT1P, 1N, 2P, 2N
(Note 11)
High-Z_Low
H
(Power down)
(Note 11)
High-Z_Low
L
(MUTE_ON)
(Note 11)
High-Z_Low
L
(MUTE_ON)
(Note 11) All power transistors are OFF and output terminals are pulled down by 40kΩ (Typ).
(Note 12) ERRORX pin is pulled up by 10kΩ resistor.
(2) Gain and Master/Slave Setting
Master/slave and gain are set by GAIN_MS_SEL pin voltage.
REGG
R6A
REGG
GAIN_MS_SEL
R6B
R6A(Note 13)
(to REGG)
R6B(Note 13)
(to GND)
Master/Slave
Gain
Input Impedance
(IN1P,IN1N,IN2P,IN2N)
18kΩ
18kΩ
33kΩ
51kΩ
68kΩ
68kΩ
68kΩ
open
Open
68kΩ
68kΩ
68kΩ
51kΩ
33kΩ
18kΩ
18kΩ
Slave
Slave
Slave
Slave
Master
Master
Master
Master
36dB
32dB
26dB
20dB
36dB
32dB
26dB
20dB
30kΩ (Typ)
45.1kΩ (Typ)
79.3kΩ (Typ)
127.9kΩ (Typ)
30kΩ (Typ)
45.1kΩ (Typ)
79.3kΩ (Typ)
127.9kΩ (Typ)
(Note 13) Please use 1% tolerance resistor.
Figure 39. GAIN_MS_SEL Pin Setting
Setting cannot be changed when IC is active, but it can be set by rebooting (PDX=H to L to H).
Master/Slave Function
This IC has master and slave mode, and it can be synchronized by PWM frequency between two ICs. In master
mode, SYNC pin becomes output pin for synchronization and in slave mode it becomes input pin, thus ensure
that each SYNC pins are connected. Also, same setting for FSEL2/FSEL1/FSEL0 pins must be secured.
(3) Parallel BTL Function
Parallel BTL mode can be set by connecting IN2P and IN2N pins to GND.
Please short OUT1P – OUT2P, OUT1N – OUT2N near the IC as much as possible.
Parallel BTL mode cannot be set by connecting IN1P and IN1N pins to GND.
Stereo BTL mode
Parallel BTL mode
Figure 40. Parallel BTL Mode
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BD28412MUV
(4) Power Limit Function
It is possible to limit the maximum output voltage by PLIMIT pin for protection of speaker.
LimitedOutput
Output Power
Power :PPLIM[W]
[w]
Limited
lim
12
Typ
10
VCC=12V
RL=8Ω
8
6
4
2
0
0
2
4
6
PLIMITPin
pinVoltage
voltage: V
VPLIMIT
[V]
PLIMIT
PLIMIT[V]
Figure 41. Power Limit
Figure 42. Limited Output Power vs PLIMIT Pin Voltage
C29
0.1µF
REGA
29
LDO
REGG
5
LDO
C5
1µF
R3A PLIMIT
R3B
3
PLIMIT
RIN2
Figure 43. PLIMIT Pin Setting
Output wave is clipped like Figure 37. by applying the DC voltage to 3PIN (PLIMIT), and output power is limited.
Figure 41 shows the relation between limited output power PLIM and 3PIN (PLIMIT) pin voltage VPLIMIT. VPLIMIT is
set by using external resistance R3A and R3B. Setting examples of R3A and R3B is showed below. If you don’t
use the power limit function, connect 3PIN (PLIMIT) to GND.
R3A [Ω]
R3B [Ω]
OPEN
12k
10k
8.2k
Short to GND
20k
20k
20k
Max output power PLIM [W] (RL=8Ω)
Min
Typ
Max
(unlimited)
3.4
6.8
13.6
2.5
5
10
1.7
3.4
6.8
When you use the power limit function in the setting except the table, PLIM is
PLIM 
(VREGA - VPLIMIT ) 2  39.8
2 RL
1
VPLIMIT =
VREGG .
1
1
1
R3 A (
+
+
)
R3 A R3B RIN2
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BD28412MUV
Where:
VREGA is the voltage of 29PIN (REGA), 5V(Typ)
VREGG is the voltage of 5PIN (REGG), 5.55V(Typ)
RIN2 is pull-down resistance of 3PIN (PLIMIT), 200kΩ(Typ)
Set the R3A and R3B to become the limited power.
(5) FSEL2 / FSEL1 / FSEL0 (AM avoidance function)
FSEL2 / FSEL1 / FSEL0 pins are used for PWM frequency setting. They can change the PWM frequency like
below.
FSEL2
FSEL1
FSEL0
PWM frequency
H
H
H
1200kHz (Typ)
H
H
L
1000kHz (Typ)
H
L
H
600kHz (Typ)
H
L
L
500kHz (Typ)
L
H
H
400kHz (Typ)
Do not set following conditions to become un-recommended frequency:
FSEL2=L, FSEL1=H, FSEL0=L
FSEL2=L, FSEL1=L, FSEL0=H
FSEL2=FSEL1=FSEL0=L
(6) AM avoidance function
PWM frequency is near to AM radio frequency band therefore this makes interference during AM radio is used,
and may negatively affects reception of AM radio wave. This interference can be reduced by adjusting PWM
frequency. Below are the recommended settings. Example, for receiving AM radio wave of 1269kHz in Asia /
Europe, PWM frequency must be set to 500kHz.
AM frequency [kHz]
Recommended PWM frequency setting
Asia / Europe
fPWM=400kHz
FSEL2=L
FSEL1=H
FSEL0=H
fPWM=500kHz
FSEL2=H
FSEL1=L
FSEL0=L
fPWM=600kHz
FSEL2=H
FSEL1=L
FSEL0=H
fPWM=1000kHz
FSEL2=H
FSEL1=H
FSEL0=L
fPWM=1200kHz
FSEL2=H
FSEL1=H
FSEL0=H
522 – 540
○
-
○
○
○
540 – 917
540 – 914
-
○
-
○
○
917 – 1125
914 – 1122
○
-
○
-
○
1125 – 1375
1122 – 1373
-
○
-
○
-
1375 – 1547
1373 – 1548
○
-
○
○
○
1547 – 1700
1548 – 1701
○
-
○
○
○
Americas
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BD28412MUV
3.
Application Information
(1) Application Circuit Example 1 (Stereo BTL, VCC=4.5V to 11V)
Overshoot of output PWM differs depending on the board, etc. Ensure that it is lower than absolute maximum
ratings. If it exceeds the absolute maximum ratings, snubber circuit need to be added, the circuit example is shown
on the next page.
VCC
To MCU
3.3V
REGG
C5
1µF
4
REGG
R6A GAIN_MS_SEL
R6B
C7
1µF
IN2P
BSP1P
VCCP1
VCCA
NC
REGA
TEST
DRIVER
FET
LDO
DRIVER
FET
6
21
19
7
18
REGG
IN2N
8
OSC
13
FSEL2
FSEL1
12
RL=8Ω/6Ω
C22A
1µF
L22A
15µH
C21
2.2µF
C20
2.2µF
L19A
15µH
OUT2P
C19A
1µF
GNDP2
RL=8Ω/6Ω
C17A
1µF
17 OUT2N
CONTROL I/F
11
FSEL0
10
SYNC
9
BSP1N
20 BSP2P
PWM
C8
1µF
C24A
1µF
GNDP1
22 OUT1N
DRIVER
FET
GAIN
5
23
DRIVER
FET
OUT1P
L17A
15µH
14
VCC
15
C15A
0.1µF
C16
2.2µF
16
BSP2N
Source
REGG
PLIMIT
REGG
C25
2.2µF
25
L24A
15µH
3
GNDA
26
24
PWM
PLIMIT
27
LDO
2
R3B
Audio
28
VCCP2
C2
1µF
29
NC
R3A
IN1N
30
CONTROL
I/F
1
C29
0.1µF
MUTEX
REGG
31
PROTECT
IN1P
C26B
10µF
REGG REGG
32
C1
1µF
C26A
0.1µF
C27B
4.7µF
PDX
ERRORX
R32
10kΩ
VCC
C27A
0.1µF
C15B
10µF
Figure 44. Application Circuit 1
BOM 1 (Stereo BTL, VCC=4.5V to 11V)
Parts
Qty.
Parts No.
1
R3A
1
R3B
Resistor
1
R6A
1
R6B
1
R32
4
C1, C2, C7, C8
Capacitor
2
Ref. Function Description (2)Gain and Master/Slave setting
10kΩ, 1/16W, J(±5%)
1µF, 16V, B(±10%)
1µF, 16V, B(±10%)
C5
C15A, C26A, C27A
C15B, C26B
(Note 14)
0.1µF, 25V, B(±10%)
(Note 14)
10µF, 25V, B(±10%)
(Note 14)
4
C16, C20, C21, C25
4
C17A, C19A, C22A, C24A
(Note 14)
1
4
2.2µF, 16V, B(±10%)
1µF, 25V, B(±10%)
4.7µF, 25V, B(±10%)
C27B
(Note 14)
1
Inductor
Ref. Function Description (4)Power Limit Function
(Note 14)
1
3
Description
0.1µF, 16V, B(±10%)
C29
15µH, 2.1A, ±20%
L17A, L19A, L22A, L24A
(Note 14) Please place it near pin as much as possible.
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Datasheet
BD28412MUV
(2) Application Circuit Example 2 (Stereo BTL, VCC=11V to 13V)
Please add the snubber circuit at OUT pin when VCC=11V to 13V.
R6A GAIN_MS_SEL
R6B
C7
1µF
IN2P
BSP1P
VCCP1
VCCA
REGA
TEST
NC
24
REGG
23
DRIVER
FET
22
DRIVER
FET
GAIN
5
DRIVER
FET
LDO
DRIVER
FET
6
20
18
REGG
OSC
13
R22
C22C
OUT1N
5.6Ω
680pF
BSP2P
C21
2.2µF
C24A
1µF
RL=8Ω/6Ω
C22A
1µF
L22A
15µH
Snubber circuit
C20
2.2µF
L19A
15µH
C19C
R19
GNDP2
680pF
5.6Ω
C19A
1µF
R17
C17C
OUT2N
5.6Ω
680pF
C17A
1µF
RL=8Ω/6Ω
L17A
15µH
14
15
VCC
C15A
0.1µF
C16
2.2µF
16
BSP2N
12
FSEL2
FSEL0
11
FSEL1
10
SYNC
9
17
CONTROL I/F
C8
1µF
680pF
5.6Ω
OUT2P
19
7
8
C24C
R24
GNDP1
21 BSP1N
PWM
IN2N
L24A
15µH
OUT1P
PLIMIT
4
C25
2.2µF
25
LDO
3
REGG
C5
REGG
1µF
26
REGG REGG
PLIMIT
27
VCCP2
REGG
28
PWM
GNDA
Source
29
2
R3B
Audio
C29
0.1µF
NC
R3A
C2
1µF
30
CONTROL
I/F
1
IN1N
C26B
10µF
MUTEX
REGG
31
PROTECT
IN1P
C26A
0.1µF
C27B
4.7µF
32
C1
1µF
VCC
C27A
0.1µF
PDX
ERRORX
R32
10kΩ
To MCU
VCC
3.3V
C15B
10µF
Figure 45. Application Circuit 2
BOM 2 (Stereo BTL, VCC=11V to 13V)
Parts
Qty.
Parts No.
1
R3A
1
R3B
1
R6A
Resistor
1
R6B
1
R32
4
R17, R19, R22, R24
4
C1, C2, C7, C8
2
Capacitor
Ref. Function Description (2)Gain and Master/Slave setting
10kΩ, 1/16W, J(±5%)
5.6Ω, 1/10W, J(±5%)
1µF, 16V, B(±10%)
1µF, 16V, B(±10%)
C5
C15A, C26A, C27A
C15B, C26B
(Note 15)
0.1µF, 25V, B(±10%)
(Note 15)
10µF, 25V, B(±10%)
(Note 15)
4
C16, C20, C21, C25
4
C17A, C19A, C22A, C24A
C17C, C19C, C22C,
C24C(Note 15)
C27B(Note 15)
4
1
(Note 15)
1
Inductor
Ref. Function Description (4)Power Limit Function
(Note 15)
1
3
Description
4
2.2µF, 16V, B(±10%)
1µF, 25V, B(±10%)
680pF, 25V, B(±10%)
4.7µF, 25V, B(±10%)
0.1µF, 16V, B(±10%)
C29
15µH, 2.1A, ±20%
L17A, L19A, L22A, L24A
(Note 15) Please place it near pin as much as possible.
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Datasheet
BD28412MUV
(3) Application Circuit Example 3 (Monaural PBTL, VCC=4.5V to 11V)
Overshoot of output PWM differs depending on the board, etc. Ensure that it is lower than absolute maximum
ratings. If it exceeds the absolute maximum ratings, snubber circuit need to be added, the circuit example is shown
on the next page.
VCC
VCC
C26A
0.1µF
C27A
0.1µF
3.3V
R32
10kΩ
C26B
10µF
C27B
4.7µF
C29
0.1µF
32
C1
1µF
REGG
R3A
PROTECT
IN1P
Source
REGG
28
PLIMIT
R6A GAIN_MS_SEL
R6B
6
IN2P
7
IN2N
8
L24B
10µH
C24B
2.2µF
REGG
23
DRIVER
FET
GNDP1
RL=4Ω
C22B
2.2µF
22 OUT1N
C21
2.2µF
BSP1N
21
DRIVER
FET
GAIN
5
C25
2.2µF
25
OUT1P
PLIMIT
4
26
24
3
REGG
REGG
27
LDO
PWM
GNDA
C5
1µF
29
2
R3B
Audio
30
CONTROL
I/F
1
IN1N
C2
1µF
31
DRIVER
FET
L22B
10µH
20 BSP2P
C20
2.2µF
LDO
DRIVER
FET
19
PWM
OUT2P
18 GNDP2
REGG
OSC
9
10
11
17 OUT2N
CONTROL I/F
12
13
14
15
C16
2.2µF
16
VCC
C15A
0.1µF
C15B
10µF
Figure 46. Application Circuit 3
BOM 3 (Monaural PBTL, VCC=4.5V to 11V)
Parts
Qty.
Parts No.
1
R3A
1
R3B
Resistor
1
R6A
1
R6B
1
R32
2
C1, C2
Capacitor
Ref. Function Description (4)Power Limit Function
Ref. Function Description (2)Gain and Master/Slave setting
10kΩ, 1/16W, J(±5%)
1µF, 16V, B(±10%)
1
C5(Note 16)
1µF, 16V, B(±10%)
3
C15A, C26A, C27A(Note 16)
0.1µF, 25V, B(±10%)
2
C15B, C26B(Note 16)
10µF, 25V, B(±10%)
4
C16, C20, C21, C25
2.2µF, 16V, B(±10%)
2
C22B, C24B
1
C27B
1
Inductor
Description
2
(Note 16)
2.2µF, 25V, B(±10%)
4.7µF, 25V, B(±10%)
(Note 16)
0.1µF, 16V, B(±10%)
C29
10µH, 2.6A, ±20%
L22B, L24B
(Note 16) Please place it near pin as much as possible.
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BD28412MUV
(4) Application Circuit Example 4 (Monaural PBTL, VCC=11V to 13V)
Please add the snubber circuit at OUT pin when VCC=11V to 13V.
REGG
REGG
REGG
R6A GAIN_MS_SEL
R6B
6
IN2P
7
IN2N
8
VCCP1
VCCA
NC
REGA
TEST
BSP1P
C25
2.2µF
25
L24B
10µH
24
REGG
OUT1P
23
DRIVER
FET
3
22
DRIVER
FET
PLIMIT
GAIN
5
26
LDO
2
4
27
DRIVER
FET
LDO
DRIVER
FET
GNDP1
OUT1N
C24C 680pF
R24 5.6Ω
C24B
2.2µF
5.6Ω
680pF
C22B
2.2µF
R22
C22C
RL=4Ω
L22B
10µH
C21
2.2µF
BSP1N
21
20 BSP2P
C20
2.2µF
19
PWM
OUT2P
18 GNDP2
REGG
OSC
10
11
SYNC
FSEL0
9
17 OUT2N
CONTROL I/F
12
13
14
VCC
15
C15A
0.1µF
C16
2.2µF
16
BSP2N
Source
CONTROL
I/F
28
VCCP2
PLIMIT
GNDA
C5
1µF
29
PWM
R3B
Audio
30
NC
C2
1µF
PROTECT
1
C29
0.1µF
MUTEX
R3A
IN1N
31
FSEL2
REGG
IN1P
C26B
10µF
C27B
4.7µF
FSEL1
C1
1µF
C26A
0.1µF
REGG REGG
32
VCC
C27A
0.1µF
PDX
ERRORX
R32
10kΩ
To MCU
VCC
3.3V
C15B
10µF
Figure 47. Application Circuit 4
BOM 4 (Monaural PBTL, VCC=11V to 13V)
Parts
Qty.
Parts No.
1
R3A
1
R3B
1
R6A
Resistor
1
R6B
1
R32
2
R22, R24(Note 17)
2
C1, C2
2
Capacitor
4
2
2
1
Ref. Function Description (2)Gain and Master/Slave setting
10kΩ, 1/16W, J(±5%)
5.6Ω, 1/10W, J(±5%)
1µF, 16V, B(±10%)
1µF, 16V, B(±10%)
C5
C15A, C26A, C27A
C15B, C26B
(Note 17)
0.1µF, 25V, B(±10%)
(Note 17)
10µF, 25V, B(±10%)
(Note 17)
C16, C20, C21, C25
2
2.2µF, 16V, B(±10%)
2.2µF, 25V, B(±10%)
680pF, 25V, B(±10%)
C22B, C24B
C22C, C24C(Note 17)
C27B(Note 17)
1
Inductor
Ref. Function Description (4)Power Limit Function
(Note 17)
1
3
Description
4.7µF, 25V, B(±10%)
(Note 17)
0.1µF, 16V, B(±10%)
C29
10µH, 2.6A, ±20%
L22B, L24B
(Note 17) Please place it near pin as much as possible.
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BD28412MUV
This GAIN_MS_SEL setting is one example,
so another Gain setting can be used.
BSP2N
VCCP2
NC
MUTEX
FSEL1
TEST
FSEL1
FSEL2
FSEL0
PDX
FSEL0
BSP2N
VCCP2
NC
MUTEX
FSEL2
SYNC
REGG REGG
BSP1P
VCCP1
VCCA
NC
REGA
Slave
Monaural PBTL
ERRORX
To MCU
SYNC
REGG REGG
BSP1P
VCCP1
VCCA
NC
REGA
TEST
PDX
Master
Stereo BTL
ERRORX
To MCU
(5) Application Example 5 (MASTER/SLAVE mode, VCC=4.5V to 11V)
Figure 48. Application Circuit 5
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Datasheet
BD28412MUV
4.
About the Protection Function
Protection
Function
Detecting & Releasing Condition
PWM Output
OUT1P, 1N, 2P, 2N
ERRORX(Note 18)
Output short
protection
Detecting
condition
Detecting current = 8A (Typ)
High-Z_Low
(Latch)(Note19)
L
(Latch) (Note19)
DC voltage
protection
Detecting
condition
DC voltage is over ±3.5V (Typ) for a period of
0.33sec to 0.66sec (Typ) at speaker output
High-Z_Low
(Latch) (Note19)
L
(Latch) (Note19)
Detecting
condition
Chip temperature to be over 150°C (Typ)
High-Z_Low
Releasing
condition
Chip temperature to be below 120°C (Typ)
Detecting
condition
Power supply voltage to be below 4.0V (Typ)
High-Z_Low
Power supply voltage to be above 4.1V (Typ)
Normal
operation
Overheat
protection
Under voltage
protection
Releasing
condition
Normal
operation
L
H
(Note 18) ERRORX pin is pulled up by 10kΩ resistor.
(Note 19) Once an IC is latched, the circuit is not released automatically even after an abnormal status is gone.
The following procedures ① or ② is available for recovery.
① After turning MUTEX terminal to Low (holding time to Low = 10msec (Min)) turn back to High again.
② Restore power supply after dropping to power supply voltage VCC < 3V (10msec (Min) holding) which internal power on reset circuit
activates.
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BD28412MUV
(1) Output Short Protection (Short to the Power Supply)
This IC has PWM output short protection circuit that stops the PWM output when the output speaker (after
LC-filter) is short-circuited to the power supply unintentionally.
Detecting condition - It will detect when MUTEX pin is set High and the current that flows into the PWM output pin
becomes 8A(Typ) or more for 250nsec (Typ). If detected, the PWM output instantaneously
goes to the state of High-Z_Low and IC is latch.
Releasing method - ① After turning MUTEX terminal to Low (holding time to Low = 10msec(Min)), turn back to
High again.
② Restore power supply after the voltage dropped to internal power on reset circuit
activating power supply voltage VCC＜3V (hold for 10msec (Min)).
Short to VCC
Release from short to VCC
OUT1P
OUT1N
OUT2P
OUT2N
t
Released from latch state
PWM out ： IC latches with High-Z_Low
Over-Current
8A(Typ)
t
ERRORX
t
250nsec(Typ)
MUTEX
Latch release
t
10msec(Min)
Figure 49. Output Short Protection Sequence
(Short to Power Supply)
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BD28412MUV
(2) Output Short Protection (Short to GND)
This IC has PWM output short protection circuit that stops the PWM output when the output speaker (after
LC-filter) is short-circuited to GND unintentionally.
Detecting condition - It will detect when MUTEX pin is set High and the current that flows into the PWM output
terminal becomes 8A(Typ) or more for 250nsec (Typ). If detected, the PWM output
instantaneously goes to the state of High-Z_Low and IC is latched.
Releasing method - ① After turning MUTEX terminal to Low (holding time to Low = 10msec(Min)), turn back to
High again.
② Restore power supply after the voltage dropped to internal power on reset circuit
activating power supply voltage VCC＜3V (hold for 10msec (Min)).
Short to GND
Release from short to GND
OUT1P
OUT1N
OUT2P
OUT2N
t
Released from latch state
PWM out： IC latches with High-Z_Low
Over-Current
8A(Typ)
t
ERRORX
t
250nsec(Typ)
MUTEX
Latch release
t
10msec(Min)
Figure 50. Sequence of the Output Short Protection
(Short to GND)
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BD28412MUV
(3) DC Voltage Protection
This IC is integrated with DC voltage protection circuit. When DC voltage is apply to the speaker unintentionally,
speaker output will mute, and this protection will prevent the speaker from destruction.
Detecting condition - It will detect when MUTEX pin is set High and speaker output is more than ±3.5V(Typ) over
0.33sec to 0.66sec(Typ).
Once detected, The PWM output instantaneously goes to the state of High-Z_Low, and IC
will latch.
Releasing method - ① After turning MUTEX terminal to Low (holding time to Low = 10msec(Min)), turn back to
High again.
② Restore power supply after the voltage dropped to internal power on reset circuit
activating power supply voltage VCC＜3V (hold for 10msec (Min)).
Abnormal condition
Impress DC voltage to speaker output over ±3.5V
OUT1P
OUT1N
OUT2P
OUT2N
Release abnormal condition
PWM out : IC latches with High-Z_Low
t
Released from latch state
3.5V
Speaker
Output
(After LC Filter)
t
OUT1P
OUT1N
OUT2P
OUT2N
-3.5V
Detection time TDET = 0.33sec to 0.66sec
ERRORX
t
MUTEX
Latch is released
t
10msec(Min)
Figure 51. DC Voltage Protection Sequence
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BD28412MUV
(4) Overheat Protection
This IC has overheat protection circuit that prevents thermal runaway under an abnormal state for the chip
temperature exceeded Tjmax=150°C.
Detecting condition - It will detect when MUTEX pin is set High and the temperature of the chip becomes 150°C
(Typ) or more. Speaker output mutes immediately when High temperature protection is
activated.
Releasing condition - It will release when MUTEX pin is set High and the temperature of the chip becomes 120°C
(Typ) or less. The speaker output is back to its normal operation immediately when released.
(Auto recovery)
Tj
150°C
120°C
t
OUT1P
OUT1N
OUT2P
OUT2N
High-Z_Low
t
Speaker
Output
t
ERRORX
t
Figure 52. Overheat Protection Sequence
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(5) Under Voltage Protection
This IC has under voltage protection circuit that mutes the output speaker once extreme drop in the power supply
voltage is detected.
Detecting condition - It will detect when MUTEX pin is set High and the power supply voltage becomes lower than
4V(Typ).Speaker output mutes immediately when under voltage protection is detected.
Releasing condition - It will release when MUTEX pin is set High and the power supply voltage becomes more
than 4.1V(Typ).The speaker output is back to its normal operation immediately when
released. (Auto recovery)
VCCA
VCCP1
VCCP2
4.1V
4V
t
OUT1P
OUT1N
OUT2P
OUT2N
High-Z_Low
t
Speaker
Output
ERRORX
t
3.3V
t
Figure 53. Under Voltage Protection Sequence
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BD28412MUV
5.
Selecting External Components
(1) Output LC Filter Circuit
An output filter is required to eliminate radio-frequency components exceeding the audio-frequency region
supplied to a load (speaker). Because this IC uses output PWM frequencies any of 400kHz, 500kHz, 600kHz,
1000kHz or 1200kHz, the high-frequency components must be appropriately removed.
This section takes an example of an LC type LPF shown below, in which coil L and capacitor C compose a
differential filter with an attenuation property of -12dB/oct. A large part of switching currents flow to capacitor C,
and only a small part of the currents flow to speaker RL. This filter reduces unwanted emission this way. In addition,
coil L and capacitor C compose a filter against in-phase components, reducing unwanted emission further.
L
The following shows output LC filter constants
and cutoff frequencies fC with typical load impedances.
OUT*P
Stereo BTL
C
RL
6Ω, 8Ω
RL
C
OUT*N
L
15µH
C
1µF
fC
41kHz
L
10µH
C
2.2µF
fC
34kHz
Monaural PBTL
RL
4Ω
L
Figure 54. Output LC Filter
Use inductors with low ESR and with sufficient margin of allowable currents. Power loss will increase if inductors
with high ESR are used.
Select a closed magnetic circuit type product in normal cases to prevent emission noise.
Use capacitors with low equivalent series resistance, and good impedance characteristics at high frequency
ranges (100kHz or higher). Also, select an item with sufficient voltage rating because massive amount of
high-frequency current flow is expected.
(2) Snubber Circuit Constant
When overshoot / undershoot of PWM Output exceeds absolute maximum rating, or when overshoot / undershoot
of PWM output negatively affects EMC, snubber circuit is used as shown below. And if VCC>11V, the snubber
circuit must be added.
The following table shows ROHM recommended value of
“Snubber filter constants” when using ROHM board.
VCCP
Snubber
circuit
LC filter
circuit
Stereo BTL
RL
6Ω
8Ω
PWM
OUT
C
R
C
680pF, 25V B(±10%)
680pF, 25V B(±10%)
R
5.6Ω, 1/10W J(±5%)
5.6Ω, 1/10W J(±5%)
Monaural PBTL
GNDP
RL
4Ω
C
680pF, 25V B(±10%)
R
5.6Ω, 1/10W J(±5%)
Figure 55. Snubber Circuit
Caution1: If the impedance characteristics of the speakers at high-frequency range increase rapidly, the IC might
not have stable operation in the resonance frequency range of the LC filter. Therefore, consider adding
damping-circuit, etc., depending on the impedance of the speaker.
Caution2: Though this IC has a short protection function, when short to VCC or GND after the LC filter,
over-current occurs during short protection function operation. Be careful about over/undershoot which
exceeds the maximum standard ratings because back electromotive force of the inductor will occur
which sometimes leads to IC destruction.
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BD28412MUV
(3)Operating condition with the application component
Parameter
Tolerance of Capacitor for BSP
Parts No.
C16, C20,
C21, C25
Limit
Min
Typ
Max
1.0(Note 20)
2.2
2.95(Note 21)
Unit
µF
Conditions
B characteristics, 16V
Ceramic type capacitor
recommended
(Note 20) Should use the capacity of the capacitor not to be less than a minimum in consideration of temperature characteristics and dc-bias characteristics.
(Note 21) It is value in consideration of +/-10% of capacity unevenness, capacity rate of change 22%. Please use the capacitor within this limit.
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BD28412MUV
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
OR
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may
result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the
board size and copper area to prevent exceeding the maximum junction temperature rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,
and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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Operational Notes – continued
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Figure 56. Example of monolithic IC structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls
below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
15. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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Datasheet
BD28412MUV
Ordering Information
B
D
2
8
1
4
Part Number
2
M
U
V
-
Package
MUV: VQFN032V5050
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
VQFN032V5050 (TOP VIEW)
Part Number Marking
D28412
LOT Number
1PIN MARK
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Datasheet
BD28412MUV
Physical Dimension, Tape and Reel Information
Package Name
VQFN032V5050
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2500pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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Datasheet
BD28412MUV
Revision History
Date
Revision
29.Jan.2016
06.Jun.2016
001
002
21.Sep.2016
003
Changes
New Release
P.3 to P.5 Pin Description
P.7 Absolute Maximum Ratings
P.7 Thermal Resistance
P.8 Thermal Resistance, Copper Pattern
P.9 Electrical Characteristics, Input Impedance 1
P.11 to P.18 Typical Performance Curves
P.19 Power Up / Down Sequence Figure 38.
P.21 Power Limit Function
P.23 to P.27 Application Circuit Example
P.35 Operating condition with the application component
P.28 DC voltage protection
P.31 DC voltage protection
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ADD
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21.Sep.2016 Rev.003
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
BD28412MUV - Web Page
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BD28412MUV
VQFN032V5050
2500
2500
Taping
inquiry
Yes