+3 V/+5 V/±5 V CMOS 4- and 8-Channel Analog Multiplexers ADG658/ADG659 FEATURES FUNCTIONAL BLOCK DIAGRAM ±2 V to ±6 V dual supply 2 V to 12 V single supply Automotive temperature range −40°C to +125°C <0.1 nA leakage currents 45 Ω on resistance over full signal range Rail-to-rail switching operation Single 8-to-1 multiplexer ADG658 Differential 4-to-1 multiplexer ADG659 16-lead LFCSP/TSSOP/QSOP packages Typical power consumption <0.1 μW TTL/CMOS compatible inputs Package upgrades to 74HC4051/74HC4052 and MAX4051/MAX4052/MAX4581/MAX4582 ADG659 ADG658 S1A S1 DA S4A D S1B DB S8 S4B A0 A1 A2 1 OF 4 DECODER A0 EN A1 SWITCHES SHOWN FOR A LOGIC 1 INPUT EN 03273-0-001 1 OF 8 DECODER Figure 1. APPLICATIONS Automotive applications Automatic test equipment Data acquisition systems Battery-powered systems Communication systems Audio and video signal routing Relay replacement Sample-and-hold systems Industrial control systems GENERAL DESCRIPTION The ADG658 and ADG659 are low voltage, CMOS analog multiplexers comprised of eight single channels and four differential channels, respectively. The ADG658 switches one of eight inputs (S1–S8) to a common output, D, as determined by the 3-bit binary address lines A0, A1, and A2. The ADG659 switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines A0 and A1. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched off. These parts are designed on an enhanced process that provides lower power dissipation yet gives high switching speeds. These parts can operate equally well as either multiplexers or demultiplexers and have an input range that extends to the supplies. All channels exhibit break-before-make switching action, preventing momentary shorting when switching channels. All digital inputs have 0.8 V to 2.4 V logic thresholds, ensuring TTL/CMOS logic compatibility when using single +5 V or dual ±5 V supplies. The ADG658 and ADG659 are available in 16-lead TSSOP/ QSOP packages and 16-lead 4 mm × 4 mm LFCSP packages. PRODUCT HIGHLIGHTS 1. 2. 3. 4. Single- and dual-supply operation. The ADG658 and ADG659 offer high performance and are fully specified and guaranteed with ±5 V, +5 V, and +3 V supply rails. Automotive temperature range −40°C to +125°C. Low power consumption, typically <0.1 μW. 16-lead 4 mm × 4 mm LFCSP packages, 16-lead TSSOP package and 16-lead QSOP package. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2004–2009 Analog Devices, Inc. All rights reserved. ADG658/ADG659 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................9 Applications ....................................................................................... 1 ESD Caution...................................................................................9 Functional Block Diagram .............................................................. 1 Pin Configurations and Function Descriptions ......................... 11 General Description ......................................................................... 1 Typical Performance Characteristics ........................................... 13 Product Highlights ........................................................................... 1 Test Circuits ..................................................................................... 16 Revision History ............................................................................... 2 Outline Dimensions ....................................................................... 19 Specifications..................................................................................... 3 Ordering Guide............................................................................... 20 Dual Supply ................................................................................... 3 5 V Single Supply .......................................................................... 5 2.7 V to 3.6 V Single Supply ........................................................ 7 REVISION HISTORY 2/09—Rev. A to Rev. B Changes to Ordering Guide .......................................................... 20 7/04—Rev. 0 to Rev. A Updated Format .................................................................. Universal Added QSOP Package Outline ..................................................... 20 Changes to Ordering Guide .......................................................... 20 3/03—Rev. 0: Initial Version Rev. B | Page 2 of 20 ADG658/ADG659 SPECIFICATIONS DUAL SUPPLY VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match between Channels (∆RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG658 ADG659 Channel ON Leakage ID, IS (ON) ADG658 ADG659 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS 1 tTRANSITION tON (EN) tOFF (EN) Break-Before-Make Time Delay, tBBM +25°C B Version −40°C to +85°C Y Version −40°C to+125°C VSS to VDD 45 75 1.3 3 10 16 90 100 3.2 3.5 17 18 ±0.005 ±0.2 ±0.005 ±0.2 ±0.1 ±0.005 ±0.2 ±0.1 Off Isolation Total Harmonic Distortion, THD + N Channel-to-Channel Crosstalk (ADG659) −3 dB Bandwidth ADG658 ADG659 Test Conditions/Comments V Ω typ Ω max Ω typ Ω max Ω typ Ω max VDD = +4.5 V, VSS = −4.5 V VS = ±4.5 V, IS = 1 mA; see Figure 21 VS = 3.5 V, IS = 1 mA VDD = +5 V, VSS = −5 V; VS = ±3 V, IS = 1 mA VDD = +5.5 V, VSS = −5.5 V VD = ±4.5 V, VS = m 4.5 V; see Figure 22 ±5 ±2.5 nA typ nA max nA typ nA max nA max nA typ nA max nA max 2.4 0.8 V min V max μA typ μA max pF typ VIN = VINL or VINH ±1 2 4 −90 0.025 ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ pC max dB typ % typ RL = 300 Ω, CL = 35 pF VS = 3 V; see Figure 25 RL = 300 Ω, CL = 35 pF VS = 3 V; see Figure 27 RL = 300 Ω, CL = 35 pF VS = 3 V; see Figure 27 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 3 V; see Figure 26 VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 28 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 RL = 600 Ω, 2 V p-p, f = 20 Hz to 20 kHz −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 31 210 400 MHz typ MHz typ RL = 50 Ω, CL = 5 pF; see Figure 30 ±5 ±5 ±2.5 0.005 2 80 115 80 115 30 45 50 140 165 140 165 50 55 10 Charge Injection Unit Rev. B | Page 3 of 20 VD = ±4.5 V, VS = m 4.5 V; see Figure 23 VD = VS = ±4.5 V; see Figure 24 ADG658/ADG659 Parameter CS (OFF) CD (OFF) ADG658 ADG659 CD, CS (ON) ADG658 ADG659 POWER REQUIREMENTS IDD +25°C 4 B Version −40°C to +85°C Y Version −40°C to+125°C Unit pF typ Test Conditions/Comments f = 1 MHz 23 12 pF typ pF typ f = 1 MHz f = 1 MHz 28 16 pF typ pF typ f = 1 MHz f = 1 MHz VDD = +5.5 V, VSS = −5.5 V Digital Inputs = 0 V or 5.5 V 0.01 1 ISS 0.01 1 1 Guaranteed by design; not subject to production test. Rev. B | Page 4 of 20 μA typ μA max μA typ μA max Digital Inputs = 0 V or 5.5 V ADG658/ADG659 5 V SINGLE SUPPLY VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match between Channels (∆RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG658 ADG659 Channel ON Leakage ID, IS (ON) ADG658 ADG659 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS 1 tTRANSITION tON (EN) tOFF (EN) Break-Before-Make Time Delay, tBBM +25°C B Version −40°C to +85°C Y Version −40°C to +125°C 0 to VDD 85 150 4.5 8 13 160 200 9 14 10 16 ±0.005 ±0.2 ±0.005 ±0.2 ±0.1 ±0.005 ±0.2 ±0.1 Off Isolation Channel-to-Channel Crosstalk (ADG659) −3 dB Bandwidth ADG658 ADG659 CS (OFF) CD (OFF) ADG658 ADG659 Test Conditions/Comments V Ω typ Ω max Ω typ Ω max Ω typ VDD = 4.5 V, VSS = 0 V VS = 0 V to 4.5 V, IS = 1 mA; see Figure 21 VS = 3.5 V, IS = 1 mA VDD = 5 V, VSS = 0 V, VS = 1.5 V to 4 V, IS = 1 mA VDD = 5.5 V VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 22 ±5 ±2.5 nA typ nA max nA typ nA max nA max nA typ nA max nA max 2.4 0.8 V min V max μA typ μA max pF typ VIN = VINL or VINH ±1 0.5 1 −90 −90 ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ pC max dB typ dB typ RL = 300 Ω, CL = 35 pF VS = 3 V; see Figure 25 RL = 300 Ω, CL = 35 pF VS = 3 V; see Figure 27 RL = 300 Ω, CL = 35 pF VS = 3 V; see Figure 27 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 3 V; see Figure 26 VS = 2.5 V, RS = 0 Ω, CL = 1 nF; see Figure 28 180 330 5 MHz typ MHz typ pF typ RL = 50 Ω, CL = 5 pF; see Figure 30 29 15 pF typ pF typ f = 1 MHz f = 1 MHz ±5 ±5 ±2.5 0.005 2 120 200 120 190 35 50 100 270 300 245 280 60 70 10 Charge Injection Unit Rev. B | Page 5 of 20 VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 23 VS = VD = 1 V or 4.5 V, see Figure 24 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 RL = 50 Ω, CL = 5 pF; f = 1 MHz; see Figure 31 f = 1 MHz ADG658/ADG659 Parameter CD, CS (ON) ADG658 ADG659 POWER REQUIREMENTS IDD +25°C B Version −40°C to +85°C Y Version −40°C to +125°C 30 16 0.01 1 1 Guaranteed by design; not subject to production test. Rev. B | Page 6 of 20 Unit Test Conditions/Comments pF typ pF typ f = 1 MHz f = 1 MHz VDD = 5.5 V Digital Inputs = 0 V or 5.5 V μA typ μA max ADG658/ADG659 2.7 V TO 3.6 V SINGLE SUPPLY VDD = 2.7 to 3.6 V, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match between Channels (∆RON) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG658 ADG659 Channel ON Leakage ID, IS (ON) ADG658 ADG659 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS 1 tTRANSITION tON (EN) tOFF (EN) Break-Before-Make Time Delay, tBBM +25°C B Version −40°C to +85°C Y Version −40°C to +125°C 0 to VDD 185 300 2 4.5 350 400 6 7 ±0.005 ±0.2 ±0.005 ±0.2 ±0.1 ±0.005 ±0.2 ±0.1 Off Isolation Channel-to-Channel Crosstalk (ADG659) −3 dB Bandwidth ADG658 ADG659 CS (OFF) CD (OFF) ADG658 ADG659 Test Conditions/Comments V Ω typ Ω max Ω typ Ω max VDD = 2.7 V, VSS = 0 V VS = 0 V to 2.7 V, IS = 0.1 mA; see Figure 21 VS = 1.5 V, IS = 0.1 mA VDD = 3.3 V VS = 1 V/3 V, VD = 3 V/1 V; see Figure 22 ±5 ±2.5 nA typ nA max nA typ nA max nA max nA typ nA max nA max 2.0 0.5 V min V max μA typ μA max pF typ VIN = VINL or VINH ±1 1 2 −90 −90 ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ pC max dB typ dB typ RL = 300 Ω, CL = 35 pF VS = 1.5 V; see Figure 25 RL = 300 Ω, CL = 35 pF VS = 1.5 V; see Figure 27 RL = 300 Ω, CL = 35 pF VS = 1.5 V; see Figure 27 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 1.5 V; see Figure 26 VS = 1.5 V, RS = 0 Ω, CL = 1 nF; see Figure 28 160 300 5 MHz typ MHz typ pF typ RL = 50 Ω, CL = 5 pF; see Figure 30 29 15 pF typ pF typ f = 1 MHz f = 1 MHz ±5 ±5 ±2.5 0.005 2 200 370 230 370 50 80 200 440 490 440 490 90 110 10 Charge Injection Unit Rev. B | Page 7 of 20 VS = 1 V/3 V, VD = 3 V/1 V; see Figure 23 VS = VD = 1 V or 3 V, see Figure 24 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 RL = 50 Ω, CL = 5 pF; f = 1 MHz; see Figure 31 f = 1 MHz ADG658/ADG659 Parameter CD, CS (ON) ADG658 ADG659 POWER REQUIREMENTS IDD +25°C B Version −40°C to +85°C Y Version −40°C to +125°C 30 16 0.01 1 1 Guaranteed by design; not subject to production test. Rev. B | Page 8 of 20 Unit Test Conditions/Comments pF typ pF typ f = 1 MHz f = 1 MHz VDD = 3.6 V Digital Inputs = 0 V or 3.6 V μA typ μA max ADG658/ADG659 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs 1 Digital Inputs1 Peak Current, S or D (Pulsed at 1 ms, 10% duty cycle max) Continuous Current, S or D Operating Temperature Range Automotive (Y Version) Industrial (B Version) Storage Temperature Range Junction Temperature θJA Thermal Impedance 16-Lead QSOP 16-Lead TSSOP 16-Lead LFCSP (4-Layer Board) Lead Temperature, Soldering Vapor Phase (60 sec) Infrared (15 sec) ESD 1 Rating 13 V −0.3 V to +13 V +0.3 V to −6.5 V VSS − 0.3 V to VDD + 0.3 V GND − 0.3 V to VDD + 0.3 V or 10 mA, whichever occurs first 40 mA Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION 20 mA −40°C to +125°C −40°C to +85°C −65°C to +150°C 150°C 104°C/W 150.4°C/W 70°C/W 215°C 220°C 5.5 kV Over voltages at AX, EN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings. Rev. B | Page 9 of 20 ADG658/ADG659 Table 5. ADG658 Truth Table A2 A1 A0 EN Switch Condition X1 0 0 0 0 1 1 1 1 X1 0 0 1 1 0 0 1 1 X1 0 1 0 1 0 1 0 1 1 0 0 0 0 0 0 0 0 None 1 2 3 4 5 6 7 8 1 X X X = Don’t Care Table 6. ADG659 Truth Table A1 X 0 0 1 1 1 1 A0 X 0 1 0 1 X 1 EN On Switch Pair 1 0 0 0 0 None 1 2 3 4 X = Don’t Care Rev. B | Page 10 of 20 ADG658/ADG659 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS S5 1 16 VDD S1B 1 16 VDD S7 2 15 S3 S3B 2 15 S3A 14 S2 DB 3 14 S2A TOP VIEW 13 S1 S6 5 (Not to Scale) 12 S4 S4B 4 ADG658 ADG659 TOP VIEW 13 DA S2B 5 (Not to Scale) 12 S1A EN 6 11 A0 EN 6 11 S4A VSS 7 10 A1 VSS 7 10 A0 GND 8 9 A2 GND 8 9 A1 03273-0-002 D 3 S8 4 TOP VIEW (Not to Scale) EN 4 VSS 6 7 8 DB 1 S4B 2 10 S4 S2B 3 9 A0 EN 4 12 S2A ADG659 TOP VIEW (Not to Scale) 11 DA 10 S1A 9 S4A 5 GND A2 A1 5 11 S1 6 7 8 EXPOSED PAD FLOATING 03273-A-003 S6 3 12 S2 ADG658 VSS D 1 S8 2 16 15 14 13 GND A1 A0 16 15 14 13 S3A S3B S1B VDD S3 S7 S5 VDD Figure 2. 16-Lead TSSOP/QSOP Pin Configuration Figure 3. 16-Lead, 4 mm × 4 mm LFCSP Pin Configuration Table 7. Pin Function Descriptions Parameter VDD VSS IDD ISS GND S D AX EN VD (VS) RON ∆RON RFLAT(ON) IS (OFF) ID (OFF) ID, IS (ON) VINL VINH IINL (IINH) CS (OFF) CD (OFF) CD, CS (ON) CIN Description Most Positive Power Supply Potential. Most Negative Power Supply Potential. Positive Supply Current. Negative Supply Current. Ground (0 V) Reference. Source Terminal. May be an input or output. Drain Terminal. May be an input or output. Logic Control Input. Active Low Digital Input. When high, device is disabled and all switches are OFF. When low, AX logic inputs determine ON switch. Analog Voltage on Terminals D, S. Ohmic Resistance between D and S. On Resistance Match between Any Two Channels, i.e., RONmax − RONmin. Flatness is defined as the difference between the maximum and minimum value of ON Resistance as measured over the specified analog signal range. Source Leakage Current with the Switch OFF. Drain Leakage Current with the Switch OFF. Channel Leakage Current with the Switch ON. Maximum Input Voltage for Logic 0. Minimum Input Voltage for Logic 1. Input Current of the Digital Input. OFF Switch Source Capacitance. Measured with reference to ground. OFF Switch Drain Capacitance. Measured with reference to ground. ON Switch Capacitance. Measured with reference to ground. Digital Input Capacitance. Rev. B | Page 11 of 20 ADG658/ADG659 Parameter tON tOFF tBBM Charge Injection Off Isolation Crosstalk Bandwidth On Response Insertion Loss Description Delay between Applying the Digital Control Input and the Output Switching ON. See Test Circuit 7. Delay between Applying the Digital Control Input and the Output Switching OFF. ON Time. Measured between 80% points of both switches when switching from one address state to another. Measure of the Glitch Impulse Transferred from the Digital Input to the Analog Output during Switching. Measure of Unwanted Signal Coupling through an OFF Switch. Measure of Unwanted Signal Coupled through from One Channel to Another as a Result of Parasitic Capacitance. The Frequency at which the Output is Attenuated by 3 dB. The Frequency Response of the ON Switch. The Loss Due to the ON Resistance of the Switch. Rev. B | Page 12 of 20 ADG658/ADG659 TYPICAL PERFORMANCE CHARACTERISTICS 100 TA = 25°C 140 90 +125°C VDD, VSS = ±2.7V 80 120 ON RESISTANCE (Ω) +85°C 60 VDD, VSS = ±3V 50 40 VDD, VSS = ±5.5V 30 VDD, VSS = ±4.5V 100 80 +25°C 60 –40°C 40 20 20 VDD = 5V VSS = 0V 0 –5.5 –3.5 –1.5 0.5 VD, VS (V) 2.5 03273-0-006 10 4.5 0 Figure 4. On Resistance vs. VD (VS) for Dual Supply 0.5 1.0 1.5 2.0 2.5 3.0 VD, VS (V) 4.0 3.5 4.5 5.0 Figure 7. On Resistance vs. VD (VS) for Different Temperatures (Single Supply) 300 250 TA = 25°C VDD = 2.7V ON RESISTANCE (Ω) VDD = 3V 150 VDD = 3.3V 100 VDD = 4.5V VDD = 5.5V 50 +85°C 250 200 +125°C 200 150 +25°C 100 VDD = 5V –40°C 50 VDD = 10V VDD = 12V 0 0 2 4 6 VD, VS (V) 8 10 12 VDD = 3V VSS = 0V 03273-0-007 ON RESISTANCE (Ω) 0 03273-0-009 VDD, VSS = ±5V 0 0 Figure 5. On Resistance vs. VD (VS) for Single Supply 0.5 1.0 1.5 VD, VS (V) 2.0 2.5 3.0 03273-0-010 ON RESISTANCE (Ω) 70 Figure 8. On Resistance vs. VD (VS) for Different Temperatures (Single Supply) 1.5 100 90 VDD = 5V VSS = –5V VD = ±4V VS = ±4V 1.0 80 +125°C IS (OFF) +85°C 60 CURRENT (nA) +25°C 50 40 –40°C 0 ID (OFF) –0.5 –1.0 IS, ID (ON) 30 –1.5 20 –2.0 VDD = +5V VSS = –5V 0 –5 –4 –3 –2 –1 1 0 VD, VS (V) 2 3 4 5 03273-0-008 10 –2.5 0 Figure 6. On Resistance vs. VD (VS) for Different Temperatures (Dual Supply) Rev. B | Page 13 of 20 20 40 60 80 TEMPERATURE (°C) 100 120 Figure 9. Leakage Current vs. Temperature (Dual Supply) 03273-0-011 ON RESISTANCE (Ω) 0.5 70 ADG658/ADG659 350 1.5 VDD = +5V VSS = 0V VD = ±4V VS = 1V 1.0 VSS = 0V ± 0.5 250 0 TIME (ns) ID (OFF) –0.5 –1.0 200 VDD = 5V tON 150 IS, ID (ON) 100 –1.5 VDD = +3V VSS = 0V VD = ±2.4V VS = 1V 50 ± –2.5 0 20 40 60 80 TEMPERATURE (°C) 100 120 tOFF 03273-0-012 –2.0 VDD = 3V 0 –40 –20 0 VDD = 5V 20 40 60 80 100 120 TEMPERATURE (°C) Figure 10. Leakage Current vs. Temperature (Single Supply) 03273-0-015 CURRENT (nA) VDD = 3V 300 IS (OFF) Figure 13. tON/tOFF Times vs. Temperature (Single Supply) 14 0 TA = 25°C –1 12 –2 –3 10 –5 –6 6 dB QINJ (PC) –4 8 4 –7 –8 –9 –10 VDD = +5V VSS = –5V –11 0 –12 –13 VDD = +5V VSS = 0V –4 –5 –4 –3 –2 –1 0 VS (V) 1 3 2 –14 5 4 100k Figure 11. Charge Injection vs. Source Voltage 140 1M 10M FREQUENCY (Hz) 100M Figure 14. ON Response vs. Frequency (ADG658) 0 VDD = +5V VSS = –5V –2 120 –4 100 –6 tON –8 –10 dB 80 60 –12 –14 tOFF –16 40 –18 –22 0 –40 –20 0 20 40 60 TEMPERATURE (°C) 80 100 120 VDD = +5V VSS = –5V TA = 25°C –24 100k 1M 10M FREQUENCY (Hz) 100M Figure 15. ON Response vs. Frequency (ADG659) Figure 12. tON/tOFF Times vs. Temperature (Dual Supply) Rev. B | Page 14 of 20 03273-0-017 –20 20 03273-0-014 TIME (ns) VDD = +5V VSS = –5V TA = 25°C –15 03273-0-013 –2 03273-0-016 2 ADG658/ADG659 0 10000 VDD = +5V VSS = –5V TA = 25°C –20 1000 VDD = 12V 100 –60 –80 1 –100 0.1 100k 1M 10M FREQUENCY (Hz) 100M VDD = 3V 0.01 03273-0-018 –120 VDD = 5V 10 0 4 6 V(EN) (V) 8 10 12 10 12 Figure 19. VDD Current vs. Logic Level Figure 16. OFF Isolation vs. Frequency 3.0 0 –20 LOGIC THRESHOLD VOLTAGE (V) VDD = –5V VSS = +5V TA = 25°C –10 –30 –40 –50 dB 2 03273-0-021 IDD (μA) –40 dB VSS = 0V –60 –70 –80 –90 –100 –110 2.5 2.0 1.5 1.0 0.5 –130 100k 1M 10M FREQUENCY (Hz) 100M 0 600Ω IN AND OUT VDD = +5V VSS = –5V TA = 25°C 1 0.1 0.01 50 100 200 500 1k 2k FREQUENCY (Hz) 5k 10k 20k 03273-0-020 THD + N (%) 10 20 2 4 6 VDD (V) 8 Figure 20. Logic Threshold Voltage vs. Supply Voltage Figure 17. Crosstalk vs. Frequency 100 0 Figure 18. THD + Noise Rev. B | Page 15 of 20 03273-0-022 03273-0-019 –120 ADG658/ADG659 TEST CIRCUITS IDS V1 VDD VSS VDD VSS S1 D D S2 RON = V1/I DS VO EN VS GND Figure 21. ON Resistance A Figure 23. ID (OFF) VDD VSS VDD VSS VDD VSS VDD VSS S1 S1 D S2 VS LOGIC 1 D ID (ON) A S8 S8 VS GND Figure 22. IS (OFF) VDD VIN 50Ω Figure 24. ID (ON) VSS VDD A2 3V ADDRESS DRIVE (VIN) VSS S1 VS1 A1 ADG658* S8 VS8 GND 50% VS1 90% VOUT D EN 50% 0V S2–S7 A0 03273-0-026 GND VD EN 03273-0-024 LOGIC 1 EN VD RL 300Ω CL 35pF VOUT 90% VS8 * SIMILAR CONNECTION FOR ADG659 tTRANSITION Figure 25. Switching Time of Multiplexer, tTRANSITION Rev. B | Page 16 of 20 tTRANSITION 03273-0-027 IS (OFF) A S8 03273-0-023 VS ID (OFF) 03273-0-025 S ADG658/ADG659 VSS VDD A2 VSS 3V ADDRESS DRIVE (VIN) VS S1 A1 50Ω 0V S2–S7 A0 S8 ADG658* VOUT D EN RL 300Ω GND CL 35pF VOUT 80% 80% 03273-0-028 VIN VDD tBBM * SIMILAR CONNECTION FOR ADG659 Figure 26. Break-Before-Make Delay, tBBM VSS VDD 3V VDD ENABLE DRIVE (VIN) VSS A2 S1 VS A1 S2–S8 tOFF (EN) ADG658* VO VOUT RL 300Ω GND CL 35pF 0.9VO 0.9VO OUTPUT 03273-0-029 D EN 50Ω 50% 0V A0 VIN 50% 0V tON (EN) * SIMILAR CONNECTION FOR ADG659 Figure 27. Enable Delay, tON (EN), tOFF (EN) VDD A2 VDD VSS VSS 3V A1 LOGIC INPUT (VIN) A0 ADG658* S VS D EN VIN VOUT 0V CL 1nF GND VOUT * SIMILAR CONNECTION FOR ADG659 Figure 28. Charge Injection Rev. B | Page 17 of 20 QINJ = CL × ΔVOUT ΔVOUT 03273-0-030 RS ADG658/ADG659 VDD 0.1μF 0.1μ F 0.1μ F VDD NETWORK ANALYZER VSS A2 A1 A1 50Ω A0 VSS 50Ω S A0 VS D VS D VOUT EN GND VOUT VS INSERTION LOSS = 20 LOG VDD VSS 0.1μ F A1 0.1μ F VDD VSS A0 VS VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 30. Bandwidth Figure 29. Off Isolation 50Ω RL 50Ω GND OFF ISOLATION = 20 LOG NETWORK ANALYZER VOUT EN RL 50Ω 03273-0-031 LOGIC 1 0.1μF VDD A2 50Ω S VSS EN ADG659 50Ω S1A DA S1B DB DB DA NETWORK ANALYZER RL 50Ω VOUT GND CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG Figure 31. Channel-to-Channel Crosstalk Rev. B | Page 18 of 20 VOUT VS 03273-0-032 VSS 03273-0-033 VDD ADG658/ADG659 OUTLINE DIMENSIONS 5.10 5.00 4.90 16 9 4.50 4.40 4.30 6.40 BSC 1 8 PIN 1 1.20 MAX 0.15 0.05 0.20 0.09 0.30 0.19 0.65 BSC COPLANARITY 0.10 0.75 0.60 0.45 8° 0° SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-153AB Figure 32. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters 4.0 BSC SQ 0.60 MAX 0.65 BSC PIN 1 INDICATOR TOP VIEW 1.00 0.85 0.80 13 12 16 1 EXPOSED PAD 3.75 BSC SQ 0.75 0.60 0.50 12° MAX PIN 1 INDICATOR 0.60 MAX (BOTTOM VIEW) 4 9 8 5 0.25 MIN 1.95 BSC 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM SEATING PLANE 0.35 0.28 0.25 2.25 2.10 SQ 1.95 0.20 REF COPLANARITY 0.08 COMPLIANT TO JEDEC STANDARDS MO-220-VGGC Figure 33. 16-Lead Lead Frame Chip Scale Package [LFCSP] (CP-16-4) Dimensions shown in millimeters Rev. B | Page 19 of 20 ADG658/ADG659 0.193 BSC 9 16 0.154 BSC 1 0.236 BSC 8 PIN 1 0.069 0.053 0.065 0.049 0.010 0.025 0.004 BSC COPLANARITY 0.004 0.012 0.008 SEATING PLANE 0.010 0.006 8° 0° 0.050 0.016 COMPLIANT TO JEDEC STANDARDS MO-137AB Figure 34. 16-Lead Shrink Small Outline Package [QSOP] (RQ-16) Dimensions shown in millimeters ORDERING GUIDE Model ADG658YRU ADG658YRU-REEL7 ADG658YRUZ 1 ADG658YRUZ-REEL71 ADG658YCP ADG658YCP-REEL7 ADG658YCPZ1 ADG658YRQ ADG658YRQ-REEL ADG658YRQZ1 ADG658YRQZ-REEL71 ADG659YRU ADG659YRU-REEL7 ADG659YRUZ1 ADG659YRUZ-REEL71 ADG659WYRUZ-REEL71, 2 ADG659YCP ADG659YCPZ1 ADG659YCPZ-REEL71 ADG659YRQ ADG659YRQ-REEL ADG659YRQ-REEL7 ADG659YRQZ1 1 2 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Lead Frame Chip Scale Package [LFCSP] 16-Lead Lead Frame Chip Scale Package [LFCSP] 16-Lead Lead Frame Chip Scale Package [LFCSP] 16-Lead Shrink Small Outline Package [QSOP] 16-Lead Shrink Small Outline Package [QSOP] 16-Lead Shrink Small Outline Package [QSOP] 16-Lead Shrink Small Outline Package [QSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Lead Frame Chip Scale Package [LFCSP] 16-Lead Lead Frame Chip Scale Package [LFCSP] 16-Lead Lead Frame Chip Scale Package [LFCSP] 16-Lead Shrink Small Outline Package [QSOP] 16-Lead Shrink Small Outline Package [QSOP] 16-Lead Shrink Small Outline Package [QSOP] 16-Lead Shrink Small Outline Package [QSOP] Z = RoHS Compliant Part. Qualified for automotive. ©2004–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03273-0-2/09(B) Rev. B | Page 20 of 20 Package Option RU-16 RU-16 RU-16 RU-16 CP-16 CP-16 CP-16 RQ-16 RQ-16 RQ-16 RQ-16 RU-16 RU-16 RU-16 RU-16 RU-16 CP-16 CP-16 CP-16 RQ-16 RQ-16 RQ-16 RQ-16