ON NLU2G06CMUTCG Dual inverter, open drain Datasheet

NLU2G06
Dual Inverter, Open Drain
The NLU2G06 MiniGatet is an advanced high−speed CMOS dual
inverter with open drain output in ultra−small footprint.
The NLU2G06 input and output structures provide protection when
voltages up to 7.0 V are applied, regardless of the supply voltage.
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Features
•
•
•
•
•
•
•
High Speed: tPD = 3.8 ns (Typ) @ VCC = 5.0 V
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
Power Down Protection Provided on inputs
Balanced Propagation Delays
Overvoltage Tolerant (OVT) Input and Output Pins
Ultra−Small Packages
These are Pb−Free Devices
IN A1
1
GND
6
UDFN6
1.0 x 1.0
CASE 517BX
XM
UDFN6
1.2 x 1.0
CASE 517AA
FM
UDFN6
1.45 x 1.0
CASE 517AQ
XM
1
1
OUT Y1
5
2
MARKING
DIAGRAMS
VCC
1
3
IN A2
4
F
M
OUT Y2
= Device Marking
= Date Code
Figure 1. Pinout (Top View)
ORDERING INFORMATION
IN A1
1
OUT Y1
IN A2
1
OUT Y2
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Figure 2. Logic Symbol
PIN ASSIGNMENT
1
IN A1
2
GND
3
IN A2
4
OUT Y2
5
VCC
6
OUT Y1
FUNCTION TABLE
A
Y
L
H
Z
L
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 4
1
Publication Order Number:
NLU2G06/D
NLU2G06
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
DC Supply Voltage
−0.5 to +7.0
V
VIN
DC Input Voltage
−0.5 to +7.0
V
DC Output Voltage
−0.5 to +7.0
V
VIN < GND
−20
mA
VOUT < GND
±20
mA
VOUT
Parameter
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Source/Sink Current
±12.5
mA
ICC
DC Supply Current Per Supply Pin
±25
mA
IGND
DC Ground Current per Ground Pin
±25
mA
TSTG
Storage Temperature Range
−65 to +150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction Temperature Under Bias
150
°C
MSL
FR
ILATCHUP
Moisture Sensitivity
Level 1
Flammability Rating Oxygen
Index: 28 to 34
UL 94 V−0 @ 0.125 in
Latchup Performance Above VCC and Below GND at 125 °C (Note 2)
±500
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA / JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
1.65
5.5
V
VCC
Positive DC Supply Voltage
VIN
Digital Input Voltage
0
5.5
V
Output Voltage
0
5.5
V
−55
+125
°C
0
0
100
20
ns/V
VOUT
TA
Operating Free−Air Temperature
Dt/DV
Input Transition Rise or Fall Rate
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
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2
NLU2G06
DC ELECTRICAL CHARACTERISTICS
Symbol
VIH
VIL
VOL
Parameter
Conditions
Low−Level
Input Voltage
Low−Level
Input Voltage
Low−Level
Output Voltage
VCC
(V)
TA = 25 5C
Min
Typ
TA = −555C to
+1255C
TA = +855C
Max
Min
1.65
0.75 x
VCC
0.75 x
VCC
2.3 to
5.5
0.70 x
VCC
0.70 x
VCC
Max
Min
Max
V
1.65
0.25 x
VCC
0.25 x
VCC
0.25 x
VCC
2.3 to
5.5
0.30 x
VCC
0.30 x
VCC
0.30 x
VCC
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0
0
0
Unit
VIN = VIH or VIL
IOL = 50 mA
2.0
3.0
4.5
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
V
Z−State
Output
Leakage
Current
VIN = VIH, VOUT
= VCC or GND
5.5
±0.25
±2.5
±5.0
mA
IIN
Input Leakage
Current
0 v VIN v 5.5 V
0 to
5.5
±0.1
±1.0
±1.0
mA
IOFF
Power Off
Input Leakage
Current
0 v VIN,
VOUT v 5.5 V
0
0.25
2.5
5.0
mA
ICC
Quiescent
Supply Current
0 v VIN v VCC
5.5
1.0
10
40
mA
ILKG
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 nS)
Symbol
tPZL
Parameter
Propagation Delay,
Input A to Output Y
VCC
(V)
Test
Condition
3.0 to 3.6
Output Disable Time
CIN
Input Capacitance
CPD
Power Dissipation
Capacitance (Note 3)
Min
TA = +855C
Typ
Max
RL = R1 = 50 W
CL = 15 pF
5.0
7.1
RL = R1 = 50 W
CL = 50 pF
7.5
RL = R1 = 50 W
CL = 15 pF
Unit
8.5
10
ns
10.6
12
14.5
3.8
5.5
6.5
8.0
RL = R1 = 50 W
CL = 50 pF
5.3
7.5
8.5
10
3.0 to 3.6
RL = R1 = 50 W
CL = 50 pF
7.5
10.6
12
14.5
4.5 to 55
RL = R1 = 50 W
CL = 50 pF
5.3
7.5
8.5
10
4.0
10
10
10
5.0
18
Min
Max
TA = −555C
to +1255C
Max
4.5 to 5.5
tPLZ
TA = 25 5C
Min
ns
pF
pF
3. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without
load. Average operating current can be obtained by the equation ICC(OPR) = CPD • VCC • fin + ICC. CPD is used to determine the no−load
dynamic power consumption: PD = CPD • VCC2 • fin + ICC • VCC.
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3
NLU2G06
VCC
A
50%
GND
tPZL
Y
tPLZ
50% VCC
HIGH
IMPEDANCE
VOL +0.3 V
Figure 3. Switching Waveforms
VCC
R1
PULSE
GENERATOR
VCC x 2
DUT
RT
CL
RL
RT = ZOUT of pulse generator (typically 50 W)
Figure 4. Test Circuit
ORDERING INFORMATION
Package
Shipping†
NLU2G06MUTCG
UDFN6, 1.2 x 1.0, 0.4P
(Pb−Free)
3000 / Tape & Reel
NLU2G06AMUTCG
(In Development)
UDFN6, 1.45 x 1.0, 0.5P
(Pb−Free)
3000 / Tape & Reel
NLU2G06CMUTCG
(In Development)
UDFN6, 1.0 x 1.0, 0.35P
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NLU2G06
PACKAGE DIMENSIONS
UDFN6 1.0x1.0, 0.35P
CASE 517BX
ISSUE O
PIN ONE
REFERENCE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
A B
D
ÉÉÉ
ÉÉÉ
ÉÉÉ
E
0.10 C
2X
2X
0.10 C
DIM
A
A1
A3
b
D
E
e
L
L1
TOP VIEW
A3
0.05 C
A
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.12
0.22
1.00 BSC
1.00 BSC
0.35 BSC
0.25
0.35
0.30
0.40
0.05 C
SIDE VIEW
A1
C
RECOMMENDED
SOLDERING FOOTPRINT*
SEATING
PLANE
5X
e
5X
0.48
L
6X
0.22
3
1
L1
1.18
6
4
BOTTOM VIEW
6X
b
0.10
M
C A B
0.05
M
C
0.53
1
PKG
OUTLINE
NOTE 3
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
NLU2G06
PACKAGE DIMENSIONS
UDFN6, 1.2x1.0, 0.4P
CASE 517AA
ISSUE C
EDGE OF PACKAGE
PIN ONE
REFERENCE
2X
0.10 C
ÉÉÉ
ÉÉÉ
ÉÉÉ
L1
E
DETAIL A
Bottom View
(Optional)
TOP VIEW
2X
EXPOSED Cu
0.10 C
(A3)
0.10 C
A1
A
10X
0.08 C
ÉÉÉ
ÉÉÉ
A3
DETAIL B
Side View
(Optional)
5X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
0.30
0.40
0.00
0.15
0.40
0.50
MOUNTING FOOTPRINT*
6X
6X
0.42
C
A1
DIM
A
A1
A3
b
D
E
e
L
L1
L2
MOLD CMPD
SEATING
PLANE
SIDE VIEW
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
D
0.22
L
3
L2
6X
b
0.10 C A B
0.05 C
6
0.40
PITCH
4
e
NOTE 3
1.07
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
6
NLU2G06
PACKAGE DIMENSIONS
UDFN6 1.45x1.0, 0.5P
CASE 517AQ
ISSUE O
A
B
D
L
L
L1
PIN ONE
REFERENCE
0.10 C
ÉÉÉ
ÉÉÉ
DETAIL A
E
OPTIONAL
CONSTRUCTIONS
DETAIL B
MOLD CMPD
DETAIL B
0.05 C
6X
DIM
A
A1
A2
b
D
E
e
L
L1
ÉÉ
ÉÉ
EXPOSED Cu
TOP VIEW
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
OPTIONAL
CONSTRUCTIONS
A
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.07 REF
0.20
0.30
1.45 BSC
1.00 BSC
0.50 BSC
0.30
0.40
−−−
0.15
MOUNTING FOOTPRINT
0.05 C
A1
A2
SIDE VIEW
e
6X
C
6X
SEATING
PLANE
L
1.24
3
1
DETAIL A
6X
0.53
6
0.30
PACKAGE
OUTLINE
4
BOTTOM VIEW
6X
0.50
PITCH
DIMENSIONS: MILLIMETERS
b
0.10 C A B
0.05 C
1
NOTE 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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