Preliminary Datasheet LPA2100 Build in EQ Function 25W Class-D Audio Amplifier With AGC function General Description Features The LPA2100 is a mono efficient, digital amplifier power 15W Output at 0.1% THD with a 4Ω Load and12.0V PVCC for amplifier stage for driving speakers up to 25W/4Ω. The LPA2100 integrates AGC(automatic gain control)circuit for a Wide voltage range: 4.5V~15V NCN(Non-Crack Noise) technical in application without Integrated 2 degree AGC circuit damaging speaker when a high power signal occurs. Integrated Self-Protection Circuits Including When function failed happened to input capacitor, the Over-Voltage, Under-Voltage, Over-Temperature, chip will cut off the output circuit through detecting the DC-Detect, and Short Circuit input signal to protect speaker. The LPA2100 device is Multiple Switching Frequencies fully protected against faults with short-circuit protection AM Avoidance and thermal protection as well as over-voltage and DC Master/Slave Synchronization protection. Faults are reported back to the processor to Up to 450KHz Switching Frequency prevent devices form being damaged during overload High Efficient Class-D Operation: >90% conditions. Indication for NCN(Non-Crack Noise) Pb-Free Package Order Information LPA2100 □ □ □ □ Marking Information F: Pb-Free Package Type Device Marking Package Shipping LPA2100A LPS ETSSOP-24 xxxK/REEL LPA2100A ESOP16 TS : ETSSOP-24 SP : ESOP16 YWX LPA2100 Mute type： A：Active Low LPS ETSSOP-24 LPA2100 ESOP16 xxxK/REEL YWX Default：Active High Y: Y is year code. W: W is week code. X: X is series number. Applications Mini-Micro Component, Speaker Bar, Docks After-Market Automotive Consumer Audio Applications, CRT TV Portable Bluetooth Speaker Cellular and Smart mobile phone Square Speaker LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 1 of 20 Preliminary Datasheet LPA2100 Typical Application Circuit PVCC VDD 4.5V-15V VINN 1 16 VINP OPP 2 15 OPN CTRL/SLV 3 14 VDD EN 4 13 GND MUTE 5 12 VCLAMP PVCC 6 11 PVCC BSN 7 10 BSP OUTN 8 9 OUTP VINN 1 24 VINP OPP 2 23 OPN CTRL/SLV 3 22 PSUB EN 4 21 AVCC MUTE 5 20 VDD RELEN 6 19 GND SYNC 7 18 VCLAMP NCNBUSY 8 17 NC BSN PVCC 9 16 PVCC GND BSN 10 15 BSP PGND OUTN 11 14 OUTP PGND 12 13 PGND Cs3 1uF Cs2 66uF+1uF Cs1 470uF Rf1 82K CTRL/SLV Rf2 20K VCLAMP EN MUTE z z Signal Control and Indication Signal Input C1 0.33uF Rn6 20K C4 33nF VINP OPP BSN VINN PGND GND Rf2 20K Rf3 100K C3 0.33uF OUTP OUTN Rf1 20K Rf5 100K Schottky diode BSP OPN C2 33nF Cv 1uF Speaker 17 PGND 1nF Cp 0.22uF B1 B2 Cn 0.22uF 1nF Rn2 20K ESOP16 4.5V-15V Cs1 470uF Cs2 66uF+1uF AVDD PVCC AVCC AVDD VDD z Rf1 82K CTRL/SLV Rf2 20K Cs3 1uF PSUB z z z Signal Control and Indication EN MUTE RELEN SYNC NCNBUSY z C2 33nF Rf5 100K Signal Input C1 0.33uF Rn6 20K C4 33nF Rf3 100K OPN Rf1 20K VINP OPP Rf2 20K VINN C3 0.33uF VCLAMP Cv 1uF Schottky diode BSP OUTP OUTN Speaker Cp 0.22uF B1 1nF 25 PGND B2 Cn 0.22uF 1nF Rn2 20K TSSOP-24 LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 2 of 20 Preliminary Datasheet LPA2100 Functional Pin Description TSSOP-24 ESOP16 Pin Description Pin Num Pin Num Name 1 1 VINN Negative signal input. 2 2 OPP Positive signal output. 3 3 CTRL/SLV AGC control and selects between Master and Slave mode depending on pin voltage divider. Show detail in sheet 1. 4 4 EN Chip enable pin. Active high. 5 5 MUTE Mute control. LPA2100A active high，LPA2100 active low. 6 RELEN Crack Noise release pin. Active low. 7 SYNC Clock input/output for synchronizing multiple class-D devices. Determined by CTRL/SLV pin. Show detail in sheet 1. 8 NCNBUSY Indication of Crack Noise. Chip keeps output pulse through this pin when Crack occurs. Show detail in sheet 1. 9 6 PVCC 10 7 BSN 11 8 OUTN Negative output. 12,13,25 17 PGND Power ground. 14 9 OUTP Positive output. 15 10 BSP 16 11 PVCC 17 18 NC 12 VCLAMP Power supply for chip. Negative self boost output pin. There is a 220nF capacitor between this pin and OUTN. Negative self boost output pin. There is a 220nF capacitor between this pin and OUTN. Power supply for chip. Floating pin. Supply for internal Power MOS. There should be a 1uF capacitor between this pin and GND. 19 13 GND Analog ground. 20 14 VDD Internal power supply. There should be a 1uF capacitor between this pin and GND. 21 AVCC Analog power supply. 22 PSUB Substrate voltage. 23 15 OPN Negative signal output. 24 16 VINP Positive signal input. LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 3 of 20 Preliminary Datasheet LPA2100 Classical Application 1: Low Restraint OPN Rin1 Rf1 VINP OPP R1 C1 Cin1 Signal Audio Precision Input Rin2 Rf2 R3 C3 Cin2 06/27/16 11:07:40 VINN +20 +15 d B V +10 +5 +0 20 50 100 200 500 1k 2k 5k 10k 20k Hz Sweep Trace Color Line Style Thick Data Axis 1 1 Cyan Solid 3 Analyzer.Level A Left Comment Audio Precision 06/27/16 13:55:12 Cin1/2=1uF; Rin1/2=20K; R1/3=NC; C1/3=NC; Rf1/2=47K +20 +15 d B V +10 +5 +0 -5 20 50 100 200 500 1k 2k 5k 10k 20k Hz Sweep Trace Color Line Style Thick Data Axis 1 1 Cyan Solid 3 Analyzer.Level A Left Comment Cin1/2=47nF; Rin1/2=20K; R1/3=20K;C1/3=10nF; Rf1/2=47K LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 4 of 20 Preliminary Datasheet LPA2100 Classical Application 2: High Restraint OPN C2 Rf1 R2 VINP OPP Rin1 Cin1 Signal Input C4 Rf2 R4 Audio Precision Rin2 Cin2 06/27/16 11:07:40 VINN +20 +15 d B V +10 +5 +0 20 50 100 200 500 1k 2k 5k 10k 20k Hz Sweep Trace Color Line Style Thick Data Axis 1 1 Cyan Solid 3 Analyzer.Level A Left Audio Precision Comment 06/27/16 11:39:16 Cin1/2=1uF; Rin1/2=20K; C2/4=NC; R2/4=NC; Rf1/2=47K +20 d B V +15 +10 +5 +0 20 50 100 200 500 1k 2k 5k 10k 20k Hz Sweep Trace Color Line Style Thick Data Axis 1 1 Cyan Solid 3 Analyzer.Level A Left Comment Cin1/2=0.47uF; Rin1/2=20K; C2/4=15nF; R2/4=10K; Rf1/2=47K LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 5 of 20 Preliminary Datasheet LPA2100 Classical Application 3: High and Low Restraint (Band Pass) OPN Rin1 C2 Rf1 R2 Signal Input VINP OPP C1 R1 Cin1 C4 Rin2 Rf2 R4 Audio Precision R3 Cin2 VINN C3 06/27/16 11:07:40 +20 +15 d B V +10 +5 +0 20 50 100 200 500 1k 2k 5k 10k 20k Hz Sweep Trace Color Line Style Thick Data Axis 1 1 Cyan Solid 3 Analyzer.Level A Left Audio Precision Comment 06/27/16 12:09:45 Cin1/2=1uF; Rin1/2=20K;R1/3=NC; C1/3=NC; C2/4=NC; R2/4=NC; Rf1/2=47K +20 d B V +15 +10 +5 +0 20 50 100 200 500 1k 2k 5k 10k 20k Hz Sweep Trace Color Line Style Thick Data Axis 1 1 Cyan Solid 3 Analyzer.Level A Left Comment Cin1/2=0.47uF; Rin1/2=20K; R1/3=20K; C2/4=10nF; R2/4=10K; Rf1/2=47K LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 6 of 20 Preliminary Datasheet LPA2100 Absolute Maximum Ratings Note 1 Supply Voltage to GND ------------------------------------------------------------------------------------------------------------ -0.3V to 18V Other Pin to GND --------------------------------------------------------------------------------------------------------------------- -0.3V to 6V Maximum Junction Temperature ---------------------------------------------------------------------------------------------------------- 150°C Operating Ambient Temperature Range (Ta) --------------------------------------------------------------------------------- -40℃ to 85°C Maximum Soldering Temperature (at leads, 10 sec) --------------------------------------------------------------------------------- 260°C Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Information Maximum Power Dissipation (TSSOP-24, PD,TA=25°C) --------------------------------------------------------------------------- Thermal Resistance (TSSOP-24, JA) --------------------------------------------------------------------------------------------------- 36℃/W 3.4W Maximum Power Dissipation (ESOP-16, PD,TA=25°C) ----------------------------------------------------------------------------- Thermal Resistance (ESOP-16, JA) ------------------------------------------------------------------------------------------------------ 65℃/W 1.9W ESD Susceptibility Note 2 HBM(Human Body Mode) MM(Machine Mode) ------------------------------------------------------------------------------------------------------------- 2KV Note 3 --------------------------------------------------------------------------------------------------------------------- 200V Note 2. The Human body model (HBM) is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. The testing is done according JEDEC. Note 3. Machine Model (MM) is a 200pF capacitor discharged through a 500nH inductor with no series resistor into each pin. The testing is done according JEDEC. LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 7 of 20 Preliminary Datasheet LPA2100 Electrical Characteristics (TA = 25°C, AVCC = PVCC = 12 V, RL = 4 Ω, unless otherwise noted) Parameter Symbol Supply power Test Conditions Min PVCC Output power PO Typ 4.5 THD+N=10%, f=1KHz,RL=4Ω PVCC=12V 18 PVCC=14V 25 THD+N=10%, f=1KHz,RL=8Ω PVCC=12V 10.5 PVCC=14V 14.3 THD+N=1%, f=1KHz,RL=4Ω PVCC=12V 16 PVCC=14V 20 THD+N=1%, f=1KHz,RL=8Ω PVCC=12V 8.5 PVCC=14V 11.6 f=100HZ 70 f=1KHz 73 Max Units 15 V W Power supply ripple rejection PSRR INPUT ac-grounded with CIN=0.47uF, PVCC=12V Signal-to-noise ratio SNR PVCC=12V,POUT=12W,RL =4Ω f=1KHz 95 dB RL=4Ω,PO=12W f=1KHz 91 % Efficiency η dB Output integrated noise Vn 22 Hz to 20kHz, A-weighted filter, Gain = 26dB 130 uV Quiescent current IQ PVCC=12V，No load 12 mA Shutdown current ISD PVCC=12V 2 uA VDD PVCC=12V 5.1 V VCLAMP PVCC=12V 6.09 V PVCC=12V >2.1 V PVCC=12V 2 uA PVCC=12V，LPA2100L 1＜ V PVCC=12V，LPA2100H >1.9 V PVCC=12V 60 uA VOS PVCC=12V, VSD =0V 5 mV fsw PVCC=5~12V 350 450 KHz Internal power supply Supply for internal Power MOS EN supply voltage(min) Shutdown supply current (min) MUTE supply voltage(min) MUTE supply voltage(max) MUTE supply Current Offset output voltage fOSC Oscillator frequency LPA2100–00 Version 1.0 May.-2016 LPA2100A LPA2100 Email: [email protected] www.lowpowersemi.com Page 8 of 20 Preliminary Datasheet Audio PrecisionCharacteristic For Amplifier Typical Operating LPA2100 06/28/16 16:11:27 PO VS THD 20 10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 100m 200m 500m 1 2 5 10 20 40 W Sweep Audio Trace 1 1 2 1 3 1 Precision 4 1 Color Line Style Thick Data Axis Comment Cyan Green Yellow Red Solid Solid Solid Solid 3 3 3 3 Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Left Left Left Left 6V,4ohm,No NCN 9V,4ohm,No NCN 12V,4ohm,No NCN 06/28/16 16:02:18 15V,4ohm,No NCN 20 10 5 2 1 % 0.5 0.2 0.1 0.05 0.02 0.01 100m 200m 500m 1 2 5 10 20 W LPA2100–00 Sweep Trace Color Line Style Thick Data Axis Comment 1 2 3 4 1 1 1 1 Cyan Green Yellow Red Solid Solid Solid Solid 3 3 3 3 Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Left Left Left Left 6V,8ohm,No NCN 9V,8ohm,No NCN 12V,8ohm,No NCN 15V,8ohm,No NCN Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 9 of 20 Preliminary06/28/16 Datasheet 16:20:29 Audio Precision First degree NCN waveform： LPA2100 20 10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 100m 200m 500m 1 2 5 10 20 40 W Sweep Audio Trace 1 1 2 1 Precision 3 1 4 1 Color Line Style Thick Data Axis Comment Cyan Green Yellow Red Solid Solid Solid Solid 3 3 3 3 Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Left Left Left Left 6V,4ohm,NCN1 9V,4ohm,NCN1 06/28/16 15:56:53 12V,4ohm,NCN1 15V,4ohm,NCN1 10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 100m 200m 500m 1 2 5 10 20 W LPA2100–00 Version 1.0 Sweep Trace Color Line Style Thick Data Axis Comment 1 2 3 4 1 1 1 1 Cyan Green Yellow Red Solid Solid Solid Solid 3 3 3 3 Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Left Left Left Left 6V,8ohm,NCN1 9V,8ohm,NCN1 12V,8ohm,NCN1 15V,8ohm,NCN1 May.-2016 Email: [email protected] www.lowpowersemi.com Page 10 of 20 Preliminary06/28/16 Datasheet 16:31:30 Audio Precision Second degree NCN waveform： 10 T LPA2100 T 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 100m 200m 500m 1 2 5 10 20 40 W Sweep Trace Color Line Style Thick Data Axis 1 2 1 1 4 1 Cyan Green Yellow Red Solid Solid Solid Solid 3 3 3 3 Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Left Left Left Left Audio Precision 3 1 Comment 6V,4ohm,NCN2 9V,4ohm,NCN2 06/28/16 15:47:12 12V,4ohm,NCN2 15V,4ohm,NCN2 10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 100m 200m 500m 1 2 5 10 20 W LPA2100–00 Version 1.0 Sweep Trace Color Line Style Thick Data Axis Comment 1 2 3 4 1 1 1 1 Cyan Green Yellow Red Solid Solid Solid Solid 3 3 3 3 Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Left Left Left Left 6V,8ohm,NCN2 9V,8ohm,NCN2 12V,8ohm,NCN2 15V,8ohm,NCN2 May.-2016 Email: [email protected] www.lowpowersemi.com Page 11 of 20 Preliminary06/25/16 Datasheet 17:45:52 Audio Precision LPA2100 FRQ VS THD 10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 20 50 100 200 500 1k 2k 5k 10k 20k Hz Sweep Trace Color Line Style Thick Data Axis Comment 1 2 1 1 Cyan Green Solid Solid 3 3 Analyzer.THD+N Ratio A Analyzer.THD+N Ratio A Left Left VDD=12V,RL=4ohm,Po=1W VDD=9V,RL=4ohm,Po=1W Audio Precision 06/27/16 11:07:40 Frequency response： +20 d B V +15 +10 +5 +0 20 50 100 200 500 1k 2k 5k 10k 20k Hz Sweep Trace Color Line Style Thick Data Axis 1 1 Cyan Solid 3 Analyzer.Level A Left Comment Output waveform： LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 12 of 20 Preliminary Datasheet LPA2100 Output waveform： LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 13 of 20 Preliminary Datasheet LPA2100 Applications Information(for Amplifier) Gain Sheet.1 The gain of the LPA2100 is set by an external two synchronization NCN function and Master/Slave resistor and multiplied by an internal 10 fold Voltage on CTRL/SLV NCN Master/Slave amplification. CTRL/SLV＜1/6 VDD Disabled Master AV=（Rf1/Rin1）*10=(Rf2/Rin2)*10 1/6 VDD＜CTRL/SLV＜2/6 VDD 2degree Master Gain=20lgAV 2/6 VDD＜CTRL/SLV＜3/6 VDD 1degree Master 3/6 VDD＜CTRL/SLV＜4/6 VDD Disabled Slave 4/6 VDD＜CTRL/SLV＜5/6 VDD 2degree Slave CTRL/SLV＞5/6 VDD 1degree Slave OPN Note： 1degree：Detection delay time: 45ms，release of Rf1 Cin1 Signal Input suppression: 2.6s； VINP OPP Rin1 2degree: Detection delay time: 10ms，release of suppression: 1.2s； Rf2 VINN Cin2 Shutdown operation Rin2 AGC For NCN In order to reduce power consumption while not in The LPA2100 integrates an automatic gain control use, the LPA2100 contains shutdown circuitry to turn technology to achieve NCN(Non-Crack Noise). The off the amplifier's bias circuitry. This shutdown circuit could set different NCN degree by different feature turns the amplifier off when logic low is resistance divider applying to CTRL/SLV to protect applied to the EN pin. By switching the EN pin speaker as showed below.R1+R2 should less than connected to GND, the LPA2100 supply current draw 100K. Also, the voltage on CTRL/SLV set the will be minimized in idle mode. Master/Slave synchronization mode. When circuit set master synchronization mode, chip will output a Power supply decoupling The LPA2100 is a high performance CMOS audio 500KHz frequency pulse signal through SYNC pin. If amplifier that requires adequate power supply circuit used as Slave mode, chip can receive a pulse decoupling to ensure the output THD and PSRR a signal from 300KHz to 700KHz. low as possible. Power supply decoupling affects low The function of NCN(Non-Crack Noise) needs two frequency key processes: Detection of Crack and Suppression achieved by using two capacitors of different types gain. When an overload signal applied to speaker, targeting to different types of noise on the power chip will suppress the gain of circuit through real-time supply leads. For higher frequency transients, spikes, detection output signal in a certain time. The or suppression will be stronger until the output signal equivalent-series-resistance fall to the available range with a stable balance capacitor, typically 1.0μF, works best, placing it as between the signal and suppression. In the same close as possible to the device VDD terminal. For way, the suppression will be weaker when the input filtering lower- frequency noise signals, a large signal amplitude decreases. capacitor of 20μF (ceramic) and a capacitor of LPA2100–00 Version 1.0 May.-2016 digital Email: [email protected] response. hash on Optimum the line, decoupling a (ESR) www.lowpowersemi.com good is low ceramic Page 14 of 20 Preliminary Datasheet LPA2100 220uF(electrolytic) are recommended, placing them power supply terminal for power line. The traces near the audio power amplifier. from amplifier to speakers should design as short as Short Circuit Protection (SCP) we can. The LPA2100 has been tested with a simple The LPA2100 has short circuit protection circuitry on ferrite bead filter for a variety of applications. The the outputs to prevent damage to the device when LPA2100 EVM passes FCC class-B specifications output-to-output or output-to-GND short occurs. under these conditions using twisted speaker wires. When a short circuit is detected on the outputs, the The size and type of ferrite bead can be selected to outputs are disabled immediately. If the short was meet application requirements. Also, the filter removed, the device activates again. capacitor can be increased if necessary with some impact on efficiency. There may be a few circuit Signal Frequency suppress The LPA2100 has an OPP/N pin which is the negative output of amplifier as show below. With R2 and C2, we can suppress high frequency part of signal. And the low frequency part of signal could be attenuated by R1 and C1. Butterworth filter similar to those shown in the figures conducted interference (LCI) regulations. These include systems powered by "wall warts" and "power R3 bricks." In these cases, LC reconstruction filters can be the lowest cost means to pass LCI tests. Common VIN C1 R1 to noise. In these cases a classic second order from the AC line but are also subject to line C2 R2 Cin occur if there are nearby circuits which are sensitive Some systems have little power supply decoupling EQ Rin reconstruction filter. These circumstances might below can be used. 1 f L= 2R2C2 1 fH= ; 2R1C1 instances where it is necessary to add a complete LC mode chokes using low frequency ferrite material Over Temperature Protection can also be effective at preventing line conducted Thermal protection on the LPA2100 prevents the interference. device from damage when the internal die temperature exceeds 150℃. There is a 15 degree tolerance on this trip point from device to device. Once the die temperature exceeds the thermal set point, the device outputs are disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 30℃. This large hysteresis will prevent motor boating sound well and the device begins normal operation at this point without external system intervention. How to reduce EMI A simple solution is to put an additional capacitor at LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 15 of 20 Preliminary Datasheet LPA2100 PCB Layout notices 1, In the path of the power supply, plus a 1uF and a 10uF to ground high-frequency filter capacitor. These caps can be connected to the thermal pad directly for an excellent ground connection. Consider adding a small, good quality low ESR ceramic capacitor may achieve better sound effects. 2, Large (470 µF or greater) bulk power supply decoupling capacitors should be placed near the LPA2100 on the PVCC supplies. Local, high-frequency bypass capacitors should be placed as close to the PVCC pins as possible. 3, The power line, ground line and filter capacitor and bypass capacitors as close to the chip's pins, remember not to put the capacitor on the back of the board, through tiny holes through the jumper even over. Keep the current loop from each of the outputs through the ferrite bead and the small filter cap and back to PGND as small and tight as possible. The size of this current loop determines its effectiveness as an antenna. 4, Power, ground, and a large current line must try to be wide enough, if you want to add vias, the number of through-holes must be at least 6. The thermal pad must be soldered to the PCB for proper thermal performance and optimal reliability. 5, GND and VDD should be put independently, high-power signals to avoid interference. 6, If you want to pursue as large as the effect of power, a large selection of speakers or sound chamber with low resistance (such as 3.6Ω) speakers, or added to improve the supply voltage. 7, Including the line between large current cell and chip, the inductor should be as close and short as possible to chip for a high performance. Adding a coil to this pin would be helpful for EMI certification. If there is a high standards needed in LPA2100 application, we could add a coil and capacitor between chip and speaker constituting a LC filter which coil would be 100MHz, 600Ω and its DCI beyond 4A placing as close as possible to chip, the capacitor should be 1nF connecting the PGND. 8, The position under the amplifier chip on the board must be added vents and large areas of exposed copper and tin to enhance heat dissipation. 9, In case of fixed gain and meeting demand, it should make CIN small as possible as we can because it constitute a high through filter with Rin which cutoff frequency is 1/2*3.414*Cin*Rin. A high capacitance cap could make POP worse. LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 16 of 20 Preliminary Datasheet LPA2100 PCB LAYOUT TSSOP24 TOP VIEW: BOTTOM VIEW: LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 17 of 20 Preliminary Datasheet LPA2100 ESOP16 TOP VIEW: BOTTOM VIEW: LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 18 of 20 Preliminary Datasheet LPA2100 Packaging Information TSSOP-24 LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 19 of 20 Preliminary Datasheet LPA2100 ESOP-16 LPA2100–00 Version 1.0 May.-2016 Email: [email protected] www.lowpowersemi.com Page 20 of 20