Fibre Channel GBaud Optical Link Module Technical Data HGLM-1063 Features • ANSI X3.230-1994 Fibre Channel Standard Compatible (FC-0) • FCSI-301-Rev 1.0 “GBaud Link Module Specification” Compatible • Standard 20 Bit (1063 MBd), TTL Interface • Class I Laser Safety Certified • Single +5.0 V Power Supply Applications • Mass Storage System I/O Channel • Computer System I/O Channel • High Speed Peripheral Interface Description The HGLM-1063 Gigabaud Optical Link Module, provides a complete Fibre Channel FC-0 layer solution. The module meets the requirements of the 100-M5SL-I physical link as defined by the American National Standards Institute (ANSI) X3.230-1994 Fibre Channel standard. The HGLM-1063 is also compatible with the Fibre Channel Systems Initiative (FCSI) document #FCSI-301-Rev 1.0 “Gigabaud 726 Optical Link Module” specification. The HGLM-1063 transmits and receives 8b/10b encoded, parallel, data in the 20 bit wide format defined by the FCSI-301 document. The 20 bit wide data is transmitted at 100MB/sec over a serial fiber link and has the capability to receive data at 100 MB/sec simultaneously. With overhead, this translates to a serial line rate of 1062.5 MBaud transmitting and 1062.5 MBaud receiving. The serial data link uses a 780 nm laser transmitter and photodiode. The optimum fiber is 50/125 µm multimode fiber (62.5/125 µm multimode fiber can be used with degraded performance) and attaches to the HGLM-1063 via a duplex SC connector. As specified in the Fibre Channel Standard, the HGLM-1063 is a Class 1 laser safe device; the transmitted optical signal shuts down in the case of an open fiber condition after a specific time interval. The HGLM-1063 accomplishes this by monitoring the transmitted optical power levels, and the received optical signal. The HGLM-1063 is intended for use in building adapter cards (or equivalent devices) as shown in Figure 1. The HGLM-1063 provides complete FC-0 functionality. The HPFC-5000 provides the FC-1 through FC-4 functions and interfaces directly to the HGLM1063. Finally, a bus gasket is used to connect the HPFC-5000 to the specific system bus in use. This block diagram is meant only to illustrate the basic Fibre Channel functionality. For proper operation, it is necessary to connect the HGLM1063 to another HGLM-1063 (or equivalent) in a full duplex configuration as depicted in Figure 3. This ensures proper operation of the Open Fiber Control circuitry and allows proper link startup and synchronization. 5964-6638E (4/96) BUS GASKET SYSTEM BUS Tx HPFC-5000 TACHYON HGLM-1063 GIGABAUD OPTICAL LINK MODULE FIBER Rx Figure 1. Example System Adapter Card, Block Diagram (Simplified). Functional Description A simplified block diagram of the HGLM-1063 module is shown in Figure 2. This block diagram shows the 5 key elements of the module. These are the Transmitter I.C., the Laser Diode Assembly, the Receiver I.C., the photodiode assembly, and the Open Fiber Control circuit. The high level of integration on the HGLM-1063 is apparent from this block diagram. Pin assignments and signal definitions are given on pages 6 and 7. In general, the HGLM-1063 utilizes a user provided Transmit Byte Clock (TBC) of 53.125 MHz to transmit two 8b/10b encoded data bytes, simultaneously, by creating a serial data stream of 1062.5 MBd and modulating a 780 nm laser diode with it. The 20 bit wide (two encoded bytes) data input is provided to the module through the 80 pin connector in standard TTL format. Similarly, the HGLM-1063 receives 780 nm optical signals at a data rate of 1062.5 MBd, deserializes this data stream to recover the two encoded data bytes and provides this 20 bit wide standard TTL data to the receiving system via the 80 pin connector. The receiver also recovers the byte rate clock for use in clocking the received 20 bit wide parallel data. Link Acquisition and Power Up The following discussion assumes the HGLM-1063 is connected in a full duplex point to point link as shown in Figure 3. When initially applying power to the HGLM1063, the Transmit Byte Clock must start no later than 5 msec after the +5 volt supply reaches the +4 volt level. If this requirement is not met, the Open Fiber Control (OFC) circuit may stick in a nonfunctional state. If this should happen, the OFC can be put into a functional state by holding the Enable Wrap (EWRAP) line high for 10.5 seconds. Once the TBC is running, and the module is properly powered up, the following sequence should be followed to bring the link into full synchronization and ready to transmit data: 1. Both Link Unusable lines will be driven high, by the OFC, indicating neither receiver is detecting a signal from the link. 2. Drive the Transmit Data lines, Tx[00:19] to a 01010101010101010101. 3. Drive the input control lines as follows: • Enable Wrap: low • Tx_SI: low • Enable Comma Detect: high • -Lock to Reference: high 4. Assuming the link is properly connected, and both link ends are in the same state of readiness, the lasers will turn on in 10.1 seconds. This will be indicated by the Link Unusable lines going low. This transition indicates the OFC is operational and in control. 5. Once the lasers have come on, and Link Unusable is observed to transition low, bring -Lock to Reference low for at least 500 µsec. This forces the module to frequency lock to the Transmit Byte Clock. 727 ± SERIAL DATA OUT ± SERIAL DATA IN DATA BYTE 0 Tx[00:09] HDMP-1512 TRANSMITTER I.C. DATA BYTE 1 Tx[10:19] LASER DIODE ASSEMBLY FIBER OUTPUT FAULT EWRAP -LZON FAULT OPEN FIBER CONTROL I.C. Tx_SI TBC L_UNUSE RBC[0:1] HDMP-1514 RECEIVER I.C. PHOTODIODE ASSEMBLY FIBER INPUT LOL A, B DATA BYTE 0 Rx[00:09] DATA BYTE 1 Rx[10:19] COM_DET EN_CDET -LCK_REF Figure 2. HGLM-1063 Functional Block Diagram. CLOCK (RBC[0:1]) CLOCK (TBC) Tx FIBER PATH A Rx ENCODED DATA ENCODED DATA HGLM1 HGLM2 ENCODED DATA ENCODED DATA Rx CLOCK (RBC[0:1]) H HGLM-1063 780 nm GLM Module CDRH21 CFR(J) Compilant Class 1 Laser Product 09 Nov. 1995 San Jose, CA Made in U.S.A. from domestic and foreign components. Tx Figure 4. Typical HGLM-1063 Label. 728 Tx CLOCK (TBC) Figure 3. Full Duplex Point to Point Link. Rx FIBER PATH B 6. After holding -Lock to Reference low for 500 µsec it should then be driven high. This causes the module to phase and frequency lock onto the incoming data stream within 2500 bit times (2.4 µsec). 7. After 2500 bit times, the modules should be in bit synchronization, but not yet byte synchronization. The Receive Byte Clock (RBC0) should be running at 53.125 MHz. 8. Finally, drive the data lines Tx[00:19] with a K28.5 (comma or byte sync) character. Upon detection of this character, the receiver will drive the Comma Detect line high, the clocks will align to the byte boundary, and the receive data lines (Rx[00:19]) will have valid data. The link is now ready for data transmission. TX_SI Operation In normal operation, pin Tx_SI should be held low. In this mode, the data at Tx[00:19] is serialized and driven over the fiber optic link. With pin Tx_SI driven high, however, the data at Tx[00:19] is serialized and driven out the ± Serial Data Out lines and the data applied to the ± Serial Data In lines are driven over the fiber optic link. EWRAP Operation To aid in link diagnostics, the modules have the capability of wrapping the local transmit data electrically back to the local deserializer. This feature is enabled by driving the EWRAP pin high. When enabled, EWRAP causes the laser to turn off within 20 µsec. The OFC circuit goes into its low duty cycle “on-off-on” handshake mode. The link will need to be stepped through the synchronization procedure outlined above to return to normal operation after EWRAP is brought low. Enable Comma Detect In the synchronization procedure above, the Enable Comma Detect (EN_CDET) signal is driven high to allow the receiver to reset and align its boundaries properly when a K28.5 character is transmitted. This line can be kept in a high state and the receiver will reset on every K28.5 character it detects. This feature can be disabled, after initial synchronization, by driving Enable Comma Detect to a low state. Open Fiber Control The purpose of the Open Fiber Control (OFC) integrated circuit is to ensure user safety. This circuit uses the dual loss of light signals from the receiver I.C. and the laser Fault detection signal from the transmitter I.C. to determine if the laser and the fiber link are properly connected and functioning normally. Should a Fault condition be determined, all laser transmission is shut down. A safety interlock is provided by the HGLM-1063 module. HGLM1063 modules (or equivalent) must be connected in full pointto-point configuration as shown in Figure 3 for proper operation. The Open Fiber Control System (OFCS) of the HGLM-1063 deactivates the laser signal whenever there is an interruption or loss of signal of either laser drive circuit. nected at either the transmitting port of HGLM1 or the receiving port of HGLM2, the OFCS detects the loss of signal. The Link Unusable line of HGLM2 goes high, signaling the system of an open fiber condition. The OFCS then shuts down the laser of HGLM2. HGLM1 in turn detects this loss of signal, raises its Link Unusable line, and shuts down its laser. The OFC pulses the laser of HGLM2 at a very low duty cycle. Simultaneously, the OFCS of HGLM1 detects the low duty cycle operation of HGLM2 and places its laser in the same low duty cycle pulsing mode. It takes less than 2 msec to shut down all laser transmission and results in a safe (Class I) laser emission level in Path A, the open path. While Path A is still open, HGLM1 launches a pulse synchronously with the pulse it receives on Path B from HGLM2. However, HGLM2 receives no pulse (because Path A is open) and continues in an inactive mode. HGLM2 will continue launching “inquiry” pulses once approximately every 10.1 seconds along Path B. After Path A is restored, HGLM2 will receive pulses along Path A, synchronous with its transmit pulses along Path B. A completed link of Path A and Path B is verified by both HGLM1 and HGLM2. HGLM2 will verify its link by deactivating its laser and confirm that its receive signal disappears. HGLM1 also performs the same verification check, deactivating its laser. Once both HGLM modules have For example, in Figure 3, if Path A is opened through a cut or other physical damage to the fiber, or if the fiber is discon729 deactivated their lasers, HGLM2 then activates its laser, sends a signal to HGLM1 (which activates its laser), which in turn sends a confirming signal back to HGLM2. This on-off-on handshake confirms that the first synchronous pulse came from another HGLM-1063, or equivalent module, with an OFC safety system. Once this sequence is complete, the link between HGLM1 and HGLM2 returns to normal operation, with both in the active mode. The onoff-on timing is compatible with the timing requirements of the ANSI FC-PH specification for Open Fibre Control timing of 100-M5-SL-I links. These timings are defined as Decode 1, 2, and 3 and are given in the Timing Specifications table later in this document. product per 21 CFR (U.S. Code of Federal Regulations), Subchapter J. A Class 1 laser product is safe for use and does not pose a biological hazard if used in accordance within the data sheet limits and instructions. CAUTION: There are no user serviceable parts nor any maintenance required for the HGLM-1063. All adjustments are made at the factory before shipment to our customers. Tampering with, modifying or breaking the preset trim pot seals will result in voided product warranty. It may also result in improper operation of the HGLM-1063 circuitry, and possible overstress of the laser source. Device degradation or product failure may result. Connection of the HGLM-1063 to a non-approved optical source, operating above the recommended absolute maximum conditions (especially power supply) or operating the HGLM-1063 in a manner inconsistent with its design and function may result in hazardous radiation exposure and may be considered an act of modifying or manufacturing a laser product. The person(s) performing such an act is required by law to recertify and reidentify the laser product under the provisions of 21 CFR(Subchapter J). Labeling Each HGLM-1063 module is labeled per 21 CFR (Subchapter J), including the actual date of manufacture (Figure 4). Laser Safety Compliance The HGLM-1063 is designed and certified as a Class 1 laser 11.0 11.5 (0.433) (0.453) 3.5 (0.138) 5.0 (2X) (0.197) 30.8 (1.213) 1.25 (0.049) 37.8 (1.488) 28.35 (1.116) 74.27 (2.924) 27.0 (1.063) 63.53 (2.501) φ 2.5 PIN (0.098) 4.8 (0.189) RECEIVER 35.25 (1.388) 2.0 (0.079) 25.4 (1.000) 24.13 (0.950) TRANSMITTER BOTTOM VIEW DIMENSIONS IN MILLIMETERS (INCHES). Figure 5. HGLM-1063 Outline Drawing. 730 2.5 mm DIAMOND PIN φ 2.0 (2X) (0.079) 28.0 (1.102) 30.0 (1.181) 4.8 MAX. , ,, , , , A SOCKET A01 ACCOMODATES A PIN SPEC'D φ 0.46 ± 0.05 φ 0.2 M A B M C M R1.6 TYP. 36.4 MIN. 4.8 1.6 ± 0.25 C φ 2.65 ± 0.08 φ 0.13 M A B M 30.2 MAX. D NO ELECTRICAL TRACE PLACEMENT AXIS 28.85 MIN. 24.13 36.8 PITCH 30 24.5 MIN. 32 ± 0.2 φ 0.1 M A D 2.94 (2X)3.35 MIN. 7.5 MIN. OPTICAL AXIS (2X)2.6 MIN. SOCKET A20 ACCOMODATES A PIN SPEC'D φ 0.46 ± 0.05 37.2 MAX. 43.4 MIN. φ 0.2 M A B M C M B φ 2.65 ± 0.08 63.53 (2X)64.27 MIN. Figure 6. Host PCB Layout for Mounting the HGLM-1063. HGLM-1063 Pin Assignments Pin A01 A02 A03 A04 A05 A06 A07 A08 A09 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 Name +SO gnd VCC TX[12] TX[14] TX[16] TX[18] gnd STROB_ID VCC PAR_ID[1] RBC[0] VCC gnd RX[12] RX[14] RX[16] RX[18] VCC EN_CDET Pin B01 B02 B03 B04 B05 B06 B07 B08 B09 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 Name -SO gnd TX[10] TX[11] TX[13] TX[15] TX[17] TX[19] gnd L_UNUSE rsv EWRAP gnd RX[10] RX[11] RX[13] RX[15] RX[17] RX[19] gnd Pin C01 C02 C03 C04 C05 C06 C07 C08 C09 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 Name gnd gnd TX[00] TX[02] TX[04] TX[06] TX[08] TX[09] gnd FAULT TX_SI COM_DET rsv RX[00] RX[02] RX[04] RX[06] RX[08] RX[09] gnd Pin D01 D02 D03 D04 D05 D06 D07 D08 D09 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 Name +SI -SI VCC TX[01] TX[03] TX[05] TX[07] gnd VCC TBC PAR_ID[0] VCC RBC[1] gnd RX[01] RX[03] RX[05] RX[07] VCC -LCK_REF 731 HGLM-1063 Signal Definitions Symbol TX[00:19] Signal Name Transmit Data I/O Input TBC Transmit Byte Clock Input EWRAP Enable Wrap/Enable STROP_ID Input -LCKREF TX_SI EN_CDET Lock to Reference Transmit SI Enable Comma Detect/STROB_ID clock Input Input Input ± SI Serial Data In Input RX[00:19] Receive Data Output RBC[0] RBC[1] COM_DET L_UNUSE FAULT Receive Byte Clock 0 Receive Byte Clock 1 Comma Detect Link Unusable Fault Output Output Output Output Output ± SO Serial Data Out Output PAR_ID Parallel ID STROB_ID Strobed ID rsv Output Output Reserved Logic Level Description TTL The 20-bit parallel transmit data to be serialized and sent to the transmitter. TTL Used to operate the state machines, derive the 20X serial clocks, and latch TX[00:19]. TTL Causes the serialized transmit data to electrically wrap back to the deserializer and disables the laser output. TTL Causes the PLL to lock to TBC. TTL Selects the serial data mode. TTL Enables the comma detection circuitry to establish byte synchronization on the next comma that is received. PECL A pair of differential signals for transmission of serial data. TTL The 20 bit decoded received data from the receiver. TTL Used by the system to latch RX[00:19]. TTL Not normally used. TTL Indicates byte synchronization has occurred. TTL Indicates the link is currently not usable. TTL Indicates an electrical fault has been detected and turns the laser output off. PECL A pair of high speed differential signals representing the serialized data. TTL A 2 bit identification of the link rate. TTL Optional output used to access the serial Strobed ID information. Not active. Reserved for future use. Absolute Maximum Ratings TC = 25°C, except as specified. Operation in excess of any one of these conditions may result in permanent damage to this device. Symbol VCC VIN,TTL IO,TTL Tstg TOP RHop RHst 732 Parameter Supply Voltage TTL Data Input Voltage TTL Output Source Current Storage Temperature Ambient Operating Temperature Relative Humidity Operating Relative Humidity Storage Units V V mA °C °C % % Min. -0.5 -0.7 -40 0 8 5 Max. 6.0 VCC + 0.7 13 +75 +60 80 95 Transmit Byte Clock Requirements TA = 10°C to +50°C, VCC = 4.5 V to 5.5 V Symbol Parameter f Nominal Frequency Ftol Frequency Tolerance (for Fibre Channel Compliance) Symm Symmetry (Duty Cycle) Jpe Positive Edge Jitter tr Rise Time, 20% to 80% tf Fall Time, 20% to 80% Unit MHz ppm % ns nsec nsec Min. 53.119 -100 40 Typ. 53.125 Max. 53.131 +100 60 0.5 4 4 DC Electrical Specifications TA = 10°C to +50°C, VCC = 4.5 V to 5.5 V Symbol Parameter VIH,TTL TTL Input High Voltage Level, Guaranteed High Signal for All Inputs, IIH = 100 µA VIL,TTL TTL Input Low Voltage Level, Guaranteed Low Signal for All Inputs, IIL = -1 mA VOH,TTL TTL Output High Voltage Level, IOH = 1 mA VOL,TTL TTL Output Low Voltage Level, IOL = -1 mA ICC VCC Supply Current VCC,noise Peak to Peak Noise and Ripple Allowed on the VCC Input Unit Min. Typ. Max. V 2 5 V V V mA mV 0 2.4 0 0.8 5 0.6 1200 100 AC Electrical Specifications TA = 10°C to +50°C, VCC = 4.5 V to 5.5 V Symbol Parameter tr,TTLin Input TTL Rise Time, 20% to 80% tf,TTLin Input TTL Fall Time, 20% to 80% tr,TTLout Output TTL Rise Time, 20% to 80%, 15 pF Load tf,TTLout Output TTL Fall Time, 20% to 80%, 15 pF Load tr,RBC Receive Byte Clock Rise Time, 0.8 V to 2.0 V, 15 pF Load tf,RBC Receive Byte Clock Fall Time, 2.0 V to 0.8 V, 15 pF Load tr, BLL BLL Rise Time, AC Coupled, 25 Ω Source and Load, 20% to 80% tf,BLL BLL Fall Time, AC Coupled, 25 Ω Source and Load, 20% to 80% VSWRi,H50 H50 Input VSWR, AC Coupled, 50 Ω Source and Load VSWRo,BLL BLL Output VSWR, AC Coupled, 50 Ω Source and Load VIP,H50 Input Peak-To-Peak Differential Voltage, AC Coupled, 50 Ω Load VOP,BLL BLL Output Peak-To-Peak Differential Voltage, AC Coupled, 50 Ω Load Units nsec nsec nsec nsec nsec nsec psec psec mV mV Min. Typ. Max. 2 2 2 4 2 4 1.5 3.0 1.5 2.4 150 350 150 350 2.0 2.0 50 1200 2000 1200 1400 2000 733 Timing Specifications TA = 10°C to +50°C, VCC = 4.5 V to 5.5 V Symbol Parameter tDcd_1 Decode 1 Time tDcd_2 Decode 2 Time tDcd_3 Decode 3 Time Units µsec µsec µsec Min. Typ. Max. 154 617 154 Transmitter ts th Transmit Data Setup Time Transmit Data Hold Time nsec nsec 2.0 3.3 Receive Data Setup Time Receive Data Hold Time nsec nsec 2.5 6.0 Receiver ts th Optical Specifications TA = 10°C to +50°C, VCC = 4.5 V to 5.5 V Symbol Parameter fop Serial Baud Rate OPB Optical Power Budget Optical Extinction Ratio PT Transmitter Launched Optical Power, Average PRx Receiver Input Power, Average, BER = 10-12 RL Receiver Return Loss λ Receiver Operating Wavelength λC Transmitter Spectral Center Wavelength ∆λ Transmitter Spectral Width, RMS RIN12 Transmitter Relative Intensity Noise DJ Transmitter Deterministic Jitter, peak-peak Transmitter Eye Opening, peak-peak, BER = 1E-12 734 Units Mbaud dB dB dBm dBm dB nm nm nm dB/Hz % % Min. 1062.38 6 6 -5.0 -13.0 12 770 770 57 Typ. Max. 1062.5 1062.62 8 -2.5 1.3 1.3 780 790 850 795 4 -116 20 TBC , ,, , , , ,,,, , , , , ,,, ts Tx[00:19] DATA DATA th DATA DATA DATA Figure 7. Transmit Byte Clock and Data Timing Relationships. COM_DET Rx[00:19] K28.5 ts DATA th ts DATA th RBC0 18.8 ns Figure 8. Receive Timing Relationships. 735