Rohm BR25G512FVTGE2 Serial eeprom series standard eeprom Datasheet

Datasheet
Serial EEPROM Series Standard EEPROM
SPI BUS EEPROM
BR25G512-3
General Description
BR25G512-3 is a 512Kbit serial EEPROM of SPI BUS interface.
Packages W(Typ) x D(Typ) x H(Max)
Features
High Speed Clock Action up to 10MHz (Max)
Wait Function by HOLDB Terminal
Part or Whole of Memory Arrays Settable as
Read only Memory Area by Program
 1.8V to 5.5V Single Power Source Operation Most
Suitable for Battery Use.
 UP to 128Byte in Page Write Mode.
 For SPI bus interface (CPOL, CPHA) = (0, 0), (1, 1)
 Self-timed Programming Cycle
 Low Current Consumption
 At Write Action (5V) : 0.7mA (Typ)
 At Read Action (5V) : 2.4mA (Typ)
 At Standby Action (5V) : 0.1µA (Typ)
 Address Auto Increment Function at Read Action
 Prevention of Write Mistake
 Write Prohibition at Power On
 Write Prohibition by Command Code (WRDI)
 Write Prohibition by WPB Pin
 Write Prohibition Block Setting by Status Registers
(BP1, BP0)
 Prevention of Write Mistake at Low Voltage
 More than 100 years Data Retention.
 More than 1 Million Write Cycles.
 Bit Format 64K×8
 Initial Delivery Data
Memory Array: FFh
Status Register: WPEN, BP1, BP0 : 0



○Product structure：Silicon monolithic integrated circuit
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SOP8
5.00mm x 6.20mm x 1.71mm
SOP- J8
4.90mm x 6.00mm x 1.65mm
TSSOP-B8
3.00mm x 6.40mm x 1.20mm
Figure 1.
○This product is not designed protection against radioactive rays
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Datasheet
BR25G512-3
Absolute Maximum Ratings (Ta=25°C)
Parameter
Supply Voltage
Symbol
VCC
Power Dissipation
Pd
Storage Temperature
Operating Temperature
Input Voltage /
Output Voltage
Junction temperature
Electrostatic discharge
voltage
(human body model)
Unit
V
Tstg
Topr
Ratings
-0.3 to +6.5
0.45 (SOP8)
0.45 (SOP-J8)
0.33 (TSSOP-B8)
- 65 to +150
- 40 to +85
‐
- 0.3 to Vcc+1.0
V
Tjmax
150
°C
VESD
-4000 to +4000
V
Remarks
When using at Ta=25°C or higher 4.5mW to be reduced per 1°C.
W
When using at Ta=25°C or higher 4.5mW to be reduced per 1°C.
When using at Ta=25°C or higher 3.3mW to be reduced per 1°C.
°C
°C
The Max value of Terminal Voltage is not over 6.5V.
When the pulse width is 50ns or less, the Min value of Terminal
Voltage is not under -1.0V.
Junction temperature at the storage condition
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Memory Cell Characteristics (Ta=25°C, Vcc=1.8V to 5.5V)
Parameter
Min
1,000,000
100
(Note1)
Write Cycles
Data Retention (Note1)
Limits
Typ
-
Max
-
Unit
Times
Years
(Note1) Not 100% TESTED
Recommended Operating Ratings
Parameter
Power Source Voltage
Input Voltage
Symbol
Vcc
VIN
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Ratings
1.8 to 5.5
0 to Vcc
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Unit
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Datasheet
BR25G512-3
Electrical Characteristics (Unless otherwise specified, Ta=-40°C to +85°C, Vcc=1.8V to 5.5V)
Parameter
Input High Voltage1
Input Low Voltage1
Output Low Voltage1
Output Low Voltage2
Output High Voltage1
Output High Voltage2
Input Leakage Current
Output Leakage Current
VIH1
VIL1
VOL1
VOL2
VOH1
VOH2
ILI
ILO
Min
0.7 x Vcc
-0.3 (Note1)
0
0
Vcc-0.2
Vcc-0.2
-1
-1
Limits
Typ
－
－
－
－
－
－
－
－
Max
Vcc+1.0
0.3 x Vcc
0.4
0.2
Vcc
Vcc
1
1
ICC1
－
－
ICC2
－
ICC3
Symbol
Unit
V
V
V
V
V
V
µA
µA
1.8≤Vcc≤5.5V
1.8≤Vcc≤5.5V
IOL=3.0mA, 2.5≤Vcc≤5.5V
IOL=1.0mA, 1.8≤Vcc<2.5V
IOH=-2.0mA, 2.5V≤Vcc≤5.5V
IOH=-400µA, 1.8≤Vcc<2.5V
VIN=0 to Vcc
VOUT=0 to Vcc, CSB=Vcc
1.5
mA
Vcc=2.5V, fSCK=5MHz, tE/W=5ms
Byte Write, Page Write, Write Status Register
－
2
mA
－
－
0.7
mA
ICC4
－
－
1
mA
ICC5
－
－
3
mA
ICC6
－
－
4
mA
ISB
－
－
1
µA
Supply Current (Write)
Supply Current (Read)
Standby Current
Conditions
Vcc=5.5V, fSCK=10MHz, tE/W=5ms
Byte Write, Page Write, Write Status Register
Vcc=1.8V, fSCK=3MHz, SO=OPEN
Read, Read Status Register
VIH/VIL=0.9Vcc/0.1Vcc
Vcc=2.5V, fSCK=5MHz, SO=OPEN
Read, Read Status Register
VIH/VIL=0.9Vcc/0.1Vcc
Vcc=5.5V, fSCK=5MHz, SO=OPEN
Read, Read Status Register
VIH/VIL=0.9Vcc/0.1Vcc
Vcc=5.5V, fSCK=10MHz, SO=OPEN
Read, Read Status Register
VIH/VIL=0.9Vcc/0.1Vcc
Vcc=5.5V, SO=OPEN
CSB=HOLDB=WPB=Vcc, SCK=SI=Vcc or GND
(Note1) When the pulse width is 50ns or less, it is -1.0V.
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BR25G512-3
Operating Timing Characteristics (Ta=-40°C to +85°C, unless otherwise specified, load capacity CL=30pF)
Parameter
Symbol
SCK Frequency
SCK High Time
SCK Low Time
CSB High Time
CSB Setup Time
CSB Hold Time
SCK Setup Time
SCK Hold Time
SI Setup Time
SI Hold Time
Data Output Delay Time
Output Hold Time
Output Disable Time
HOLDB Setting Setup Time
HOLDB Setting Hold Time
HOLDB Release Setup Time
HOLDB Release Hold Time
Time from HOLDB to Output High-Z
Time from HOLDB to Output change
SCK Rise Time (Note1)
SCK Fall Time (Note1)
OUTPUT Rise Time (Note1)
OUTPUT Fall Time (Note1)
Write Time
fSCK
tSCKWH
tSCKWL
tCS
tCSS
tCSH
tSCKS
tSCKH
tDIS
tDIH
tPD
tOH
tOZ
tHFS
tHFH
tHRS
tHRH
tHOZ
tHPD
tRC
tFC
tRO
tFO
tE/W
1.8≤Vcc<2.5V 2.5≤Vcc<4.5V 4.5≤Vcc≤5.5V Unit
Min Typ Max Min Typ Max Min Typ Max
0.01 3 0.01 5 0.01 10 MHz
125
80
40
ns
125 80
40
ns
90
40
20
ns
60
30
15
ns
60
30
15
ns
50
20
15
ns
50
20
15
ns
20
10
5
ns
20
10
5
ns
125
70
40
ns
0
0
0
ns
80
40
25
ns
0
0
0
ns
20
20
10
ns
0
0
0
ns
20
20
10
ns
80
40
25
ns
80
40
20
ns
2
2
2
µs
2
2
2
µs
40
40
20
ns
40
40
20
ns
5
5
5
ms
(Note1) NOT 100% TESTED
AC Timing Characteristics Conditions
Parameter
Symbol
Load Capacity
Input Voltage
Input / Output Judgment Voltage
CL
-
Min
-
Limits
Typ
Max
30
0.2Vcc/0.8Vcc
0.3Vcc/0.7Vcc
Unit
pF
V
V
Input / Output Capacity (Ta=25°C, frequency=5MHz)
Parameter
Input Capacity (Note1)
Output Capacity (Note1)
(Note1)
Symbol
CIN
COUT
Min
－
－
Max
8
8
Unit
Conditions
VIN=GND
VOUT=GND
pF
Not 100% TESTED.
Serial Input / Output Timing
tCS
tCSS
tCS
CSB
tSCKS
tSCKWL
tRC
tSCKWH
tCSH tSCKH
CSB
tFC
SCK
SCK
tDIS tDIH
SI
SI
SO
High-Z
SO
Figure 2-(a). Input timing
tOH
tRO,tFO
tOZ
High-Z
Figure 2-(b). Input / Output timing
SI is taken into IC inside in sync with data rise edge of
SCK. Input address and data from the most significant bit
MSB
CSB
tPD
SO is output in sync with data fall edge of SCK. Data is
output from the most significant bit MSB.
"H"
"L"
tHFS
tHFH
tHRS tHRH
SCK
tDIS
SI
n
n+1
tHOZ
SO
Dn+1
Dn
High-Z
n-1
tHPD
Dn
Dn-1
HOLDB
Figure 2-(c). HOLD timing
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Datasheet
BR25G512-3
Block Diagram
CSB
1
8 Vcc
VOLTAGE
INSTRUCTION DECODE
DETECTION
CONTROL CLOCK
GENERATION
SO
2
WRITE
HIGH VOLTAGE
INHIBITION
GENERATOR
7 HOLDB
INSTRUCTION
REGISTER
WPB
3
STATUS REGISTER
ADDRESS
ADDRESS
16bit
REGISTER
6 SCK
16bit
DECODER
512K
EEPROM
DATA
GND
8bit
REGISTER
4
READ/WRITE
AMP
8bit
5 SI
Figure 3. Block Diagram
Pin Configuration
(TOP VIEW)
Vcc
CSB
HOLDB SCK
SO
WPB
SI
GND
Figure 4. Pin Configuration
Pin Descriptions
Terminal
name
Input
/Output
Vcc
-
Power source to be connected
GND
-
All input / output reference voltage, 0V
CSB
Input
Function
Chip select input
SCK
Input
Serial clock input
SI
Input
Ope code, address, and serial data input
SO
Output
HOLDB
Input
Hold input
Command communications may be suspended
temporarily (HOLD status)
WPB
Input
Write protect input
Write status register command is prohibited
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Serial data output
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Datasheet
BR25G512-3
Typical Performance Curves
(The following characteristic data are Typ Values.)
6
6
5
5
Ta=-40°C
Ta= 25°C
Ta= 85°C
Ta=-40°C
Ta= 25°C
Ta= 85°C
4
VIL1 [V]
VIH1 [V]
4
3
SPEC
2
3
2
1
1
0
SPEC
0
0
1
2
3
4
5
6
0
1
2
4
5
6
Vcc [V]
Vcc [V]
Figure 5. Input High Voltage1 vs Supply Voltage
(CSB,SCK,SI,HOLDB,WPB)
Figure 6. Input Low Voltage1 vs Supply Voltage
(CSB,SCK,SI,HOLDB,WPB)
1
1
0.8
0.8
Ta=-40°C
Ta= 25°C
Ta= 85°C
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.6
VOL2 [V]
0.6
VOL1 [V]
3
SPEC
0.4
0.2
0.4
SPEC
0.2
0
0
0
1
2
3
4
5
6
0
IOL [mA]
2
3
4
5
6
IOL [mA]
Figure 8. Output Low Voltage2 vs Output Current
(Vcc=1.8V)
Figure 7. Output Low Voltage1 vs Output Current
(Vcc=2.5V)
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BR25G512-3
2.6
1.9
2.5
1.8
VOH2 [V]
VOH1 [V]
Typical Performance Curves‐Continued
2.4
SPEC
SPEC
2.3
1.7
1.6
Ta=-40°C
Ta= 25°C
Ta= 85°C
Ta=-40°C
Ta= 25°C
Ta= 85°C
2.2
1.5
0
0.5
1
1.5
2
2.5
0
IOH [mA]
Figure 9. Output High Voltage1 vs Output Current
(Vcc=2.5V)
0.4
0.6
0.8
1
1.2
IOH [mA]
Figure 10. Output High Voltage2 vs Output Current
(Vcc=1.8V)
1.2
1.2
SPEC
1
0.8
0.8
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.6
0.4
0.2
0.2
0
0
1
2
3
4
5
0
6
Vcc [V]
Figure 11. Input Leakage Current vs Supply Voltage
(CSB,SCK,SI,HOLDB,WPB)
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Ta=-40°C
Ta= 25°C
Ta= 85°C
0.6
0.4
0
SPEC
1
ILO [uA]
ILI [uA]
0.2
1
2
3
4
5
6
Vcc [V]
Figure 12. Output Leakage Current vs Supply Voltage
(SO)
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BR25G512-3
Typical Performance Curves‐Continued
4
4
Ta=-40°C
Ta= 25°C
Ta= 85°C
Ta=-40°C
Ta= 25°C
Ta= 85°C
3
ICC2 [mA]
ICC1 [mA]
3
2
SPEC
1
SPEC
2
1
0
0
0
1
2
3
4
5
6
Vcc [V]
0
1
2
3
4
5
Vcc [V]
Figure 14. Supply Current (Write) vs Supply Voltage
(fSCK=10MHz)
Figure 13. Supply Current (Write) vs Supply Voltage
(fSCK=5MHz)
0.8
SPEC
ICC3 [mA]
0.6
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.4
0.2
0
0
1
2
3
4
5
6
Vcc [V]
Figure 15. Supply Current (Read) vs Supply Voltage
(fSCK=3MHz)
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Datasheet
BR25G512-3
Typical Performance Curves‐Continued
4
5
Ta=-40°C
Ta= 25°C
Ta= 85°C
SPEC
4
SPEC
Ta=-40°C
Ta= 25°C
Ta= 85°C
ICC6 [mA]
ICC4,5 [mA]
3
2
3
2
SPEC
1
1
0
0
0
1
2
3
4
5
0
6
1
2
3
4
5
6
Vcc [V]
Vcc [V]
Figure 16. Supply Current (Read) vs Supply Voltage
(fSCK=5MHz)
Figure 17. Supply Current (Read) vs Supply Voltage
(fSCK=10MHz)
100
2.5
2
SPEC
10
1.5
SPEC
fSCK [MHz]
ISB [uA]
Ta=-40°C
Ta= 25°C
Ta= 85°C
SPEC
1
SPEC
1
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.5
0.1
0
0
1
2
3
4
5
0
6
2
3
4
5
6
Vcc [V]
Vcc [V]
Figure 19. SCK Frequency vs Supply Voltage
Figure 18. Standby Current vs Supply Voltage
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BR25G512-3
Typical Performance Curves‐Continued
140
140
SPEC
SPEC
120
120
Ta=-40°C
Ta= 25°C
Ta= 85°C
100
Ta=-40°C
Ta= 25°C
Ta= 85°C
100
SPEC
tSCKWL [ns]
tSCKWH [ns]
SPEC
80
60
SPEC
40
80
60
20
20
0
0
0
1
2
3
4
SPEC
40
5
6
0
Vcc [V]
Figure 20. SCK High Time vs Supply Voltage
1
2
3
4
5
6
Vcc [V]
Figure 21. SCK Low Time vs Supply Voltage
100
80
SPEC
Ta=-40°C
Ta= 25°C
Ta= 85°C
80
SPEC
60
Ta=-40°C
Ta= 25°C
Ta= 85°C
tCSS [ns]
tCS [ns]
60
SPEC
40
SPEC
20
SPEC
20
40
0
SPEC
0
0
1
2
3
4
5
6
Vcc [V]
Figure 22. CSB High Time vs Supply Voltage
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0
1
2
3
4
5
Vcc [V]
Figure 23. CSB Setup Time vs Supply Voltage
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Datasheet
BR25G512-3
Typical Performance Curves‐Continued
30
80
tCSH [ns]
Ta=-40°C
Ta= 25°C
Ta= 85°C
SPEC
20
tDIS [ns]
SPEC
60
40
SPEC
20
Ta=-40°C
Ta= 25°C
Ta= 85°C
SPEC
10
SPEC
0
SPEC
-10
0
0
1
2
3
4
5
0
6
1
2
4
5
6
Vcc [V]
Figure 25. SI Setup Time vs Supply Voltage
Vcc [V]
Figure 24. CSB Hold Time vs Supply Voltage
25
140
SPEC
20
SPEC
Ta=-40°C
Ta= 25°C
Ta= 85°C
120
Ta=-40°C
Ta= 25°C
Ta= 85°C
100
15
80
tPD [ns]
tDIH [ns]
3
SPEC
10
60
SPEC
40
SPEC
5
SPEC
20
0
0
0
1
2
3
4
5
6
Vcc [V]
Figure 26. SI Hold Time vs Supply Voltage
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0
1
2
3
4
5
6
Vcc [V]
Figure 27. Data Output Delay Time vs Supply Voltage
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BR25G512-3
Typical Performance Curves‐Continued
25
100
SPEC
80
Ta=-40°C
Ta= 25°C
Ta= 85°C
SPEC
20
15
tHFH [ns]
60
tOZ [ns]
Ta=-40°C
Ta= 25°C
Ta= 85°C
SPEC
40
SPEC
10
SPEC
20
5
0
0
0
1
2
3
4
5
0
6
1
2
4
5
6
Vcc [V]
Vcc [V]
Figure 28. Output Disable Time vs Supply Voltage
Figure 29. HOLDB Setting Hold Time vs Supply Voltage
100
25
SPEC
20
Ta=-40°C
Ta= 25°C
Ta= 85°C
SPEC
80
Ta=-40°C
Ta= 25°C
Ta= 85°C
60
tHOZ [ns]
15
tHRH [ns]
3
SPEC
10
SPEC
40
SPEC
5
20
0
0
0
1
2
3
4
5
0
6
2
3
4
5
6
Vcc [V]
Figure 31. Time from HOLDB to Output High-Z
vs Supply Voltage
Vcc [V]
Figure 30. HOLDB Release Hold Time vs Supply Voltage
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BR25G512-3
Typical Performance Curves‐Continued
100
50
SPEC
80
Ta=-40°C
Ta= 25°C
Ta= 85°C
SPEC
40
30
tRO [ns]
tHPD [ns]
60
Ta=-40°C
Ta= 25°C
Ta= 85°C
SPEC
40
SPEC
20
SPEC
20
10
0
0
0
1
2
3
4
5
6
0
1
2
Vcc [V]
3
4
5
6
Vcc [V]
Figure 32. Time from HOLDB to Output change
vs Supply Voltage
Figure 33. OUTPUT Rise Time vs Supply Voltage
6
50
40
SPEC
5
SPEC
Ta=-40°C
Ta= 25°C
Ta= 85°C
4
tE/W [ms]
tFO [ns]
30
SPEC
20
3
2
10
Ta=-40°C
Ta= 25°C
Ta= 85°C
1
0
0
0
1
2
3
4
5
0
6
2
3
4
5
6
Vcc [V]
Vcc [V]
Figure 34. OUTPUT Fall Time vs Supply Voltage
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Figure 35. Write Cycle Time vs Supply Voltage
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Datasheet
BR25G512-3
Features
1. Status Registers
This IC has status register. The status register expresses the following parameters of 8 bits.
BP0 and BP1 can be set by write status register command. These 2 bits are memorized into the EEPROM, therefore are
valid even when power source is turned off.
Rewrite characteristics and data hold time are same as characteristics of the EEPROM.
WEN can be set by write enable command and write disable command. WEN becomes write disable status when power
source is turned off. R/B is for write confirmation, therefore cannot be set externally.
The value of status register can be read by read status register command.
(1) Contexture of Status Register
bit 7
bit 6
bit 5
WPEN
0
0
bit
Memory
location
WPEN
EEPROM
BP1
BP0
EEPROM
WEN
registers
―
R/B
bit 4
bit 3
bit 2
bit 1
bit 0
0
BP1
BP0
WEN
R/B
―
Function
WPB pin enable / disable designation bit
WPEN=0=invalid
WPEN=1=valid
EEPROM write disable block designation bit
Write and write status register write enable / disable status confirmation bit
WEN=0=prohibited
WEN=1=permitted
Write cycle status (READY / BUSY) status confirmation bit
―
R/B=0=READY
registers
―
R/B=1=BUSY
(2) Write Disable Block Setting
BP1
BP0
Write disable block
0
0
None
0
1
C000h-FFFFh
1
0
8000h-FFFFh
1
1
0000h-FFFFh
2. WPB Pin
By setting WPB=LOW, write command is prohibited. And the write command to be disabled at this moment is WRSR.
However, when write cycle is in execution, no interruption can be made.
WRSR
WRITE
Prohibition possible
but WPEN bit “1”
Prohibition
impossible
3. HOLDB Pin
By HOLDB pin, data transfer can be interrupted. When SCK=”0”, by making HOLDB from “1” into”0”, data transfer to
EEPROM is interrupted. When SCK = “0”, by making HOLDB from “0” into “1”, data transfer is restarted.
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BR25G512-3
Command Mode
Command
Contents
WREN
WRDI
READ
WRITE
RDSR
WRSR
Ope code
Write Enable Command
Write Disable Command
Read Command
Write Command
Read Status Register Command
Write Status Register Command
0000
0000
0000
0000
0000
0000
0110
0100
0011
0010
0101
0001
Timing Chart
1. Write Enable (WREN) / Disable (WRDI) Command
WRDI (WRITE DISABLE): Write disable
WREN (WRITE ENABLE): Write enable
CSB
CSB
SCK
0
SI
SO
1
0
2
0
3
0
4
0
5
0
1
6
7
1
SCK
0
1
2
3
4
5
7
6
0
SI
0
0
0
0
0
1
0
0
High-Z
High-Z
SO
Figure 37. Write disable command
Figure 36. Write enable command
This IC has write enable status and write disable status. It is set to write enable status by write enable command, and it is
set to write disable status by write disable command. As for these commands, set CSB LOW, and then input the
respective ope codes. The respective commands are accepted at the 7-th clock rise. Even with input over 7 clocks,
command becomes valid.
When to carry out write command, it is necessary to set write enable status by the write enable command. If write
command is input in the write disable status, the command is cancelled. And even in the write enable status, once write
command is executed, it gets in the write disable status. After power on, this IC is in write disable status.
2. Read Command (READ)
～
～
～
～
CSB
～
～
0
1
2
3
4
5
6
7
8
9
10
11
23
～
～
SCK
24
30
31
～
～
0
0
0
0
0
1
1
A15 A14 A13 A12
A1
A0
～
～
0
～
～
SI
～
～
High-Z
D7
D6
～
～
～
～
SO
D2
D1
D0
Figure 38. Read command
By read command, data of EEPROM can be read. As for this command, set CSB LOW, then input address after read ope
code. EEPROM starts data output of the designated address. Data output is started from SCK fall of 23-th clock, and
from D7 to D0 sequentially. This IC has increment read function. After output of data for 1 byte (8bits), by continuing input
of SCK, data of the next address can be read. Increment read can read all the addresses of EEPROM. After reading data
of the most significant address, by continuing increment read, data of the most insignificant address is read.
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3. Write Command (WRITE)
0
1
2
3
4
5
6
7
8
10
9
11
～
～
SCK
～ ～
～
～
～
～
CSB
23
24
30
～ ～
～
～
～
～
0
0
0
0
0
0
1
A14
A15
A13
A12
A1
A0
D7
D6
D2
D1
D0
～
～
SO
0
～
～
SI
31
High-Z
＊=Don't Care
Figure 39. Write command
By write command, data of EEPROM can be written. As for this command, set CSB LOW, then input address and data
after write ope code. Then, by making CSB HIGH, the EEPROM starts writing. The write time of EEPROM requires time
of tE/W (Max 5ms). During tE/W, other than read status register command is not accepted. Set CSB HIGH between taking
the last data (D0) and rising the next SCK clock. At the other timing, write command is not executed, and this write
command is cancelled. This IC has page write function, and after input of data for 1 byte (8 bits), by continuing data input
without setting CSB HIGH, 2byte or more data can be written for one tE/W. Up to 128 arbitrary bytes can be written. In
page write, the insignificant 7 bit of the designated address is incremented internally at every time when data of 1 byte is
input and data is written to respective addresses. When data of the maximum bytes or higher is input, address rolls over,
and previously input data is overwritten.
4. Write Status Register, Read Status Register Command (WRSR/RDSR)
CSB
SCK
SI
SO
0
0
1
0
2
3
0
0
4
5
0
0
6
0
7
1
8
9
10
bit7
bit6
bit5
WPEN
*
*
11
12
bit4
13
bit3
bit2
BP1 BP0
*
14
15
bit1
bit0
*
*
High-Z
*=Don't care
Figure 40. Write status register
Write status register command can write data of status register. The data can be written by this command are 3 bits, that
is, WPEN (bit7), BP1 (bit3) and BP0 (bit2) among 8 bits of status register. By BP1 and BP0, write disable block of
EEPROM can be set. As for this command, set CSB LOW, and input ope code of write status register, and input data.
Then, by making CSB HIGH, EEPROM starts writing. Write time requires time of tE/W as same as write. As for CSB rise,
set CSB HIGH between taking the last data bit (bit0) and the next SCK clock rising. At the other timing, command is
cancelled. Write disable block is determined by BP1 BP0, and the block can be selected from 1/4, 1/2, and entire of
memory array (Refer to the write disable block setting table.). To the write disabled block, write cannot be made, and only
read can be made.
CSB
SCK
SI
SO
0
0
1
0
2
0
3
0
High-Z
4
0
6
5
1
0
7
8
9
10
11
12
13
14
15
1
bit7
bit6
bit5
bit4
WPEN
0
0
0
bit3
bit2
bit1
bit0
BP1 BP0 WEN R/B
Figure 41. Read status register command
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WPB Cancel Valid Area
WPB is normally fixed to “H” or “L” for use, but when WPB is controlled so as to cancel write status register command, pay
attention to the following WPB valid timing.
While write status register command is executed, by setting WPB = “L” in cancel valid area, command can be cancelled.
The area from command ope code to CSB rise at internal automatic write start becomes the cancel valid area. However,
once write is started, by any input write cycle cannot be cancelled. WPB input becomes Don’t Care, and cancellation
becomes invalid.
SCK
6
7
15
16
Ope Code
Data
tE/W
Data write time
Invalid
Valid
Invalid
Figure 42. WPB valid timing (At inputting WRSR command)
HOLDB Pin
By HOLDB pin, command communication can be stopped temporarily (HOLD status). The command communications are
carried out when the HOLDB pin is HIGH. To get in HOLD status, at command communication, when SCK=LOW, set the
HOLDB pin LOW. At HOLD status, SCK and SI become Don’t Care, and SO becomes high impedance (High-Z). To release
the HOLD status, set the HOLDB pin HIGH when SCK=LOW. After that, communication can be restarted from the point
before the HOLD status. For example, when HOLD status is made after A5 address input at read, after release of HOLD
status, by starting A4 address input, read can be restarted. When in HOLD status, keep CSB LOW. When it is set
CSB=HIGH in HOLD status, the IC is reset, therefore communication after that cannot be restarted.
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Method to Cancel Each Command
1. READ, RDSR
・Method to cancel : cancel by CSB = “H”.
Ope code
Address
Data
Ope code
8 bits
16 bits
8 bits
8 bits
Cancel available in all areas of read mode
Data
8 bits
Cancel available in all
areas of rdsr mode
Figure 43. READ cancel valid timing
Figure 44. RDSR cancel valid timing
2. WRITE, PAGE WRITE
a：Ope code or address input area
Cancellation is available by CSB=”H”.
b：Data input area (D7 to D1 input area)
Cancellation is available by CSB=”H”.
c：Data input area (D0 area)
In this area, cancellation is not available.
When CSB is set HIGH, write starts.
d：tE/W area
In the area c, by rising CSB, write starts.
While writing, by any input, cancellation cannot be made.
Ope code
Address
Data
8bits
16bits
8bits
b
a
tE/W
d
c
SCK
SI
D7
D6
D5
D4
D3
D2
D1
D0
c
b
Figure 45. WRITE cancel valid timing
Note1) If Vcc is made OFF during write execution, designated address data is not guaranteed, therefore write it once again.
Note2) If CSB is rised at the same timing as that of the SCK rise, write execution / cancel becomes unstable, therefore, it is recommended to rise in
SCK = “L” area. As for SCK rise, assure timing of tCSS / tCSH or more.
3. WRSR
a：From ope code to 15-th clock rise
Cancellation is available by CSB=”H”.
b：From 15-th clock rise to 16-th clock rise (write enable area)
In this area, cancellation is not available by CSB=”H”.
When CSB is set HIGH, write starts using CSB..
c：After 16-th clock rise.
Cancellation is available by CSB=”H”.
However, if write starts (CSB is rised)
In the area b, cancellation cannot be made by any means.
And, by inputting on SCK clock, cancellation cannot be made.
14
SCK
15
D1
SI
b
c
tE/W
Data
8 bits
17
D0
a
Ope code
16
8 bits
a
c
b
Figure 46. WRSR cancel valid timing
Note1) If Vcc is made OFF during write execution, designated address data is not guaranteed, therefore write it once again
Note2) If CSB is rised at the same timing as that of the SCK rise, write execution / cancel becomes unstable, therefore, it is recommended to rise in
SCK = “L” area. As for SCK rise, assure timing of tCSS / tCSH or more.
4. WREN/WRDI
a：From ope code to 7-th clock rise, cancellation is available by CSB = “H”.
b：Cancellation is not available 7-th clock.
6
SCK
7
8
Ope code
8 bits
a
b
Figure 47. WREN/WRDI cancel valid timing
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I/O Peripheral Circuits
In order to realize stable high speed operations, pay attention to the following input / output pin conditions.
Input pin pull up, pull down resistance
When to attach pull up, pull down resistance to EEPROM input pin, select an appropriate value for the microcontroller VOL,
IOL with considering VIL characteristics of this IC.
Vcc－VOLM
R PU 
･･･①
IOLM
VOLM 
VILM
･･･②
1. Pull Up Resistance
Example) When Vcc=5V, VILE=1.5V, VOLM=0.4V, IOLM=2mA,
from the equation ①,
Microcontroller
IOLM
RPU
EEPROM
VOLM
RPU 
VILE
“L” output
 RPU
“L” input
Figure 48. Pull up resistance
5‐0.4
2  10‐3
 2.3[k]
With the value of Rpu to satisfy the above equation, VOLM
becomes 0.4V or lower, and with VILE (=1.5V), the equation ② is
also satisfied.
・VILE :EEPROM VIL specifications
・VOLM :Microcontroller VOL specifications
・IOLM :Microcontroller IOL specifications
And, in order to prevent malfunction or erroneous write at power ON/OFF, be sure to make CSB pull up.
2. Pull Down Resistance
VOHM
“H” output
R PD 
EEPROM
Microcontroller
VIHE
IOHM
RPD
VOLM 
“H” input
VOHM
IOHM
･･･③
VIHM･･･④
Example) When VCC=5V, VOHM=VCC-0.5V, IOHM＝0.4mA,
VIHE=VCC×0.7V, from the equation③,
5‐0.5
0.4  10‐3
∴ RPD  11.3[k]
Figure 49. Pull down resistance
R PD 
Further, by amplitude VIHE, VILE of signal input to EEPROM, operation speed changes. By inputting Vcc/GND level
amplitude of signal, more stable high speed operations can be realized. On the contrary, when amplitude of 0.8Vcc /
0.2Vcc is input, operation speed becomes slow.(note1)
In order to realize more stable high speed operation, it is recommended to make the values of RPU, RPD as large as
possible, and make the amplitude of signal input to EEPROM close to the amplitude of VCC / GND level.
(note1) In this case, guaranteed value of operating timing is guaranteed.
3. SO Load Capacity Condition
Load capacity of SO output pin affects upon delay characteristic of SO output (Data output delay time, time from HOLDB
to High-Z, Output rise time, Output fall time.). In order to make output delay characteristic into better, make SO load
capacity small.
EEPROM
SO
CL
Figure 50. SO load capacity
4. Other cautions
Make the each wire length from the microcontroller to EEPROM input pin same length, in order to prevent setup / hold
violation to EEPROM, owing to difference of wire length of each input.
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Equivalent Circuit
1. Output Circuit
internal
signal
SO
internal
signal
Figure 51. SO output equivalent circuit
2. Input Circuit
internal
signal
CSB
internal
signal
Figure 52. CSB input equivalent circuit
SCK
internal
signal
SI
Figure 54. SI input equivalent circuit
Figure 53. SCK input equivalent circuit
HOLDB
internal
signal
WPB
internal
signal
Figure 56. WPB input equivalent circuit
Figure 55. HOLDB input equivalent circuit
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Power-Up/Down Conditions
1. At Standby
Set CSB “H”, and be sure to set SCK, SI input “L” or “H”. Do not input intermediate electric potantial.
2. At Power ON/OFF
When Vcc rise or fall, set CSB=”H” (=Vcc).
When CSB is “L”, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may
cause malfunction, erroneous write or so. To prevent these, at power ON, set CSB “H”. (When CSB is in “H” status, all
inputs are canceled.)
Vcc
CSB
Good example
Bad example
Figure 57. CSB timing at power ON/OFF
(Good example) CSB terminal is pulled up to Vcc.
At power OFF, take 10ms or more before supply. If power is turned on without observing this condition, the IC
internal circuit may not be reset.
(Bad example) CSB terminal is “L” at power ON/OFF.
In this case, CSB always becomes “L” (active status), and EEPROM may have malfunction or erroneous write owing
to noises and the likes.
Even when CSB input is High-Z, the status becomes like this case.
3. Operating Timing after Power ON
As shown in Figure 58, at standby, when SCK is “H”, even if CSB is fallen, SI status is not read at fall edge. SI status is
read at SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB “H” status.
Even if CSB is fallen at SCK=”H”,
SI status is not read at that edge.
CSB
Command start here. SI is read.
SCK
0
1
2
SI
Figure 58. Operating timing
4. At Power on Malfunction Preventing Function
This IC has a POR (Power On Reset) circuit as mistake write countermeasure. After POR action, it gets in write disable
status. The POR circuit is valid only when power is ON, and does not work when power is OFF. When power is ON, if the
recommended conditions of the following tR, tOFF, and Vbot are not satisfied, it may become write enable status owing to
noises and the likes.
tR
Vcc
tOFF
Recommended conditions of tR, tOFF, Vbot
tR
tOFF
Vbot
0
Vbot
10ms or below
10ms or higher
0.3V or below
100ms or below
10ms or higher
0.2V or below
Figure 59. Rise waveform
5. Low Voltage Malfunction Preventing Function
LVCC (Vcc-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write.
At LVCC voltage (Typ =1.2V) or below, it prevent data rewrite.
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Noise Countermeasures
1. Vcc Noise (bypass capacitor)
When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is
recommended to attach a bypass capacitor (0.1µF) between IC Vcc and GND. At that time, attach it as close to IC as
possible.
And, it is also recommended to attach a bypass capacitor between board Vcc and GND.
2. SCK Noise
When the rise time of SCK (tRC) is long, and a certain degree or more of noise exists, malfunction may occur owing to
clock bit displacement. To avoid this, a Schmitt trigger circuit is built in SCK input. The hysteresis width of this circuit is set
about 0.2V, if noises exist at SCK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the rise
time of SCK (tRC) 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise
countermeasures. Make the clock rise, fall time as small as possible.
3. WPB Noise
During execution of write status register command, if there exist noises on WPB pin, mistake in recognition may occur
and forcible cancellation may result. To avoid this, a Schmitt trigger circuit is built in WPB input. In the same manner, a
Schmitt trigger circuit is built in CSB input, SI input and HOLDB input too.
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
4.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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Operational Notes – continued
11.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The
operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical
damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an
input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when
no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins
have voltages within the values specified in the electrical characteristics of this IC.
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Ordering Information
Product Code Description
B
R
2
5
G
5
1
2
x
x
x
-
3
G
E
2
BUS Type
25：SPI
Operating temperature/voltage
-40°C to +85°C / 1.8V to 5.5V
Capacity
512=512K
Package
F
: SOP8
FJ : SOP-J8
FVT : TSSOP-B8
Process Code
G
:
Halogen free
Packaging and Forming Specification
E2
: Embossed tape and reel
Lineup
Package
Capacity
Type
SOP8
512K
SOP-J8
TSSOP-B8
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Quantity
Reel of 2500
Reel of 3000
Orderable Part Number
BR25G512F
-3GE2
BR25G512FJ
-3GE2
BR25G512FVT
-3GE2
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Datasheet
BR25G512-3
Physical Dimension Tape and Reel Information
Package Name
SOP8
(Max 5.35 (include.BURR)
(UNIT : mm)
PKG : SOP8
Drawing No. : EX112-5001-1
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2500pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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∗ Order quantity needs to be multiple of the minimum quantity.
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BR25G512-3
Physical Dimension Tape and Reel Information - continued
Package Name
SOP-J8
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2500pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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©2015 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
)
∗ Order quantity needs to be multiple of the minimum quantity.
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BR25G512-3
Physical Dimension Tape and Reel Information - continued
Package Name
TSSOP-B8
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
3000pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
www.rohm.com
©2015 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
)
∗ Order quantity needs to be multiple of the minimum quantity.
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Datasheet
BR25G512-3
Marking Diagrams
SOP-J8 (TOP VIEW)
SOP8 (TOP VIEW)
Part Number Marking
Part Number Marking
5G51
5G51
LOT Number
LOT Number
1PIN MARK
1PIN MARK
5G51
TSSOP-B8 (TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
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©2015 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
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Datasheet
BR25G512-3
Revision History
Date
Revision
6.Oct.2015
001
Changes
New Release
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TSZ22111･15･001
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGB-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods are fallen under listed items of export control prescribed by Foreign exchange and Foreign trade
act, the permission based on the act is necessary in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGB-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001