ON ESD7462 Ultra-low capacitance esd protection Datasheet

ESD7462, SZESD7462
Ultra-Low Capacitance ESD
Protection
Micro−Packaged Diodes for ESD Protection
The ESD7462 is designed to protect voltage sensitive components
that require ultra−low capacitance from ESD and transient voltage
events. It has industry leading capacitance linearity over voltage
making it ideal for RF applications. This capacitance linearity
combined with the extremely small package and low insertion loss
makes this part well suited for use in antenna line applications for
wireless handsets and terminals.
www.onsemi.com
Features
•
•
•
•
•
•
•
•
Industry Leading Capacitance Linearity Over Voltage
Ultra−Low Capacitance: 0.3 pF Typ
Insertion Loss: 0.05 dB at 1 GHz; 0.10 dB at 3 GHz
Low Leakage: < 1 nA Typ
Protection for the following IEC Standards:
♦ IEC61000−4−2 (ESD): Level 4
♦ IEC61000−4−4 (EFT): 40 A −5/50 ns
♦ IEC61000−4−5 (Lightning): 1 A (8/20 ms)
Protection for ISO 10605 (ESD)
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
•
•
•
•
RF Signal ESD Protection
RF Switching, PA, and Antenna ESD Protection
Near Field Communications
USB 2.0, USB 3.0
MARKING
DIAGRAM
X2DFN2
CASE 714AB
4
M
4M
G
= Specific Device Code
= Date Code
ORDERING INFORMATION
Package
Shipping†
ESD7462N2T5G
X2DFN2
(Pb−Free)
8000 / Tape &
Reel
SZESD7462N2T5G
X2DFN2
(Pb−Free)
8000 / Tape &
Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
IEC 61000−4−2 Contact (Note 1)
IEC 61000−4−2 Air
ISO 10605 Contact (330 pF / 330 W)
ISO 10605 Contact (330 pF / 2 kW)
ISO 10605 Contact (150 pF / 2 kW)
ESD
±18
±18
±13
±29
±30
kV
Total Power Dissipation (Note 2) @ TA = 25°C
Thermal Resistance, Junction−to−Ambient
°PD°
RqJA
300
400
mW
°C/W
TJ, Tstg
−55 to
+150
°C
TL
260
°C
Junction and Storage Temperature Range
Lead Solder Temperature − Maximum
(10 Second Duration)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Non−repetitive current pulse at TA = 25°C, per IEC61000−4−2 waveform.
2. Mounted with recommended minimum pad size, DC board FR−4
© Semiconductor Components Industries, LLC, 2016
January, 2017 − Rev. 1
1
Publication Order Number:
ESD7462/D
ESD7462, SZESD7462
ELECTRICAL CHARACTERISTICS
I
(TA = 25°C unless otherwise noted)
IPP
Parameter
Symbol
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IT
VC VBR VRWM IR
IR VRWM VBR VC
IT
Working Peak Reverse Voltage
IR
V
Maximum Reverse Leakage Current @ VRWM
VBR
Breakdown Voltage @ IT
IT
IPP
Test Current
Bi−Directional TVS
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Parameter
Symbol
Reverse Working Voltage
Condition
Min
Typ
VRWM
Breakdown Voltage
VBR
IT = 1 mA (Note 3)
16.5
22
Max
Unit
16
V
28
V
100
nA
Reverse Leakage Current
IR
VRWM = 5 V
Clamping Voltage
VC
IEC 61000−4−2, ±8 kV Contact
See Figures 1 and 2
V
Clamping Voltage, TLP (Note 4)
VC
IPP = ±8 A
IPP = ±16 A
±34
±47
V
Dynamic Resistance
RDYN
TLP Pulse
1.6
W
Junction Capacitance
CJ
VR = 0 V, f = 1 MHz
VR = 0 V, f = 1 GHz
0.30
0.25
f = 1 GHz
f = 3 GHz
0.05
0.10
Insertion Loss
0.55
0.55
pF
dB
180
20
160
0
140
−20
120
VOLTAGE (V)
VOLTAGE (V)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1.
4. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns.
100
80
60
40
−40
−60
−80
−100
−120
20
−140
0
−20
−25
0
25
50
75
100
125
150
−160
−25
175
0
25
50
75
100
125
150
175
TIME (ns)
TIME (ns)
Figure 1. Typical IEC61000−4−2 +8 kV Contact
ESD Clamping Voltage
Figure 2. Typical IEC61000−4−2 −8 kV Contact
ESD Clamping Voltage
www.onsemi.com
2
ESD7462, SZESD7462
1.E−03
0.55
1.E−04
0.50
1.E−05
0.45
CAPACITANCE (pF)
CURRENT (A)
TYPICAL CHARACTERISTICS
1.E−06
1.E−07
1.E−08
1.E−09
1.E−10
0.40
0.35
0.30
0.25
0.20
0.15
1.E−11
0.10
1.E−12
0.05
0
−10
1.E−13
−24
−16
−8
0
8
16
24
−2
2
6
10
BIAS VOLTAGE (V)
Figure 3. Typical IV Characteristic Curve
Figure 4. Typical CV Characteristic Curve
0.55
0
0.50
−1
0.45
CAPACITANCE (pF)
1
−3
−4
−5
−6
−7
0.35
0.30
0.25
0.20
0.15
0.10
−9
−10
0.05
0
1.E+08
1.E+09
1.E+10
VR = 0 V
0.40
−8
1.E+07
−6
VOLTAGE (V)
−2
S21 (dB)
f = 1 MHz
0.0E+00
1.0E+09
2.0E+09
3.0E+09
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 5. Typical Insertion Loss
Figure 6. Typical Capacitance Over Frequency
www.onsemi.com
3
ESD7462, SZESD7462
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
Ipeak
Level
Test Voltage (kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1
2
7.5
4
2
2
4
15
8
4
3
6
22.5
12
6
4
8
30
16
8
100%
90%
I @ 30 ns
I @ 60 ns
10%
tP = 0.7 ns to 1 ns
Figure 7. IEC61000−4−2 Spec
ESD Gun
Oscilloscope
TVS
50 W
Cable
50 W
Figure 8. Diagram of ESD Clamping Voltage Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
www.onsemi.com
4
ESD7462, SZESD7462
10
20
−20
18
−18
12
6
10
4
8
6
4
10
20
30
40
50
−16
TLP CURRENT (A)
TLP CURRENT (A)
14
EQUIVALENT VIEC (kV)
EQUIVALENT VIEC (kV)
8
16
2
0
0
−10
−14
−12
−6
−10
−4
−8
−6
2
−4
0
−2
0
60
−8
−2
0
−10
−20
VC, CLAMPING VOLTAGE (V)
−50
−40
0
−60
VC, CLAMPING VOLTAGE (V)
Figure 9. Typical Positive TLP IV Curve
NOTE:
−30
Figure 10. Typical Negative TLP IV Curve
TLP parameter: Z0 = 50 W, tp = 100 ns, tr = 300 ps, averaging window: t1 = 30 ns to t2 = 60 ns. VIEC is the equivalent voltage
stress level calculated at the secondary peak of the IEC 61000−4−2 waveform at t = 30 ns with 2 A/kV. See TLP description
below for more information.
Transmission Line Pulse (TLP) Measurement
L
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 11. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 12 where an 8 kV IEC 61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels.
50 W Coax
Cable
S Attenuator
÷
50 W Coax
Cable
10 MW
IM
VM
DUT
VC
Oscilloscope
Figure 11. Simplified Schematic of a Typical TLP
System
Figure 12. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
www.onsemi.com
5
ESD7462, SZESD7462
PACKAGE DIMENSIONS
X2DFN2 1.0x0.6, 0.65P
CASE 714AB
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. EXPOSED COPPER ALLOWED AS SHOWN.
0.10 C
É
É
A B
D
PIN 1
INDICATOR
E
DIM
A
A1
b
D
E
e
L
0.05 C
TOP VIEW
NOTE 3
0.10 C
A
MILLIMETERS
MIN
MAX
0.34
0.40
−−−
0.05
0.45
0.55
1.00 BSC
0.60 BSC
0.65 BSC
0.20
0.30
0.10 C
A1
C
SIDE VIEW
RECOMMENDED
SOLDER FOOTPRINT*
SEATING
PLANE
1.20
e
2X
b
e/2
0.05
M
C A B
2X
0.47
0.60
PIN 1
1
DIMENSIONS: MILLIMETERS
2X
L
0.05
M
C A B
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
◊
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
www.onsemi.com
6
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
ESD7462/D
Similar pages