NCV4274C 400 mA Low Dropout Voltage Regulator Description The NCV4274C is a precision micro−power voltage regulator with an output current capability of 400 mA available in the DPAK and D2PAK packages. The output voltage is accurate within ±2.0% with a maximum dropout voltage of 0.5 V with an input up to 40 V. Low quiescent current is a feature drawing only 125 mA with a 1 mA load. This part is ideal for automotive and all battery operated microprocessor equipment. The regulator is protected against reverse battery, short circuit, and thermal overload conditions. The device can withstand load dump transients making it suitable for use in automotive environments. www.onsemi.com MARKING DIAGRAMS 4 DPAK DT SUFFIX CASE 369C Features • • • • • • • • 3.3 V, 5.0 V, ±2.0% Output Options Low 125 mA Quiescent Current at 1 mA load current 400 mA Output Current Capability Fault Protection +60 V Peak Transient Voltage with Respect to GND S −42 V Reverse Voltage S Short Circuit S Thermal Overload Very Low Dropout Voltage AEC−Q100 Grade 1 Qualified and PPAP Capable These are Pb−Free Devices D2PAK DS SUFFIX CASE 418AF xx A L, WL Y WW G 74C−xxG ALYWW x 1 Input 2, 4 Ground 3 Output 2 1 3 NC V4274C−xx AWLYYWWG 1 Input 2, 4 Ground 3 Output = 33 (3.3 V) = 50 (5.0 V) = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information on page 11 of this data sheet. © Semiconductor Components Industries, LLC, 2015 May, 2015 − Rev. 1 1 Publication Order Number: NCV4274C/D NCV4274C I Q Bandgap Refernece Current Limit and Saturation Sense − + Thermal Shutdown GND Figure 1. Block Diagram Pin Definitions and Functions Pin No. Symbol 1 I 2,4 GND 3 Q Function Input; Bypass directly at the IC a ceramic capacitor to GND. Ground Output; Bypass with a capacitor to GND. ABSOLUTE MAXIMUM RATINGS Pin Symbol, Parameter I, Input−to−Regulator Symbol Condition Min Max Unit V Voltage VI −42 45 Current II Internally Limited Internally Limited I, Input peak Transient Voltage to Regulator with Respect to GND (Note 1) VI 60 V Q, Regulated Output Voltage VQ −1.0 40 V Current IQ Internally Limited Internally Limited GND, Ground Current IGND − 100 mA Junction Temperature Storage Temperature TJ TStg −40 −50 150 150 °C °C ESD Capability, Human Body Model (Note 2) ESDHB 4 kV ESD Capability, Machine Model (Note 2) ESDMM 200 V ESD Capability, Charged Device Model (Note 2) ESDCDM 1 kV VQ = VI Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Load Dump Test B (with centralized load dump suppression) according to ISO16750-2 standard. Guaranteed by design. Not tested in production. Passed Class C. 2. This device series incorporates ESD protection and is tested by the following methods: ESD HBM tested per AEC−Q100−002 (EIA/JESD22−A114) ESD MM tested per AEC−Q100−003 (EIA/JESD22−A115) ESD CDM tested per EIA/JES D22/C101, Field Induced Charge Model www.onsemi.com 2 NCV4274C OPERATING RANGE Min Max Unit Input Voltage (5.0 V Version) Parameter Symbol VI Condition 5.5 40 V Input Voltage (3.3 V Version) VI 4.5 40 V Junction Temperature TJ −40 150 °C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. THERMAL RESISTANCE Parameter Symbol Condition Min Max Unit Junction−to−Ambient DPAK Rthja − 112.3 (Note 3) °C/W Junction−to−Ambient D2PAK Rthja − 89.7 (Note 3) °C/W Junction−to−Case DPAK Rthjc − 5.8 °C/W Junction−to−Case D2PAK Rthjc − 5.8 °C/W Unit 3. 1 oz copper, 100 mm2 copper area, single−sided FR4 PCB. Pb−FREE SOLDERING TEMPERATURE AND MSL Parameter Pb−Free Soldering, (Note 4) Reflow (SMD styles only), Moisture Sensitivity Level Symbol Condition Min Max Tsld 60s − 150s Above 217s 40s Max at Peak − 265 pk DPAK and D2PAK 1 − Pb−Free MSL 4. Per IPC/JEDEC J−STD−020C www.onsemi.com 3 °C NCV4274C ELECTRICAL CHARACTERISTICS −40°C < TJ < 150°C; VI = 13.5 V unless otherwise noted. Parameter Symbol Test Conditions Min Typ Max Unit REGULATOR Output Voltage (5.0 V Version) VQ 5 mA < IQ < 400 mA 6 V < VI < 28 V 4.9 5.0 5.1 V Output Voltage (5.0 V Version) VQ 5 mA < IQ < 200 mA 6 V < VI < 40 V 4.9 5.0 5.1 V Output Voltage (3.3 V Version) VQ 5 mA < IQ < 400 mA 4.5 V < VI < 28 V 3.23 3.3 3.37 V Output Voltage (3.3 V Version) VQ 5 mA < IQ < 200 mA 4.5 V < VI < 40 V 3.23 3.3 3.37 V Current Limit (All Versions) IQ VQ = 90% VQTYP 400 600 − mA Quiescent Current Iq IQ = 1 mA VQ = 5.0 V VQ = 3.3 V IQ = 250 mA VQ = 5.0 V VQ = 3.3 V IQ = 400 mA VQ = 5.0 V VQ = 3.3 V − − 125 125 250 250 mA mA − − 5 5 15 15 mA mA − − 10 10 35 35 mA mA IQ = 250 mA, VDR = VI − VQ VI = 5.0 V − 250 500 mV Dropout Voltage VDR 5.0 V Version Load Regulation (3.3 V and 5 V Versions) DVQ IQ = 5 mA to 400 mA − 3 20 mV Line Regulation (3.3 V and 5 V Versions) DVQ DVI = 12 V to 32 V IQ = 5 mA − 4 25 mV Power Supply Ripple Rejection PSRR ƒr = 100 Hz, Vr = 0.5 VPP − 60 − dB 150 − 210 °C Thermal Shutdown Temperature* TSD IQ = 5 mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. *Guaranteed by design, not tested in production VI VI II C11 1.0 mF I C12 100 nF 1 NCV4274C 3 Q 2,4 GND IGND IQ CQ 10 mF or 22 mF VQ VQ VI Input Rload CI 100 nF 1 NCV4274C 3 VQ CQ* Output 2,4 GND *CQ = 10 mF for VQ ≤ 3.3 V CQ = 22 mF for VQ ≥ 5 V Figure 2. Measuring Circuit Figure 3. Application Circuit www.onsemi.com 4 NCV4274C TYPICAL CHARACTERISTIC CURVES − 5 V VERSION 5.1 Unstable Region 10 ESR (W) VQ, OUTPUT VOLTAGE (V) 100 1 Stable Region 0.1 5.05 5 4.95 VI = 13.5 V RL = 1 kW CQ = 22 mF 4.9 −40 0.01 0 100 200 300 400 80 120 TJ, JUNCTION TEMPERATURE (°C) Figure 4. Output Stability with Output Capacitor ESR Figure 5. Output Voltage vs. Junction Temperature 160 400 VDR, DROPOUT VOLTAGE (mV) 5 4 3 2 1 TJ = 25°C RL = 20 W 0 2 4 6 8 350 300 200 TJ = 25°C 150 100 50 0 50 100 150 100 250 300 350 400 VI, INPUT VOLTAGE (V) IQ, OUTPUT CURRENT (mA) Figure 6. Output Voltage vs. Input Voltage Figure 7. Dropout Voltage vs. Output Current 1.6 700 1.2 600 0.8 0.4 0 −0.4 −0.8 −1.2 −50 TJ = 125°C 250 0 10 IQ, OUTPUT CURRENT (mA) VQ, OUTPUT VOLTAGE (V) II, INPUT CURRENT (mA) 40 IQ, OUTPUT CURRENT (mA) 6 0 0 RL = 6.8 kW TJ = 25°C −30 −10 10 30 500 400 300 200 100 0 50 TJ = 25°C VQ = 0 V 0 5 10 15 20 25 30 35 40 VI, INPUT VOLTAGE (V) VI, INPUT VOLTAGE (V) Figure 8. Input Current vs. Input Voltage Figure 9. Maximum Output Current vs. Input Voltage www.onsemi.com 5 45 NCV4274C TYPICAL CHARACTERISTIC CURVES − 5 V VERSION 0.7 Iq, QUIESCENT CURRENT (mA) 9 8 7 6 5 4 3 2 VI = 13.5 V TJ = 25°C 1 0 0 50 100 150 200 250 300 350 400 0.6 0.5 0.4 0.3 0.2 0.1 VI = 13.5 V TJ = 25°C 0 0 450 10 20 30 40 50 IQ, OUTPUT CURRENT (mA) IQ, OUTPUT CURRENT (mA) Figure 10. Quiescent Current vs. Output Current (High Load) Figure 11. Quiescent Current vs. Output Current (Low Load) 10 Iq, QUIESCENT CURRENT (mA) Iq, QUIESCENT CURRENT (mA) 11 10 TJ = 25°C RL = 20 W 9 8 7 6 5 4 3 2 1 0 0 5 10 15 20 25 30 35 40 VI, INPUT VOLTAGE (V) Figure 12. Quiescent Current vs. Input Voltage www.onsemi.com 6 45 60 NCV4274C TYPICAL CHARACTERISTIC CURVES − 3.3 V VERSION 3.36 Unstable Region 10 ESR (W) VQ, OUTPUT VOLTAGE (V) 100 1 Stable Region 0.1 3.34 3.32 3.3 3.28 3.26 VI = 13.5 V RL = 660 W CQ = 10 mF 3.24 −40 0.01 0 100 200 300 400 Figure 14. Output Voltage vs. Junction Temperature II, INPUT CURRENT (mA) VQ, OUTPUT VOLTAGE (V) 120 Figure 13. Output Stability with Output Capacitor ESR 2 1 TJ = 25°C RL = 20 W 0 2 4 6 10 8 1.4 1.2 1 0.8 0.6 0.4 0.2 0 −0.2 −0.4 −0.6 −0.8 −1 −50 160 TJ = 25°C RL = 3.3 kW −30 −10 10 30 50 VI, INPUT VOLTAGE (V) VI, INPUT VOLTAGE (V) Figure 15. Output Voltage vs. Input Voltage Figure 16. Input Current vs. Input Voltage 4 IQ, QUIESCENT CURRENT (mA) 700 IQ, OUTPUT CURRENT (mA) 80 TJ, JUNCTION TEMPERATURE (°C) 3 600 500 400 300 200 100 0 0 40 IQ, OUTPUT CURRENT (mA) 4 0 0 TJ = 25°C VQ = 0 V 5 10 15 20 25 30 35 40 3.5 3 2.5 2 1.5 1 TJ = 25°C RL = 20 W 0.5 0 45 0 5 10 15 20 25 30 35 40 VI, INPUT VOLTAGE (V) VI, INPUT VOLTAGE (V) Figure 17. Maximum Output Current vs. Input Voltage Figure 18. Quiescent Current vs. Input Voltage www.onsemi.com 7 45 NCV4274C TYPICAL CHARACTERISTIC CURVES − 3.3 V VERSION 0.7 Iq, QUIESCENT CURRENT (mA) Iq, QUIESCENT CURRENT (mA) 11 10 9 8 7 6 5 4 3 2 VI = 13.5 V TJ = 25°C 1 0 0 50 100 150 200 250 300 350 400 0.6 0.5 0.4 0.3 0.2 0.1 VI = 13.5 V TJ = 25°C 0 0 450 10 20 30 40 50 IQ, OUTPUT CURRENT (mA) IQ, OUTPUT CURRENT (mA) Figure 19. Quiescent Current vs. Output Current (High Load) Figure 20. Quiescent Current vs. Output Current (Low Load) www.onsemi.com 8 60 NCV4274C APPLICATION DESCRIPTION Output Regulator Once the value of PD(max) is known, the maximum permissible value of RqJA can be calculated: ǒ150 C * T AǓ The output is controlled by a precision trimmed reference and error amplifier. The PNP output has saturation control for regulation while the input voltage is low, preventing over saturation. Current limit and voltage monitors complement the regulator design to give safe operating signals to the processor and control circuits. Pq JA + (eq. 2) PD The value of RqJA can then be compared with those in the package section of the data sheet. Those packages with RqJA’s less than the calculated value in Equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heat sink will be required. The current flow and voltages are shown in the Measurement Circuit Diagram. Stability Considerations The input capacitor CI1 in Figure 2 is necessary for compensating input line reactance. Possible oscillations caused by input inductance and input capacitance can be damped by using a resistor of approximately 1 W in series with CI2. The output or compensation capacitor helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (−25°C to −40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturer’s data sheet usually provides this information. The value for the output capacitor CQ shown in Figure 2 should work for most applications; however, it is not necessarily the optimized solution. Actual Stability Regions are shown in a graphs in the Typical Performance Characteristics section. Heat Sinks A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RqJA: R qJA + R qJC ) R qCS ) R qSA (eq. 3) Where: RqJC = the junction−to−case thermal resistance, RqCS = the case−to−heat sink thermal resistance, and RqSA = the heat sink−to−ambient thermal resistance. RqJC appears in the package section of the data sheet. Like RqJA, it too is a function of package type. RqCS and RqSA are functions of the package type, heat sink and the interface between them. These values appear in data sheets of heat sink manufacturers. Thermal, mounting, and heat sinking are discussed in the ON Semiconductor application note AN1040/D, available on the ON Semiconductor Website. Calculating Power Dissipation in a Single Output Linear Regulator The maximum power dissipation for a single output regulator (Figure 3) is: P D(max) + [V I(max) * V Q(min)]I Q(max) ) V I(max)I q (eq. 1) Where: VI(max) is the maximum input voltage, VQ(min) is the minimum output voltage, IQ(max) is the maximum output current for the application, and Iq is the quiescent current the regulator consumes at IQ(max). www.onsemi.com 9 180 RqJA, THERMAL RESISTANCE (°C/W) RqJA, THERMAL RESISTANCE (°C/W) NCV4274C 160 140 120 100 1 oz 80 2 oz 60 40 0 100 200 300 400 500 COPPER SPREADER AREA 600 130 120 110 100 90 80 70 2 oz 50 40 30 800 700 1 oz 60 0 (mm2) 100 200 300 400 500 COPPER SPREADER AREA Figure 21. RqJA vs. Copper Spreader Area, DPAK 3−Lead 600 800 700 (mm2) Figure 22. RqJA vs. Copper Spreader Area, D2PAK 3−Lead 1000 1 oz Cu Area 100 mm2 R(t) (°C/W) 100 1 oz Cu Area 645 mm2 10 1 0.1 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (s) Figure 23. Single−Pulse Heating Curves, DPAK 3−Lead R(t) (°C/W) 100 1 oz Cu Area 100 mm2 1 oz Cu Area 645 mm2 10 1 0.1 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 PULSE TIME (s) Figure 24. Single−Pulse Heating Curves, D2PAK 3−Lead www.onsemi.com 10 10 100 1000 NCV4274C 100 50% Duty Cycle R(t) (°C/W) 20% 10 10% 5% 1 2% 1% Non−normalized Response Single Pulse 0.1 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 100 1000 PULSE TIME (s) Figure 25. Duty Cycle for 1 inch2 (645 mm2) Spreader Board, DPAK 3−Lead 100 R(t) (°C/W) 50% Duty Cycle 10 20% 10% 5% 1 2% 1% Non−normalized Response Single Pulse 0.1 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 PULSE TIME (s) Figure 26. Duty Cycle for 1 inch2 (645 mm2) Spreader Board, D2PAK 3−Lead ORDERING INFORMATION Device Output Voltage Accuracy Output Voltage Package Shipping† NCV4274CDT33RKG 2% 3.3 V DPAK (Pb−Free) 2500 / Tape & Reel NCV4274CDS33R4G 2% 3.3 V D2PAK (Pb−Free) 800 / Tape & Reel NCV4274CDT50RKG 2% 5.0 V DPAK (Pb−Free) 2500 / Tape & Reel NCV4274CDS50R4G 2% 5.0 V D2PAK (Pb−Free) 800 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 11 NCV4274C PACKAGE DIMENSIONS D2PAK CASE 418AF ISSUE D T C A K S B 2 OPTIONAL CHAMFER ES V H 1 C U ED OPTIONAL CHAMFER T TERMINAL 4 DETAIL C DETAIL C 3 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCHES. 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A AND K. 4. DIMENSIONS U AND V ESTABLISH A MINIMUM MOUNTING SURFACE FOR TERMINAL 4. 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.025 (0.635) MAXIMUM. 6. SINGLE GAUGE DESIGN WILL BE SHIPPED AF TER FPCN EXPIRATION IN OCTOBER 2011. J F G SIDE VIEW 3X TOP VIEW D 0.010 (0.254) N M P R L SIDE VIEW BOTTOM VIEW SINGLE GAUGE CONSTRUCTION DUAL GAUGE CONSTRUCTION T M T SEATING PLANE BOTTOM VIEW DETAIL C OPTIONAL CONSTRUCTIONS SOLDERING FOOTPRINT* 10.490 8.380 16.155 3X 3.504 3X 1.016 2.540 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 12 DIM A B C D ED ES F G H J K L M N P R S U V INCHES MIN MAX 0.386 0.403 0.356 0.368 0.170 0.180 0.026 0.036 0.045 0.055 0.018 0.026 0.051 REF 0.100 BSC 0.539 0.579 0.125 MAX 0.050 REF 0.000 0.010 0.088 0.102 0.018 0.026 0.058 0.078 5 _ REF 0.116 REF 0.200 MIN 0.250 MIN MILLIMETERS MIN MAX 9.804 10.236 9.042 9.347 4.318 4.572 0.660 0.914 1.143 1.397 0.457 0.660 1.295 REF 2.540 BSC 13.691 14.707 3.175 MAX 1.270 REF 0.000 0.254 2.235 2.591 0.457 0.660 1.473 1.981 5 _ REF 2.946 REF 5.080 MIN 6.350 MIN NCV4274C PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE E A E C A b3 B c2 4 L3 D 1 2 Z Z H DETAIL A 3 L4 NOTE 7 b2 e b TOP VIEW c SIDE VIEW 0.005 (0.13) M NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. 7. OPTIONAL MOLD FEATURE. DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z BOTTOM VIEW BOTTOM VIEW ALTERNATE CONSTRUCTION C H L2 GAUGE PLANE C L L1 DETAIL A SEATING PLANE A1 ROTATED 905 CW INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.028 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.114 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.72 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.90 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 6.17 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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