ETC2 N55P242 8 ~ 24 i/o expander with 256-level pwm output Datasheet

N55Pxxx Data Sheet
8 ~ 24 I/O EXPANDER WITH 256-lEVEL PWM OUTPUT
N55Pxxx
Data Sheet
The information described in this document is the exclusive intellectual property of
Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.
Nuvoton is providing this document only for reference purposes of Peripheral based system design. Nuvoton
assumes no responsibility for errors or omissions.
All data and specifications are subject to change without notice.
For additional information or questions, please contact: Nuvoton Technology Corporation.
www.nuvoton.com
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
Table of Contents
1.
GENERAL DESCRIPTION ............................................................................................... 3
2.
FEATURES ........................................................................................................................ 3
3.
PAD DESCRIPTION ......................................................................................................... 5
4.
BLOCK DIAGRAM ........................................................................................................... 6
5.
ELECTRICAL CHARACTERISTICS............................................................................... 7
5.1
Absolute Maximum Ratings ............................................................................... 7
5.2
DC Characteristics .............................................................................................. 7
5.3
AC Characteristics .............................................................................................. 8
6.
REFERENCE APPLICATION CIRCUIT ....................................................................... 10
7.
PACKAGE INFORMATION .......................................................................................... 12
8.
ORDERING INFORMATION ......................................................................................... 17
9.
REVISION HISTORY ..................................................................................................... 18
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
1. General Description
The N55Pxxx series is a general purpose programmable I/O device usable with different
microprocessors through SPI interface. The N55Pxxx contains up to three 8-bit ports
(BPA, BPB and BPC). There are 8~24 I/O pins which may be individually programmed
for 6 separate command groups. The N55Pxxx features logical operating capability
AND/OR/XOR for each bit of internal configuration register to speed up access. These
GPIO pads can drive LED directly with 256 levels of brightness.
The N55Pxxx series contains following bodies with different GPIO pins:
Part No.
N55P082
N55P162
N55P242
GPIO
8 pads
16 pads
24 pads
I/O port
BPB
BPA, BPB
BPA, BPB, BPC
2. Features
 Wide range of operating voltage:
 2.0 ~ 5.5V
 SPI interface in mode 0
 4 SPI pins for communication
 CSB as chip select pin (low active)
 SCK for data synchronization (up to 8MHz)
 MOSI for N55Pxxx to receive commands and data
 MISO for the microcontroller to receive data
 1 wakeup pad for the microcontroller
 8~24 I/O pads

Bi-directional I/O pads
o N55P082: 8 I/O pads
o N55P162: 16 I/O pads
o N55P242: 24 I/O pads

Status of each pad is independently controlled
o Input

Floating

Pull high

Pull low

Dynamic pull low
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
 Dynamic pull high
o Output


CMOS high/low

Inverted CMOS high/low

Inverted open-drain NMOS output

Open-drain PMOS output

Constant sink current output
Any pad can be selected for wakeup to work
 Speed up (AND/OR/XOR) groups to minimize load of MCU
 PWM I/O

256 levels output

Internal ring oscillator @ 8 MHz

4 clock sources
 Reset management

Power-on reset

S/W reset
 Standby current <1uA
 Connection of up to 2 N55Pxxx devices
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
3. Pad Description
Pad Name
Type
BPA0 ~ BPA7
BPB0 ~ BPB7
BPC0 ~ BPC7
IO
IO
IO
Power
Supply
VDDIOA
VDDIOB
VDDIOC
RJPA
I
VDDIOA
RJPB
I
VDDIOB
RJPC
I
VDDIOC
CSB
SCK
MOSI
MISO
DEVICE
WAKEUP
VDD
VDDSPI
VSS
VDDIOA
VSSIOA
VDDIOB
VSSIOB
VDDIOC
VSSIOC
I
I
I
O
I
O
P
P
P
P
P
P
P
P
P
VDDSPI
VDDSPI
VDDSPI
VDDSPI
VDDSPI
VDDSPI
Description
General-purpose IO, BPA port.
General-purpose IO, BPB port.
General-purpose IO, BPC port.
RJPA is connected to an external resistor to set the constant current of
BPA port. It can be NC if constant current is not enabled.
RJPB is connected to an external resistor to set the constant current of
BPB port. It can be NC if constant current is not enabled.
RJPC is connected to an external resistor to set the constant current of
BPC port. It can be NC if constant current is not enabled.
SPI chip select (low active)
SPI clock
SPI data input
SPI data output (clock output if TEST bit is “1”)
Device ID (floating)
Host wakeup
Positive power supply for core logic
Positive power supply for SPI pads
Negative power supply for core logic and SPI pads
Positive power supply for BPA port
Negative power supply for BPA port
Positive power supply for BPB port
Negative power supply for BPB port
Positive power supply for BPC port
Negative power supply for BPC port
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
4. Block Diagram
WAKEUP
PORTA
(PWM)
DEVICE
8
BPA
CSB
RJPA
SCK
SPI
PORTB
(PWM)
MOSI
8
BPB
MISO
RJPB
PORTC
(PWM)
8
BPC
RJPC
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
5. Electrical Characteristics
5.1 Absolute Maximum Ratings
Parameter
Symbol
Conditions
Rated Value
Unit
Power Supply
VDDVSS
-
-0.3 to +7.0
V
Input Voltage
VIN
All Inputs
VSS -0.3 to VDD +0.3
V
Storage Temp.
TSTG
-
-55 to +150
C
Operating Temp.
TOPR
-
0 to +70
C
Total Max. IO Current
IM
-
-200/200
mA
Note: Exposure to conditions beyond those listed under the Absolute Maximum Ratings table may adversely
affect the life and reliability of the device.
5.2 DC Characteristics
(VDD  VSS = 4.5V, TA = 25 C, No Load unless otherwise specified)
Parameter
Sym.
Operating Voltage
VDD
Operating Current
IOP1
VDD=5.5V, CLK @8MHz
-
Standby Current (STOP)
IDD1
VDD=5.5V, CSB=VDD
-
Input Low Voltage
VIL
VDD=4.5V
Input High Voltage
VIH
Input Pull-High Resistor
Input Pull-Low Resistor
Output Current
Constant Output Low
Current
Min.
Typ.
Max.
Unit
2.0
-
5.5
V
800
A
-
1
A
VSS
-
0.3 VDD
V
VDD=4.5V
0.7
VDD
-
VDD
V
RPH
VDD=3.0V
360
450
540
K
RPL
VDD=3.0V
360
450
540
K
IOL
VDD = 3V, VOUT = 0.4V
8
-
-
mA
IOH
VDD = 3V, VOUT = 2.6V
-4
-
-
mA
VOUT= 1.0V, RJPx = 82K
14
7
20
10
26
13
mA
10
15
%
IOLC
Conditions
VOUT= 1.0V, RJPx = 220K
VDD = 2.6~4.5V
Constant Current Dev. by
Voltage Drop
I/I
RJPx = 82K
[I(4.5V)–I(2.6V)] / I(4.5V)
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
5.3 AC Characteristics
(VDD – VSS = 3.0V, TA = 25C ; unless otherwise specified)
Parameter
SCK Clock Frequency
Sym.
Conditions
Min.
Typ.
Max.
Unit
fCLK
-
-
8
MHz
Input Rise Time
tR
-
-
5
nS
Input Fall Time
tF
-
-
5
nS
SCK High Time
tWH
58
-
-
nS
SCK Low Time
tWL
58
-
-
nS
CSB High Time
tCS
100
-
-
nS
CSB Setup Time
tCSS
50
-
-
nS
CSB Hold Time
tCSH
50
-
-
nS
Data in Setup Time
tSU
5
-
-
nS
Data in Hold Time
tH
5
-
-
nS
Output Valid Time
tV
-
-
50
nS
Output Hold Time
tHO
0
-
-
nS
Output Disable Time
tDIS
-
-
100
nS
Output Disable Time
tDIS
-
-
100
nS
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
SPI Timing
tCS
CSB
tCSS
tWH tWL
tCSH
….
CLK
tSU tH
MOSI
Valid
data
………............................
tV
MISO
………............................
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tHO
Valid
data
tDIS
HZ
Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
6. Reference Application Circuit
Disable Constant Current
Enable Constant Current
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
2 x N55Pxxx Cascade
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
7. Package Information
N55P242 Package Pin Assignment (LQFP48)
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
N55P242 Package Dimension (LQFP48)
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
N55P162 Package Pin Assignment (QFN32)
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
N55P082 Package Pin Assignment (QFN32)
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
N55P082, N55P162 Package Dimension (QFN32)
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
8. Ordering Information
Part No.
Shape
Type
Remark
N55P242
H
Die Form
24 I/O
N55P242L48
E
Package Form, LQFP48 (7 x 7 mm)
24 I/O
N55P162
H
Die Form
16 I/O
N55P162N32
E
Package Form, QFN32 (4 x 4 mm)
16 I/O
N55P082
H
Die Form
8 I/O
N55P082N32
E
Package Form, QFN32 (4 x 4 mm)
8 I/O
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Release Date: Mar. 2017
Version A2.1
N55Pxxx Data Sheet
9. Revision History
Version
Date
Substantial Changes
Page
A1.0
Oct. 2016
Initial Release
All
A2.0
Jan. 2017
Revise SCK Clock Frequency AC spec
8
Add Package Information
12~16
A2.1
Mar. 2017
Update Constant current deviation DC spec
7
Important Notice
Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any
malfunction or failure of which may cause loss of human life, bodily injury or severe property
damage. Such applications are deemed, “Insecure Usage”.
Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic
energy control instruments, airplane or spaceship instruments, the control or operation of
dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all
types of safety devices, and other applications intended to support or sustain life.
All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay
claims to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the
damages and liabilities thus incurred by Nuvoton.
- 18 -
Release Date: Mar. 2017
Version A2.1
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