EVALUATION KIT AVAILABLE MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI General Description The MAX17245 high-efficiency, synchronous step-down DC-DC converter with integrated MOSFETs operates over a 3.5V to 36V input voltage range with 42V input transient protection. The MAX17245 can operate in dropout condition by running at 98% duty cycle. This converter delivers up to 3.5A and generates fixed output voltages of 3.3V/5V, along with the ability to program the output voltage between 1V to 10V. The MAX17245 uses a current-mode control architecture and can operate in the pulse-width modulation (PWM) or pulse-frequency modulation (PFM) control schemes. PWM operation provides constant frequency operation at all loads and is useful in applications sensitive to switching frequency. PFM operation disables negative inductor current and additionally skips pulses at light loads for high efficiency. Under light-load applications, the external sync pin FSYNC logic input allows the device to operate in either PFM mode for reduced current consumption or fixed-frequency PWM (forced-PWM) mode to eliminate frequency variation to minimize EMI. Fixed-frequency PWM mode is extremely useful for power supplies designed for RF transceivers where tight emission control is necessary. This device is available in a compact 16-pin (5mm x 5mm) TQFN package with exposed pad and 16-pin TSSOP. -40°C to +85°C operation. Typical Application Circuit VBAT CIN1 SUP CCOMP1 1000pF RCOMP 20kI LX FSYNC VOUT OUT MAX17245 RFOSC 12kI L1 2.2µH BST COMP CCOMP2 12pF CBST 0.1µF SUPSW EN OSC SYNC PULSE CIN2 4.7µF CIN3 4.7µF R___ 0I VBIAS FB RSYNCOUT 100I CBIAS 1µF PGOOD BIAS PGND *RSNUB = 1I and CSNUB = 220pF required for the following operating conditions: VBAT R 25V, VOUT P 5V, fSW R 1.8MHz, FPWM mode enabled 19-8527; Rev 0; 4/16 SYNCOUT AGND RSNUB* CSNUB* VOUT 5V AT 3.5A COUT 22µF VBIAS VOUT FOSC D1 RPGOOD 10kI Benefits and Features ●● Eliminates External Components and Reduces Total Cost • Integrated High-Side and Low-Side Switch Enables Synchronous Operation for High Efficiency and Reduced Cost • All-Ceramic Capacitor Solution Allows Ultra-Compact Solution Size • 220kHz to 2.2MHz Adjustable Frequency with External Synchronization • Power Good Output and High-Voltage EN Input Simplify Power Sequencing ●● Increases Design Flexibility • 180° Out-of-Phase Clock Output at SYNCOUT Enables Cascaded Power Supplies for Increased Power Output • Fixed Output Voltage with ±2% Accuracy (5V/3.3V) or Externally Resistor Adjustable (1V to 10V) ●● Reduces Power Dissipation • >90% Peak Efficiency • PWM and PFM Operation Optimizes Conversion Efficiency From Heavy to Light Loads • Automatic LX Slew-Rate Adjustment for Optimum Efficiency Across Operating Frequency Range • Low 5μA (typ.) Shutdown Current • Low 28μA (typ.) Quiescent Current ●● Operates Reliably • 42V Input Voltage Transient Protection • Fixed 8ms Internal Software Start Reduces Input Inrush Current • Cycle-by-Cycle Current limit, Thermal Shutdown with Automatic Recovery • Reduced EMI Emission with Spread-Spectrum Control Applications ●● Distributed Supply Regulation ●● Wall Transformer Regulation ●● General-Purpose Point-of-Load POWER-GOOD OUTPUT 180° OUT-OF-PHASE OUTPUT Ordering Information/Selector Guide appears at end of data sheet. MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Absolute Maximum Ratings SUP, SUPSW, EN to PGND...................................-0.3V to +42V LX (Note 1).............................................................-0.3V to +42V SUP to SUPSW.....................................................-0.3V to +0.3V BIAS to AGND..........................................................-0.3V to +6V SYNCOUT, FOSC, COMP, FSYNC, PGOOD, FB to AGND.........................-0.3V to (VBIAS + 0.3V) OUT to PGND........................................................-0.3V to +12V BST to LX (Note 1)...................................................-0.3V to +6V AGND to PGND....................................................-0.3V to + 0.3V LX Continuous RMS Current.................................................3.5A Output Short-Circuit Duration.....................................Continuous Continuous Power Dissipation (TA = +70°C)* TQFN (derate 28.6mW/ºC above +70°C)................2285.7mW TSSOP (derate 26.1mW/ºC above +70°C).............2088.8mW Operating Temperature Range........................ -40°C to +85°C Junction Temperature.......................................................+150°C Storage Temperature Range............................. -65°C to +150°C Lead Temperature (soldering, 10s).................................. +300°C Soldering Temperature (reflow)........................................ +260°C *As per JEDEC51 standard (multilayer board). Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Thermal Characteristics (Note 2) TQFN Junction-to-Ambient Thermal Resistance (BJA)...........35ºC/W Junction-to-Case Thermal Resistance (BJC)...............2.7ºC/W TSSOP Junction-to-Ambient Thermal Resistance (BJA)........38.3ºC/W Junction-to-Case Thermal Resistance (BJC)..................3ºC/W Note 1: Self-protected against transient voltages exceeding these limits for ≤ 50ns under normal operation and loads up to the maximum rated output current. Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Electrical Characteristics (VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2µH, CIN = 4.7µF, COUT = 22µF, CBIAS = 1µF, CBST = 0.1µF, RFOSC = 12kΩ, TA = TJ = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3) PARAMETER Supply Voltage Line Transient Event Supply Voltage Supply Current SYMBOL CONDITIONS VSUP, VSUPSW VSUP_t_LT ISUP_STANDBY MIN TYP 3.5 tt_LT < 1s MAX UNITS 36 V 42 V Standby mode, no load, VOUT = 5V, VFSYNC = 0V 28 40 Standby mode, no load, VOUT = 3.3V, VFSYNC = 0V 22 35 5 10 µA µA Shutdown Supply Current ISHDN VEN = 0V BIAS Regulator Voltage VBIAS VSUP = VSUPSW = 6V to 42V, IBIAS = 0 to 10mA 4.7 5 5.4 V VBIAS rising 2.95 3.15 3.40 V BIAS Undervoltage Lockout Hysteresis 450 650 mV Thermal Shutdown Threshold +175 °C Thermal Shutdown Threshold Hysteresis 15 °C BIAS Undervoltage Lockout www.maximintegrated.com VUVBIAS Maxim Integrated │ 2 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Electrical Characteristics (continued) (VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2µH, CIN = 4.7µF, COUT = 22µF, CBIAS = 1µF, CBST = 0.1µF, RFOSC = 12kΩ, TA = TJ = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS OUTPUT VOLTAGE (OUT) PWM Mode Output Voltage PFM Mode Output Voltage VOUT_5V VOUT_3.3V VOUT_PFM_5V VOUT_PFM_3.3V VFB = VBIAS, 6V < VSUPSW < 36V, fixed-frequency mode (Notes 4, 5) No load, VFB = VBIAS, PFM mode (Note 6) 4.9 5 5.1 3.234 3.3 3.366 4.9 5 5.15 3.234 3.3 3.4 V V Load Regulation VFB = VBIAS, 300mA < ILOAD < 3.5A 0.5 % Line Regulation VFB = VBIAS, 6V < VSUPSW < 36V (Note 5) 0.02 %/V BST Input Current LX Current Limit IBST_ON High-side MOSFET on, VBST - VLX = 5V IBST_OFF High-side MOSFET off, VBST - VLX = 5V, TA = +25°C ILX LX Rise Time PFM Mode Current Threshold RON_H Low-Side Switch Leakage Current mA 5 µA 6.2 A 500 mA 100 220 mΩ 1 3 µA 1.5 3 Ω 1 µA 20 100 nA 1.0 1.015 V 200 400 4 ns fOSC ±6% ILX = 1A, VBIAS = 5V High-side MOSFET off, VSUP = 36V, VLX = 0V, TA = +25°C RON_L 2 5.2 Spread spectrum enabled High-Side Switch Leakage Current Low-Side Switch On-Resistance TA = +25°C 1.5 4.2 RFOSC = 12kΩ IPFM_TH Spread Spectrum High-Side Switch On-Resistance Peak inductor current 1 ILX = 0.2A, VBIAS = 5V VLX = 36V, TA = +25°C TRANSCONDUCTANCE AMPLIFIER (COMP) FB Input Current IFB FB Regulation Voltage VFB FB connected to an external resistor divider, 6V < VSUPSW < 36V (Note 7) 0.99 FB Line Regulation ∆VLINE 6V < VSUPSW < 36V 0.02 %/V Transconductance (from FB to COMP) gm VFB = 1V, VBIAS = 5V 700 µS Minimum On-Time tON_MIN 80 ns Maximum Duty Cycle DCMAX 98 % (Note 5) OSCILLATOR FREQUENCY Oscillator Frequency www.maximintegrated.com RFOSC = 73.2kΩ 340 400 460 kHz RFOSC = 12kΩ 2.0 2.2 2.4 MHz Maxim Integrated │ 3 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Electrical Characteristics (continued) (VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2µH, CIN = 4.7µF, COUT = 22µF, CBIAS = 1µF, CBST = 0.1µF, RFOSC = 12kΩ, TA = TJ = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS EXTERNAL CLOCK INPUT (FSYNC) External Input Clock Acquisition time 1 tFSYNC External Input Clock Frequency RFOSC = 12kΩ (Note 8) 1.8 1.4 External Input Clock High Threshold VFSYNC_HI VFSYNC rising External Input Clock Low Threshold VFSYNC_LO VFSYNC falling tSS 5.6 Enable Input High Threshold VEN_HI 2.4 Enable Input Low Threshold VEN_LO Soft-Start Time Cycles 2.6 MHz V 8 0.4 V 12 ms ENABLE INPUT (EN) Enable Threshold Voltage Hysteresis Enable Input Current 0.6 0.2 VEN_HYS IEN V TA = +25°C V 0.1 1 µA POWER GOOD (PGOOD) PGOOD Switching Level VTH_RISING VFB rising, VPGOOD = high 93 95 97 VTH_FALLING VFB falling, VPGOOD = low 90 92 94 10 25 50 PGOOD Debounce Time PGOOD Output Low Voltage ISINK = 5mA PGOOD Leakage Current VOUT in regulation, TA = +25°C SYNCOUT Low Voltage %VFB µs 0.4 V 1 µA ISINK = 5mA 0.4 V SYNCOUT Leakage Current TA = +25°C 1 µA FSYNC Leakage Current TA = +25°C 1 µA OVERVOLTAGE PROTECTION Overvoltage Protection Threshold Note Note Note Note Note Note 3: 4: 5: 6: 7: 8: VOUT rising (monitored at FB pin) 105 VOUT falling (monitored at FB pin) 102 % Limits are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design. Device not in dropout condition. Filter circuit required, see the Typical Application Circuit. Guaranteed by design; not production tested. FB regulation voltage is 1%, 1.01V (max), for -40°C < TA < +105°C. Contact the factory for SYNC frequency outside the specified range. www.maximintegrated.com Maxim Integrated │ 4 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Typical Operating Characteristics (VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFYSNC = 0V, RFOSC = 12kΩ, TA = +25°C, unless otherwise noted.) fSW = 2.2MHz, VIN = 14V 5V 70 SKIP MODE 60 3.3V 50 3.3V 40 5V 30 PWM MODE 20 fSW = 400kHz, VIN = 14V 5.08 VOUT = 5V, VIN = 14V 80 SKIP MODE 5.06 SKIP MODE 5V 60 50 0.0010 0.1000 PWM MODE 4.92 0.0010 VOUT = 5V, VIN = 14V 2.28 PWM MODE 2.26 4.90 5.02 2.16 4.94 2.14 2.2MHz 1.5 ILOAD (A) 2.0 2.5 3.0 2.10 3.5 0.0 2.08 2.04 2.00 -40 -25 -10 5 20 35 50 65 80 95 110 125 www.maximintegrated.com 0.5 1.0 1.5 ILOAD (A) 2.0 2.5 3.0 425 3.5 VOUT = 3.3V 0.0 0.5 1.0 1.5 2.0 ILOAD (A) 2.5 3.0 3.5 SUPPLY CURRENT vs. SUPPLY VOLTAGE toc08 50 45 2.00 SUPPLY CURRENT (µA) 2.12 TEMPERATURE (°C) 433 427 2.25 SWITCHING FREQUENCY (MHz) 2.16 VOUT = 5V 429 2.50 toc07 VOUT = 5V toc06 VIN = 14V, PWM MODE 435 SWITCHING FREQUENCY vs. RFOSC 2.20 3.5 431 VOUT = 3.3V fSW vs. TEMPERATURE VIN = 14V, PWM MODE 3.0 437 2.12 1.0 2.5 439 2.18 4.96 1.5 2.0 ILOAD (A) 441 2.20 4.98 1.0 443 fSW (kHz) 5.00 0.5 445 VOUT = 5V 2.22 0.0 f SW vs. LOAD CURRENT toc05 VIN = 14V, PWM MODE 2.24 400kHz 4.92 fSW (MHz) 10.0000 fSW (MHz) VOUT(V) 5.04 2.24 0.1000 2.30 5.06 2.2MHz 4.94 f SW vs. LOAD CURRENT toc04 5.08 0.5 4.98 LOAD CURRENT (A) VOUT LOAD REGULATION 0.0 5.00 4.96 0 0.0000 10.0000 5.10 2.28 3.3V 30 LOAD CURRENT (A) 4.90 5V 3.3V 40 5.02 10 0 0.0000 400kHz 5.04 20 10 toc03 5.10 90 70 EFFICIENCY (%) 80 EFFICIENCY (%) 100 toc09 90 toc02 VOUT (V) toc01 100 VOUT LOAD REGULATION EFFICIENCY vs. LOAD CURRENT EFFICIENCY vs. LOAD CURRENT 1.75 1.50 1.25 1.00 0.75 0.50 40 35 30 25 20 0.25 15 0 10 12 42 72 RFOSC (kΩ) 102 132 5V/2.2MHz PFM MODE 6 16 26 36 SUPPLY VOLTAGE (V) Maxim Integrated │ 5 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Typical Operating Characteristics (continued) (VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFYSNC = 0V, RFOSC = 12kΩ, TA = +25°C, unless otherwise noted.) toc10 5.02 9 8 4.99 7 4.98 6 VBIAS (V) 5 4 3 5V/2.2MHz PFM MODE 0 6 12 18 24 30 4.96 4.95 4.94 4.93 4.92 4.91 4.90 2 1 4.97 36 VIN = 14V, PWM MODE -40 -25 -10 5 20 35 50 65 80 95 110 125 SUPPLY VOLTAGE (V) TEMPERATURE (°C) VOUT vs. VIN VOUT vs. VIN 5V/2.2MHz PWM MODE ILOAD = 0A 5.06 5.04 5.05 toc12 5.08 toc13 SUPPLY CURRENT (µA) ILOAD = 0A 5.01 5.00 toc11 VBIAS vs. TEMPERATURE SHDN CURRENT vs. SUPPLY VOLTAGE 10 5V/400kHz PWM MODE ILOAD = 0A 5.03 VOUT (V) VOUT (V) 5.02 5.00 4.98 5.01 4.99 4.96 4.94 4.97 4.92 4.90 4.95 6 12 18 24 30 36 42 6 VIN (V) 24 30 36 SLOW VIN RAMP BEHAVIOR toc15 toc14 10V/div 0V VOUT 18 VIN (V) FULL-LOAD STARTUP BEHAVIOR VIN 12 5V/div 0V 1A/div 0V 10V/div 0V VIN 5V/div 0V VOUT 5V/div 0V VPGOOD ILOAD VPGOOD www.maximintegrated.com 5V/div 0V 2A/div 0V ILOAD Maxim Integrated │ 6 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Typical Operating Characteristics (continued) (VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFYSNC = 0V, RFOSC = 12kΩ, TA = +25°C, unless otherwise noted.) SYNC FUNCTION DIPS AND DROPS TEST toc17 toc18 10V/div VIN VLX 5V/2.2MHz 5V/div 5V/div VOUT VFSYNC 2V/div 0V 0V 10V/div VLX 0V 5V/div VPGOOD 200ns LINE TRANSIENT 0V 10ms LINE TRANSIENT toc19 toc20 VIN 2V/div VOUT 2V/div VPGOOD 10V/div VIN 0V VOUT 5V/div 2V/div 0V 0V 400ms 100ms LOAD TRANSIENT (PWM MODE) SHORT CIRCUIT IN PWM MODE toc21 toc22 2V/div VOUT (AC_COUPLED) 200mV/ div VOUT 0V 2A/div INDUCTOR CURRENT LOAD CURRENT 2A/ div 0A 0A 5V/div VPGOOD 0V 10ms www.maximintegrated.com Maxim Integrated │ 7 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI LX 13 PGND 14 MAX17245 PGOOD 15 16 15 14 13 12 11 10 8 BST 7 AGND 6 BIAS 5 COMP BST EN 9 SUPSW EN 10 SUP SUP 11 LX SUPSW 12 LX LX PGOOD TOP VIEW PGND Pin Configurations 9 MAX17245 EP 4 5 6 7 8 BIAS 3 AGND FB 2 COMP OUT TQFN 1 FB 4 OUT 3 FOSC 2 FSYNC 1 FOSC + + SYNCOUT EP FSYNC SYNCOUT 16 TSSOP Pin Descriptions PIN NAME FUNCTION TQFN TSSOP 16 1 SYNCOUT 1 2 FSYNC 2 3 FOSC Resistor-Programmable Switching Frequency Setting Control Input. Connect a resistor from FOSC to AGND to set the switching frequency. 3 4 OUT Switching Regulator Output. OUT also provides power to the internal circuitry when the output voltage of the converter is set between 3V to 5V during standby mode. 4 5 FB Feedback Input. Connect an external resistive divider from OUT to FB and AGND to set the output voltage. Connect to BIAS to set the output voltage to 5V. 5 6 COMP 6 7 BIAS 7 8 AGND 8 9 BST www.maximintegrated.com Open-Drain Clock Output. SYNCOUT outputs 180° out-of-phase signal relative to the internal oscillator. Connect to OUT with a resistor between 100I and 1kΩ for 2MHz operation. For low frequency operation, use a resistor between 1kΩ and 10kΩ. Synchronization Input. The device synchronizes to an external signal applied to FSYNC. Connect FSYNC to AGND to enable PFM mode operation. Connect to BIAS or an external clock to enable fixed-frequency forced PWM mode operation. Error Amplifier Output. Connect an RC network from COMP to AGND for stable operation. See the Compensation Network section for more information. Linear Regulator Output. BIAS powers up the internal circuitry. Bypass with a 1µF capacitor to ground. Analog Ground High-Side Driver Supply. Connect a 0.1µF capacitor between LX and BST for proper operation. Maxim Integrated │ 8 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Pin Descriptions (continued) PIN NAME TQFN TSSOP 9 10 EN 10 11 SUP 11 12 SUPSW 12, 13 13, 14 LX 14 15 PGND 15 16 PGOOD — — EP FUNCTION SUP Voltage Compatible Enable Input. Drive EN low to PGND to disable the device. Drive EN high to enable the device. Voltage Supply Input. SUP powers up the internal linear regulator. Bypass SUP to PGND with a 4.7µF ceramic capacitor. It is recommended to add a placeholder for an RC filter to reduce noise on the internal logic supply (see the Typical Application Circuit). Internal High-Side Switch Supply Input. SUPSW provides power to the internal switch. Bypass SUPSW to PGND with 0.1µF and 4.7µF ceramic capacitors. Inductor Switching Node. Connect a Schottky diode between LX and PGND. Power Ground Open-Drain, Active-Low Power-Good Output. PGOOD asserts when VOUT is above 95% regulation point. PGOOD goes low when VOUT is below 92% regulation point. Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective power dissipation. Do not use as the only IC ground connection. EP must be connected to PGND. Detailed Description The MAX17245 is a 3.5A current-mode, step-down converter with integrated high-side and low-side MOSFETs designed to operate with an external Schottky diode for better efficiency. The low-side MOSFET enables fixedfrequency forced-PWM (FPWM) operation under lightload applications. The device operates with input voltages from 3.5V to 36V, while using only 28µA quiescent current at no load. The switching frequency is resistor programmable from 220kHz to 2.2MHz and can be synchronized to an external clock. The output voltage is available as 3.3V/5V fixed or adjustable from 1V to 10V. The wide input voltage range, along with its ability to operate at 98% duty cycle during undervoltage transients, make this device ideal for many applications. Under light-load applications, the FSYNC logic input allows the device to either operate in PFM mode for reduced current consumption or fixed-frequency PWM mode to eliminate frequency variation to minimize EMI. Fixed-frequency PWM mode is extremely useful for power supplies designed for RF transceivers where tight emission control is necessary. Protection features include cycle-bycycle current limit, overvoltage protection, and thermal shutdown with automatic recovery. Additional features include a power-good monitor to ease power-supply sequencing and a 180° out-of-phase clock output relative to the internal oscillator at SYNCOUT to create cascaded power supplies with multiple devices. www.maximintegrated.com Wide Input Voltage Range The device includes two separate supply inputs (SUP and SUPSW) specified for a wide 3.5V to 36V input voltage range. VSUP provides power to the device and VSUPSW provides power to the internal switch. When the device is operating with a 3.5V input supply, conditions such as cold crank can cause the voltage at SUP and SUPSW to drop below the programmed output voltage. Under such conditions, the device operate in a high duty-cycle mode to facilitate minimum dropout from input to output. In applications where the input voltage exceeds 25V, output is ≤ 5V, operating frequency is ≥ 1.8MHz and the IC is selected to be in PWM mode by either forcing the FSYNC pin high, or using an external clock, pulse skipping is observed on the LX pin. This happens due to insufficient minimum on time. Add optional RSNUB = 1Ω and CSNUB = 220pF to reduce ringing on the LX pin (see the Typical Application Circuit). Linear Regulator Output (BIAS) The MAX17245 includes a 5V linear regulator (BIAS) that provides power to the internal circuit blocks. Connect a 1µF ceramic capacitor from BIAS to AGND. Maxim Integrated │ 9 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI OUT PGOOD COMP FB FBSW FBOK EN SUP AON HVLDO BIAS SWITCH OVER BST SUPSW EAMP LOGIC PWM HSD REF LX CS SOFT START BIAS LSD MAX17245 PGND SLOPE COMP SYNCOUT OSC FSYNC FOSC AGND Figure 1. Internal Block Diagram Power-Good Output (PGOOD) This device features an open-drain power-good output, PGOOD. PGOOD asserts when VOUT rises above 95% of its regulation voltage. PGOOD deasserts when VOUT drops below 92% of its regulation voltage. Connect PGOOD to BIAS with a 10kΩ resistor. www.maximintegrated.com Overvoltage Protection (OVP) If the output voltage reaches the OVP threshold, the highside switch is forced off and the low-side switch is forced on until negative-current limit is reached. After negativecurrent limit is reached, both the high-side and low-side switches are turned off. The MAX17245 offers a lower voltage threshold for applications requiring tighter limits of protection. Maxim Integrated │ 10 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Synchronization Input (FSYNC) FSYNC is a logic-level input useful for operating mode selection and frequency control. Connecting FSYNC to BIAS or to an external clock enables fixed-frequency PWM operation. Connecting FSYNC to AGND enables PFM mode operation. The external clock frequency at FSYNC can be higher or lower than the internal clock by 20%. Ensure the duty cycle of the external clock used has a minimum pulse width of 100ns. The device synchronizes to the external clock within one cycle. When the external clock signal at FSYNC is absent for more than two clock cycles, the device reverts back to the internal clock. System Enable (EN) An enable control input (EN) activates the device from its low-power shutdown mode. EN is compatible with inputs from automotive battery level down to 3.5V. The high voltage compatibility allows EN to be connected to SUP, KEY/KL30, or the inhibit pin (INH) of a CAN transceiver. EN turns on the internal regulator. Once VBIAS is above the internal lockout threshold, VUVL = 3.15V (typ), the controller activates and the output voltage ramps up within 8ms. A logic-low to PGND at EN shuts down the device. During shutdown, the internal linear regulator and gate drivers turn off. Shutdown is the lowest power state and reduces the quiescent current to 5µA (typ). Drive EN high to bring the device out of shutdown. Spread-Spectrum Option The device has an internal spread-spectrum option to optimize EMI performance. This is factory set and the S-version of the device should be ordered. For spreadspectrum-enabled devices, the operating frequency is varied ±6% centered on the oscillator frequency (fOSC). The modulation signal is a triangular wave with a period of 110µs at 2.2MHz. Therefore, FOSC will ramp down 6% and back to 2.2MHz in 110µs and also ramp up 6% and back to 2.2MHz in 110µs. The cycle repeats. The internal spread spectrum is disabled if the device is synced to an external clock. However, the device does not filter the input clock and passes any modulation (including spread-spectrum) present on the driving external clock to the SYNCOUT pin. Automatic Slew-Rate Control on LX The device has automatic slew-rate adjustment that optimizes the rise times on the internal HSFET gate drive to minimize EMI. The device detects the internal clock frequency and adjusts the slew rate accordingly. When the user selects the external frequency setting resistor RFOSC such that the frequency is > 1.1MHz, the HSFET is turned on in 4ns (typ). When the frequency is < 1.1MHz the HSFET is turned on in 8ns (typ). This slew-rate control optimizes the rise time on LX node externally to minimize EMI while maintaining good efficiency. Internal Oscillator (FOSC) The switching frequency (fSW) is set by a resistor (RFOSC) connected from FOSC to AGND. See Figure 3 to select the correct RFOSC value for the desired switching frequency. For example, a 400kHz switching frequency is set with RFOSC = 73.2kΩ. Higher frequencies allow designs with lower inductor values and less output capacitance. Consequently, peak currents and I2R losses are lower at higher switching frequencies, but core losses, gate charge currents, and switching losses increase. Synchronizing Output (SYNCOUT) SYNCOUT is an open-drain output that outputs a 180º out-of-phase signal relative to the internal oscillator. Overtemperature Protection Thermal-overload protection limits the total power dissipation in the device. When the junction temperature exceeds 175°C (typ), an internal thermal sensor shuts down the internal bias regulator and the step-down controller, allowing the device to cool. The thermal sensor turns on the device again after the junction temperature cools by 15°C. For operations at FOSC values other than 2.2MHz, the modulation signal scales proportionally (e.g., at 400kHz, the 110µs modulation period increases to 110µs x 2.2MHz/400kHz = 605µs). www.maximintegrated.com Maxim Integrated │ 11 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Applications Information Setting the Output Voltage Connect FB to BIAS for a fixed 5V output voltage. To set the output to other voltages between 1V and 10V, connect a resistive divider from output (OUT) to FB to AGND (Figure 2). Use the following formula to determine the RFB2 of the resistive divider network: RFB2 = RTOTAL x VFB/VOUT where VFB = 1V, RTOTAL = selected total resistance of RFB1, RFB2 in ω, and VOUT is the desired output in volts. Calculate RFB1 (OUT to FB resistor) with the following equation: V = R FB1 R FB2 OUT − 1 V FB where VFB = 1V (see the Electrical Characteristics table). PWM/PFM Modes This device offers a pin-selectable PFM mode or fixedfrequency PWM mode option. They have an internal LS MOSFET that turns on when the FSYNC pin is connected to VBIAS or if there is a clock present on the FSYNC pin. This enables the fixed-frequency-forced PWM mode operation over the entire load range. This option allows the user to maintain fixed frequency over the entire load range in applications that require tight control on EMI. Even though the device has an internal LS MOSFET for fixedfrequency operation, an external Schottky diode is still required to support the entire load range. If the FSYNC pin is connected to AGND, the PFM mode is enabled on the device. In PFM mode of operation, the converter’s switching frequency is load dependent. At higher load current, the switching frequency does not change and the operating mode is similar to the PWM mode. PFM mode helps improve efficiency in light-load applications by allowing the converters to turn on the high-side switch only when the output voltage falls below a set threshold. As such, the converters do not switch MOSFETs on and off as often as is the case in the PWM mode. Consequently, the gate charge and switching losses are much lower in PFM mode. Refer to the Rectifier Selection section for PFM mode. Inductor Selection Three key inductor parameters must be specified for operation with the device: inductance value (L), inductor saturation current (ISAT), and DC resistance (RDCR). To select inductance value, the ratio of inductor peak-to-peak AC current to DC average current (LIR) must be selected first. A good compromise between size and loss is a 30% peak-to-peak ripple current to average current ratio (LIR = 0.3). The switching frequency, input voltage, output voltage, and selected LIR then determine the inductor value as follows: L= VOUT (VSUP − VOUT ) VSUP f SW I OUT LIR where VSUP, VOUT, and IOUT are typical values (so that efficiency is optimum for typical conditions). The switching frequency is set by RFOSC (see Figure 3). SWITCHING FREQUENCY vs. RFOSC 2.50 VOUT RFB1 MAX17245 FB RFB2 SWITCHING FREQUENCY (MHz) 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 12 42 72 102 132 RFOSC (kΩ) Figure 2. Adjustable Output-Voltage Setting Figure 3. Switching Frequency vs. RFOSC www.maximintegrated.com Maxim Integrated │ 12 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Input Capacitor Output Capacitor The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit’s switching. The input capacitor RMS current requirement (IRMS) is defined by the following equation: IRMS = ILOAD(MAX) VOUT (VSUP − VOUT ) VSUP IRMS has a maximum value when the input voltage equals twice the output voltage (VSUP = 2VOUT), so IRMS(MAX) = ILOAD(MAX) /2. Choose an input capacitor that exhibits less than +10°C self-heating temperature rise at the RMS input current for optimal long-term reliability. The input voltage ripple is composed of ∆VQ (caused by the capacitor discharge) and DVESR (caused by the ESR of the capacitor). Use low-ESR ceramic capacitors with high ripple current capability at the input. Assume the contribution from the ESR and capacitor discharge equal to 50%. Calculate the input capacitance and ESR required for a specified input voltage ripple using the following equations: ESR IN = ∆VESR ∆I I OUT + L 2 where: (V − VOUT ) × VOUT ∆IL = SUP VSUP × f SW × L and: = C IN I OUT × D(1 − D) VOUT = and D ∆VQ × f SW VSUPSW where IOUT is the maximum output current and D is the duty cycle. www.maximintegrated.com The output filter capacitor must have low enough ESR to meet output ripple and load transient requirements. The output capacitance must be high enough to absorb the inductor energy while transitioning from full-load to noload conditions without tripping the overvoltage fault protection. When using high-capacitance, low-ESR capacitors, the filter capacitor’s ESR dominates the output voltage ripple. So the size of the output capacitor depends on the maximum ESR required to meet the output voltage ripple (VRIPPLE(P-P)) specifications: VRIPPLE(P−P) = ESR × ILOAD(MAX) × LIR The actual capacitance value required relates to the physical size needed to achieve low ESR, as well as to the chemistry of the capacitor technology. Thus, the capacitor is usually selected by ESR and voltage rating rather than by capacitance value. When using low-capacity filter capacitors, such as ceramic capacitors, size is usually determined by the capacity needed to prevent voltage droop and voltage rise from causing problems during load transients. Generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem. However, low capacity filter capacitors typically have high ESR zeros that can affect the overall stability. Rectifier Selection The device requires an external Schottky diode rectifier as a freewheeling diode when they are configured for PFM-mode operation. Connect this rectifier close to the device, using short leads and short PCB traces. In PWM mode, the Schottky diode helps minimize efficiency losses by diverting the inductor current that would otherwise flow through the low-side MOSFET. Choose a rectifier with a voltage rating greater than the maximum expected input voltage, VSUPSW. Use a low forwardvoltage-drop Schottky rectifier to limit the negative voltage at LX. Avoid higher than necessary reverse-voltage Schottky rectifiers that have higher forward-voltage drops. Maxim Integrated │ 13 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Compensation Network The device uses an internal transconductance error amplifier with its inverting input and its output available to the user for external frequency compensation. The output capacitor and compensation network determine the loop stability. The inductor and the output capacitor are chosen based on performance, size, and cost. Additionally, the compensation network optimizes the control-loop stability. The controller uses a current-mode control scheme that regulates the output voltage by forcing the required current through the external inductor. The device uses the voltage drop across the high-side MOSFET to sense inductor current. Current-mode control eliminates the double pole in the feedback loop caused by the inductor and output capacitor, resulting in a smaller phase shift and requiring less elaborate error-amplifier compensation than voltage-mode control. Only a simple single-series resistor (RC) and capacitor (CC) are required to have a stable, high-bandwidth loop in applications where ceramic capacitors are used for output filtering (Figure 4). For other types of capacitors, due to the higher capacitance and ESR, the frequency of the zero created by the capacitance and ESR is lower than the desired closed-loop crossover frequency. To stabilize a nonceramic output capacitor loop, add another compensation capacitor (CF) from COMP to AGND to cancel this ESR zero. The basic regulator loop is modeled as a power modulator, output feedback divider, and an error amplifier. The power modulator has a DC gain set by gm O RLOAD, with a pole and zero pair set by RLOAD, the output capacitor (COUT), and its ESR. The following equations allow to approximate the value for the gain of the power modulator (GAINMOD(dc)), neglecting the effect of the ramp stabilization. Ramp stabilization is necessary when the duty cycle is above 50% and is internally done for the device. GAINMOD(dc) = g m × R LOAD where RLOAD = VOUT /ILOUT(MAX) in Ω and gm = 3S. In a current-mode step-down converter, the output capacitor, its ESR, and the load resistance introduce a pole at the following frequency: f pMOD = 1 2π × C OUT × R LOAD The output capacitor and its ESR also introduce a zero at: f zMOD = 1 2π × ESR × C OUT When COUT is composed of “n” identical capacitors in parallel, the resulting COUT = n O COUT(EACH), and ESR = ESR(EACH)/n. Note that the capacitor zero for a parallel combination of alike capacitors is the same as for an individual capacitor. The feedback voltage-divider has a gain of GAINFB = VFB /VOUT, where VFB is 1V (typ). The transconductance error amplifier has a DC gain of GAINEA(dc) = gm,EA O ROUT,EA, where gm,EA is the error amplifier transconductance, which is 700µS (typ), and ROUT,EA is the output resistance of the error amplifier 50MΩ. A dominant pole (fdpEA) is set by the compensation capacitor (CC) and the amplifier output resistance (ROUT,EA). A zero (fzEA) is set by the compensation resistor (RC) and the compensation capacitor (CC). There is an optional pole (fpEA) set by CF and RC to cancel the output capacitor ESR zero if it occurs near the crossover frequency (fC), where the loop gain equals 1 (0dB)). Thus: f dpEA = 1 2π × C C × (R OUT,EA + R C ) f zEA = VOUT f pEA = R1 VREF RC CC 1 2π × C F × R C The loop-gain crossover frequency (fC) should be set below 1/5th of the switching frequency and much higher than the power-modulator pole (fpMOD): COMP gm R2 1 2π × C C × R C CF f f pMOD << f C ≤ SW 5 Figure 4. Compensation Network www.maximintegrated.com Maxim Integrated │ 14 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI The total loop gain as the product of the modulator gain, the feedback voltage-divider gain, and the error amplifier gain at fC should be equal to 1. So: GAINMOD(f ) × C VFB × GAINEA(f ) = 1 C VOUT GAINEA(fC) = g m, EA × R C GAIN = MOD(fC) GAINMOD(dc) × f pMOD fC Therefore: GAINMOD(fC) × VFB × g m,EA × R C = 1 VOUT Solving for RC: RC = VOUT g m,EA × VFB × GAINMOD(fC) Set the error-amplifier compensation zero formed by RC and CC (fzEA) at the fpMOD. Calculate the value of CC a follows: CC = 1 2π × f pMOD × R C If fzMOD is less than 5 x fC, add a second capacitor, CF, from COMP to GND and set the compensation pole formed by RC and CF (fpEA) at the fzMOD. Calculate the value of CF as follows: CF = 1 2π × f zMOD × R C As the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly and the crossover frequency remains the same. www.maximintegrated.com PCB Layout Guidelines Careful PCB layout is critical to achieve low switching losses and clean, stable operation. Use a multilayer board whenever possible for better noise immunity and power dissipation. Follow these guidelines for good PCB layout: 1) Use a large contiguous copper plane under the IC package. Ensure that all heat-dissipating components have adequate cooling. The bottom pad of the IC must be soldered down to this copper plane for effective heat dissipation and for getting the full power out of the IC. Use multiple vias or a single large via in this plane for heat dissipation. 2) Isolate the power components and high current path from the sensitive analog circuitry. Doing so is essential to prevent any noise coupling into the analog signals. 3) Keep the high-current paths short, especially at the PGND ground terminals. This practice is essential for stable, jitter-free operation. The high-current path composed of the input capacitor, high-side FET, inductor, and the output capacitor should be as short as possible. 4) Keep the power traces and load connections short. This practice is essential for high efficiency. Use thick copper PCBs (2oz vs. 1oz) to enhance full-load efficiency. 5) The analog signal lines should be routed away from the high-frequency planes. Doing so ensures integrity of sensitive signals feeding back into the IC. 6) The ground connection for the analog (AGND) and power (PGND) section should be close to the IC. This keeps the ground current loops to a minimum. In cases where only one ground is used, enough isolation between analog return signals and high power signals must be maintained. Maxim Integrated │ 15 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Ordering Information/Selector Guide VOUT PART ADJUSTABLE (FB CONNECTED TO RESISTIVE DIVIDER) (V) FIXED (FB CONNECTED TO BIAS) (V) SPREAD SPECTRUM TEMP RANGE PIN-PACKAGE MAX17245ETERA+ 1 to 10 5 Off -40°C to +85°C 16 TQFN-EP* MAX17245ETERB+ 1 to 10 3.3 Off -40°C to +85°C 16 TQFN-EP* MAX17245ETESA+ 1 to 10 5 On -40°C to +85°C 16 TQFN-EP* MAX17245ETESB+ 1 to 10 3.3 On -40°C to +85°C 16 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Chip Information PROCESS: BiCMOS www.maximintegrated.com Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 16 TQFN-EP T1655+4 21-0140 90-0121 16 TSSOP-EP U16E+3 21-0108 90-0120 Maxim Integrated │ 16 MAX17245 3.5V–36V, 3.5A, Synchronous Buck Converter With 28μA Quiescent Current and Reduced EMI Revision History REVISION NUMBER REVISION DATE 0 4/16 DESCRIPTION Initial release PAGES CHANGED — For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2016 Maxim Integrated Products, Inc. │ 17