TI1 OPA2604-Q1 Dual fet-input, low distortion operational amplifier Datasheet

SGLS209 − NOVEMBER 2003
D PACKAGE
(TOP VIEW)
features
D Qualification in Accordance With
D
D
D
D
D
D
D
D
D
AEC-Q100†
Qualified for Automotive Applications
Customer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval
Low Distortion: 0.0003% at 1 khz
Low Noise: 10 nV//Hz
High Slew Rate: 25 V/µs
Wide Gain-Bandwidth: 20 MHz
Unity-Gain Stable
Wide Supply Range: VS = ±4.5 to ±24 V
Drives 600 W Loads
† Contact factory for details. Q100 qualification data available on
request.
OUTPUT A
−IN A
+IN A
V−
1
8
2
7
3
6
4
5
V+
OUTPUT B
−IN B
+IN B
(8)
V+
(+)
(3, 5)
(−)
(2, 6)
Distortion
Rejection
Circuitry*
Output
Stage*
(1, 7)
VO
applications
D
D
D
D
D
D
Professional Audio Equipment
PCM DAC I/V Converter
Spectral Analysis Equipment
Active Filters
Transducer Amplifier
Data Acquisition
(4)
V−
* Patents Granted:
#5053718, 5019789
description
The OPA2604 is a dual, FET-input operational amplifier designed for enhanced AC performance. Very low
distortion, low noise and wide bandwidth provide superior performance in high quality audio and other
applications requiring excellent dynamic performance.
New circuit techniques and special laser trimming of dynamic circuit performance yield very low harmonic
distortion. The result is an op amp with exceptional sound quality. The low-noise FET input of the OPA2604
provides wide dynamic range, even with high source impedance. Offset voltage is laser-trimmed to minimize
the need for interstage coupling capacitors.
The OPA2604 is available in a SO-8 surface-mount package, specified for the −40°C to +85°C temperature
range.
ORDERING INFORMATION
TA
PACKAGE‡
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 85°C
SOIC - D
Tape and reel
OPA2604IDRQ1
2604Q1
‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2003, Texas Instruments Incorporated
! " #$%! " &$'(#! )!%*
)$#!" # ! "&%##!" &% !+% !%" %," "!$%!"
"!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)%
!%"!/ (( &%!%"*
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absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Power supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V
Input voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 〈V−) − 1 V to (V+) + 1 V
Output short circuit to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 100°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
Package thermal impedance, θJA (see Note 1): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90°C/W
Lead temperature 1,6 mm (1/16 inch) from case for 3 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN
NOM
MAX
UNIT
Operating voltage
±4.5
±15
±24
V
Operating free-air temperature
−40
85
°C
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electrical characteristics, TA = 255C, VS = ±15 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
±1
±5
UNIT
Offset Voltage
Input offset voltage (VIO)
Average drift
Power supply rejection ratio (PSRR)
VS = ±5 V to ±24 V
70
mV
±8
µV/°C
80
dB
100
pA
±4
pA
Input Bias Current (See Note 1)
Input bias current (IIB)
Input offset current (IIO)
VCM = 0 V
VCM = 0 V
Noise
f = 10 Hz
25
f = 100 Hz
15
f = 1 kHz
11
f = 10 kHz
10
Voltage noise
BW = 20 Hz to 20 kHz
1.5
Input bias current noise density
f = 0.1 Hz to 20 kHz
Input noise, voltage noise density
nV/√Hz
µVp-p
fA/√Hz
6
Input Voltage Range
Common-mode input voltage range
(VICR)
±12
±13
V
80
100
dB
Input impedance, differential mode
1012
8
Ω
pF
Input impedance, common mode
1012
10
Ω
pF
100
dB
20
MHz
Common-mode rejection ratio
(CMRR)
VCM = ±12 V
Input Impedance
Open-loop Gain
Open-loop voltage gain (AVOL)
VO = ±10 V,
RL = 1 kΩ
80
Frequency Response
Gain bandwidth product
G = 100
Slew rate
20 Vp-p, RL = 1 kΩ
Settling time to 0.01%
G = −1,
15
10 V step
Settling time to 0.1%
Total Harmonic Distortion + Noise
(THD+N)
G = 1,
Channel separation
f = 1 kHz,
f = 1 kHz,
VO = 3.5 Vrms,
RL = 1 kΩ
RL = 1 kΩ
25
V/µs
1.5
µs
1
µs
0.0003
%
142
dB
Output
Output voltage range (VOH, VOL)
RL = 600 Ω
Output current (IO)
VO = ±12 V
±11
Output short circuit current (IOS)
Open-loop output resistance
±12
V
±35
mA
±40
mA
25
Ω
Power Supply
Total current. both amplifiers (ICC)
±10.5
IO = 0
±12
mA
NOTE 1: Typical performance, measured fully warmed-up.
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TYPICAL CHARACTERISTICS
TOTAL HARMONIC DISTORTION + NOISE
vs OUTPUT VOLTAGE
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
1
THD + N (%)
VO
G = 100V/V
0.01
See ”Distortion Measurements”
for description of test method.
1kΩ
THD + N (%)
VO =
3.5Vrms
1kΩ
0.1
0.1
Measurement BW = 80kHz
See ”Distortion Measure−
ments” for desription of
test method.
0.01
f = 1kHz
Measurement BW = 80kHz
0.001
G = 10V/V
0.001
G = 1V/V
0.0001
0.1
0.0001
20
100
1k
10k
20k
1
10
100
Output Voltage (Vp−p)
Frequency (Hz)
Figure 1
Figure 2
INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
OPEN−LOOP GAIN/PHASE vs FREQUENCY
0
120
1k
1k
φ
−90
60
40
−135
G
20
100
100
Voltage Noise
10
10
Current Noise (fA/ Hz)
Voltage Gain (dB)
−45
80
Phase Shift (Degrees)
Voltage Noise (nV/ Hz)
100
−180
0
Current Noise
−20
10
100
1k
10k
100k
1M
10M
1
10
100
Frequency (Hz)
Input
Bias Current
1nA
100
1nA
10
100
Input
Offset Current
1
10
0
25
50
75
100
0.1
125
Input Bias Current (pA)
10nA
10nA
−25
1nA
Input
Bias Current
1nA
10
Input
Offset Current
10
−15
−10
−5
0
5
Common−Mode Voltage (V)
Figure 5
Figure 6
POST OFFICE BOX 655303
100
100
Ambient Temperature (°C)
4
1
1M
INPUT BIAS AND INPUT OFFSET CURRENT
vs INPUT COMMON−MODE VOLTAGE
Input Offset Current (pA)
Input Bias Current (pA)
100nA
−50
100k
Figure 4
INPUT BIAS AND INPUT OFFSET CURRENT
vs TEMPERATURE
1
−75
10k
Frequency (Hz)
Figure 3
10nA
1k
• DALLAS, TEXAS 75265
10
1
15
Input Offset Current (pA)
1
1
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TYPICAL CHARACTERISTICS
COMMON−MODE REJECTION
vs COMMON−MODE VOLTAGE
INPUT BIAS CURRENT
vs TIME FROM POWER TURN−ON
120
1nA
Common−Mode Rejection (dB)
Input Bias Current (pA)
VS = ±24VDC
VS = ±15VDC
100
VS = ±5VDC
10
1
2
3
4
100
90
80
−15
1
0
110
5
−10
−5
0
Figure 7
10
15
Figure 8
POWER SUPPLY AND COMMON−MODE
REJECTION vs FREQUENCY
AOL, PSR, AND CMR vs SUPPLY VOLTAGE
120
120
CMR
100
110
AOL, PSR, CMR (dB)
PSR, CMR (dB)
5
Common−Mode Voltage (V)
Time After Power Turn−On (min)
80
−PSR
+PSR
60
40
CMR
100
AOL
90
80
20
PSR
0
10
70
100
1k
10k
100k
1M
10
5
10M
15
20
25
Supply Voltage (±VS)
Frequency (Hz)
Figure 9
Figure 10
GAIN−BANDWIDTH AND SLEW RATE
vs TEMPERATURE
GAIN−BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
28
28
33
30
29
Slew Rate
20
25
16
21
12
5
10
15
20
17
25
24
25
20
20
Gain−Bandwidth
G = +100
16
15
12
−75
−50
−25
0
Slew Rate (V/us)
Gain−Bandwidth
G = +100
Gain−Bandwidth (MHz)
24
Slew Rate (V/us)
Gain−Bandwidth (MHz)
Slew Rate
25
50
75
100
10
125
Temperature (°C)
Supply Voltage (±VS)
Figure 11
Figure 12
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TYPICAL CHARACTERISTICS
CHANNEL SEPARATION vs FREQUENCY
SETTLING TIME vs CLOSED−LOOP GAIN
160
5
VO = 10V Step
RL = 1kΩ
CL = 50pF
RL = ∞
Channel Separation (dB)
Settling Time (us)
4
3
0.01%
2
0.1%
1
140
RL = 1kΩ
120
100
VO =
20Vp−p
A
B
RL
Measured
Output
80
0
−10
−1
−100
100
10
−1000
1k
Figure 13
100k
Figure 14
MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY
SUPPLY CURRENT vs TEMPERATURE
30
14
Total for Both Op Amps
Supply Current (mA)
VS = ± 15 V
Output Voltage (Vp−p)
10k
Frequency (Hz)
Closed−Loop Gain (V/V)
20
10
0
VS = ±15VDC
12
VS = ±24VDC
10
VS = ±5VDC
8
6
10k
100k
1M
10M
−50
−75
−25
Frequency (Hz)
0
25
50
75
100
125
Ambient Temperaturre (°C)
Figure 15
Figure 16
SMALL−SIGNAL TRANSIENT RESPONSE
LARGE−SIGNAL TRANSIENT RESPONSE
+100
Output Voltage (mV)
Output Voltage (V)
+10
FPO
Bleed to edge
−10
0
6
5
10
−100
0
1 µs
Time ( us)
Time ( us)
Figure 17
Figure 18
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2 µs
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TYPICAL CHARACTERISTICS
POWER DISSIPATION vs SUPPLY VOLTAGE
SHORT−CIRCUIT CURRENT vs TEMPERATURE
1
60
Worst case sine
wave RL = 600Ω
(both channels)
Power Dissipation (W)
50
40
30
0.8
Typical high−level
music RL = 600Ω
(both channels)
0.7
0.6
0.5
0.4
No signal
or no load
0.3
0.2
0.1
20
−75
−50
−25
0
25
50
75
100
6
125
8
10
12
14
16
18
20
22
24
Supply Voltage, ±VS (V)
Ambient Temperature (°C)
Figure 19
Figure 20
MAXIMUM POWER DISSIPATION vs TEMPERATURE
1.4
Total Power Dissipation (W)
Short−Circuit Current (mA)
0.9
ISC+ and ISC−
θJ−A = 90°C/W
Soldered to
Circuit Board
(see text)
1.2
1.0
0.8
0.6
Maximum
Specified Operating
Temperature
85°C
0.4
0.2
0
0
25
50
75
100
Ambient Temperature (°C)
125
150
Figure 21
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APPLICATION INFORMATION
The OPA2604 is unity-gain stable, making it easy to use in a wide range of circuitry. Applications with noisy or
high impedance power supply lines may require decoupling capacitors close to the device pins. In most cases
1 µF tantalum capacitors are adequate.
distortion measurements
The distortion produced by the OPA2604 is below the measurement limit of virtually all commercially available
equipment. A special test circuit, however, can be used to extend the measurement capabilities.
Op amp distortion can be considered an internal error source which can be referred to the input. Figure 22
shows a circuit which causes the op amp distortion to be 101 times greater than normally produced by the op
amp. The addition of R3 to the otherwise standard non-inverting amplifier configuration alters the feedback
factor or noise gain of the circuit. The closed-loop gain is unchanged, but the feedback available for error
correction is reduced by a factor of 101. This extends the measurement limit, including the effects of the
signal-source purity, by a factor of 101. Note that the input signal and load applied to the op amp are the same
as with conventional feedback without R3.
Validity of this technique can be verified by duplicating measurements at high gain and/or high frequency where
the distortion is within the measurement capability of the test equipment. Measurements for this data sheet were
made with the Audio Precision System One which greatly simplifies such repetitive measurements. The
measurement technique can, however, be performed with manual distortion measurement instruments.
R1
R2
SIG. DIST.
GAIN GAIN
R3
R1
R2
R3
101
∞
5kΩ
50Ω
10
101
500Ω
5kΩ
500Ω
100
101
50Ω
5kΩ
∞
1
12
VO = 10Vp−p
(3.5Vrms)
OPA2604
Generator
Output
Analyzer
Input
Audio Precision
System One
Analyzer*
RL
1kΩ
IBM PC
or
Compatible
* Measurement BW = 80kHz
Figure 22. Distortion Test Circuit
capacitive loads
The dynamic characteristics of the OPA2604 have been optimized for commonly encountered gains, loads and
operating conditions. The combination of low closed-loop gain and capacitive load will decrease the phase
margin and may lead to gain peaking or oscillations. Load capacitance reacts with the op amp’s open-loop
output resistance to form an additional pole in the feedback loop. Figure 23 shows various circuits which
preserve phase margin with capacitive load. Request Application Bulletin AB-028 for details of analysis
techniques and applications circuits.
For the unity-gain buffer, Figure a, stability is preserved by adding a phase-lead network, RC and CC. Voltage
drop across RC will reduce output voltage swing with heavy loads. An alternate circuit, Figure b, does not limit
the output with low load impedance. It provides a small amount of positive feed-back to reduce the net feedback
factor. Input impedance of this circuit falls at high frequency as op amp gain rolloff reduces the bootstrap action
on the compensation network.
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Figures c and d show compensation techniques for noninverting amplifiers. Like the follower circuits, the circuit
in Figure d eliminates voltage drop due to load current, but at the penalty of somewhat reduced input impedance
at high frequency.
Figures e and f show input lead compensation networks for inverting and difference amplifier configurations.
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(a)
(b)
CC
820pF
RC
12
12
eo
OPA2604
ei
750Ω
CL
5000pF
CC
0.47uF
CL
5000pF
CC =
eo
OPA2604
R2
RC
2kΩ
10Ω
ei
120 X 10−12 CL
RC =
CC =
R2
4CL X 1010 − 1
CL X 103
RC
(c)
(d)
R1
R2
R1
R2
10kΩ
10kΩ
2kΩ
2kΩ
CC
RC
20Ω
24pF
eo
OPA2604
ei
12
OPA2604
eo
ei
25Ω
CL
5000pF
50
CL
R2
CC =
CC
0.22uF
RC
12
RC =
CC =
CL
5000pF
R2
2CL X 1010 − (1 + R2/R1)
CL X 103
RC
(e)
(f)
R2
R1
R2
2kΩ
2kΩ
e1
2kΩ
R1
RC
20Ω
ei
12
2kΩ
12
eo
OPA2604
OPA2604
CC
0.22uF
RC
20Ω
CL
5000pF
CC
0.22uF
R3
R4
2kΩ
2kΩ
e2
RC =
R2
2CL X 1010 − (1 + R2/R1)
R2
RC =
CC =
CL X 103
RC
CC =
2CL X 1010 − (1 + R2/R1)
CL X 103
RC
Figure 23. Driving Large Capacitive Loads
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eo
CL
5000pF
SGLS209 − NOVEMBER 2003
noise performance
Op amp noise is described by two parameters − noise voltage and noise current. The voltage noise determines
the noise performance with low source impedance. Low noise bipolar-input op amps such as the OPA27 and
OPA37 provide very low voltage noise. But if source impedance is greater than a few thousand ohms, the current
noise of bipolar-input op amps react with the source impedance and will dominate. At a few thousand ohms
source impedance and above, the OPA2604 will generally provide lower noise.
power dissipation
The OPA2604 is capable of driving 600 Ω loads with power supply voltages up to ±24 V. Internal power
dissipation is increased when operating at high power supply voltage. The typical performance curve, Power
Dissipation vs Power Supply Voltage, shows quiescent dissipation (no signal or no load) as well as dissipation
with a worst case continuous sine wave. Continuous high-level music signals typically produce dissipation
significantly less than worst case sine waves.
Copper leadframe construction used in the OPA2604 improves heat dissipation compared to conventional
plastic packages. To achieve best heat dissipation, solder the device directly to the circuit board and use wide
circuit board traces.
output current limit
Output current is limited by internal circuitry to approximately ±40 mA at 25°C. The limit current decreases with
increasing temperature as shown in the typical curves.
R4
22kΩ
C3
R1
R2
R3
2.7kΩ
22kΩ
10kΩ
VIN
100pF
12
C1
3000pF
VO
OPA2604
C2
2000pF
fp = 20kHz
Figure 24. Three-Pole Low-Pass Filter
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12
R1
R5
VO
OPA2604
VIN
6.04kΩ
2kΩ
R2
4.02kΩ
C3
1000pF
R2
4.02kΩ
Low−pass
3−pole Butterworth
f−3dB = 40kHz
12
OPA2604
12
OPA2604
C1
1000pF
R4
5.36kΩ
See Application Bulletin AB−026
for information on GIC filters.
C2
1000pF
Figure 25. Three-Pole Generalized Immittance Converter (GIC) Low-Pass Filter
C1*
I−Out DAC
R1
C2
2200pF
2kΩ
12
R2
R3
COUT
2.94kΩ
21kΩ
OPA2604
C3
470pF
~
* C1 =
COUT
2π R1 fc
R1 = Feedback resistance = 2kΩ
fc = Crossover frequency = 8MHz
Figure 26. DAC I/V Amplifier and Low-Pass Filter
12
VO
OPA2604
12
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Low−pass
2−pole Butterworth
f−3dB = 20kHz
SGLS209 − NOVEMBER 2003
10kΩ
12
7.87kΩ
10kΩ
OPA2604
−
12
100pF
VIN
VO
G=1
OPA2604
+
12
7.87kΩ
100kHz Input Filter
OPA2604
10kΩ
10kΩ
Figure 27. Differential Amplifier with Low-Pass Filter
100Ω
10kΩ
COUT
* C1 ≈
2π Rf fc
Rf = Internal feedback resistance = 1.5kΩ
fc = Crossover frequency = 8MHz
G = 101
(40dB)
12
10
OPA2604
5
PCM63
20−bit
6
D/A
9
Converter
Piezoelectric
Transducer
1MΩ*
C1*
12
OPA2604
VO = ±3Vp
To low−pass
filter.
* Provides input bias
current return path.
Figure 29. Digital Audio DAC I-V Amplifier
Figure 28. High Impedance Amplifier
1/2 OPA2604
A2
I2
R4
1/2 OPA2604
R3
51Ω
51Ω
A1
VIN
IL = I1 + I2
R2
i1
VOUT
Load
R1
VOUT = VIN (1 + R2/R1)
Figure 30. Using the Dual OPA2604 Op Amp to Double the Output Current to a Load
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PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
OPA2604IDRQ1
OBSOLETE
SOIC
D
Pins Package Eco Plan (2)
Qty
8
TBD
Lead/Ball Finish
Call TI
MSL Peak Temp (3)
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF OPA2604-Q1 :
• Catalog: OPA2604
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 1
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