IDT IDT74FCT16260ETPAB Fast cmos 12-bit tri-port bus exchanger Datasheet

IDT54/74FCT16260AT/CT/ET
IDT54/74FCT162260AT/CT/ET
FAST CMOS
12-BIT TRI-PORT
BUS EXCHANGER
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
– VCC = 5V ±10%
• Features for FCT16260AT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
• Features for FCT162260AT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
The FCT16260AT/CT/ET and the FCT162260AT/CT/ET
Tri-Port Bus Exchangers are high-speed 12-bit latched bus
multiplexers/transceivers for use in high-speed microprocessor applications. These Bus Exchangers support memory
interleaving with latched outputs on the B ports and address
multiplexing with latched inputs on the B ports.
The Tri-Port Bus Exchanger has three 12-bit ports. Data
may be transferred between the A port and either/both of the
B ports. The latch enable (LE1B, LE2B, LEA1B and LEA2B)
inputs control data storage. When a latch-enable input is
HIGH, the latch is transparent. When a latch-enable input is
LOW, the data at the input is latched and remains latched until
the latch enable input is returned HIGH. Independent output
enables (OE1B and OE2B) allow reading from one port while
writing to the other port.
The FCT16260AT/CT/ET are ideally suited for driving high
capacitance loads and low impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162260AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times - reducing the need for external series terminating resistors.
FUNCTIONAL BLOCK DIAGRAM
OE1B
LEA1B
A-1B
LATCH
LE1B
1B-A
LATCH
12
1B1:12
12
12
12
SEL
OEA
A1:12
12
M1
U
X0
12
12
LE2B
2B-A
LATCH
LEA2B
A-2B
LATCH
12
12
2B1:12
OE2B
3032 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1996 Integrated Device Technology, Inc.
5.4
AUGUST 1996
DSC-3032/6
1
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
PIN CONFIGURATIONS
OEA
1
56
OE2B
OEA
1
56
OE2B
LE1B
2
55
LEA2B
LE1B
2
55
LEA2B
2B3
3
54
2B4
2B3
3
54
2B4
GND
4
53
GND
GND
4
53
GND
2B2
5
52
2B5
2B2
5
52
2B5
2B1
6
51
2B6
2B1
6
51
2B6
VCC
7
50
VCC
VCC
7
50
VCC
A1
8
49
2B7
A1
8
49
2B7
A2
9
48
2B8
A2
9
48
2B8
A3
10
47
2B9
A3
10
47
2B9
GND
11
46
GND
GND
11
46
GND
A4
12
45
2B10
A4
12
45
2B10
A5
13
44
2B11
A5
13
44
2B11
A6
2B12
A6
14
43
2B12
A7
14 SO56-1 43
SO56-2
15 SO56-3 42
1B12
A7
15
42
1B12
A8
16
41
1B11
A8
16
41
1B11
A9
17
40
1B10
A9
17
40
1B10
GND
18
39
GND
GND
18
39
GND
A10
19
38
1B9
A10
19
38
1B9
A11
20
37
1B8
A11
20
37
1B8
A12
21
36
1B7
A12
21
36
1B7
VCC
22
35
VCC
VCC
22
35
VCC
1B1
23
34
1B6
1B1
23
34
1B6
1B2
24
33
1B5
1B2
24
33
1B5
GND
25
32
GND
GND
25
32
GND
1B3
26
31
1B4
1B3
26
31
1B4
LE2B
27
30
LEA1B
LE2B
27
30
LEA1B
SEL
28
29
OE1B
SEL
28
29
OE1B
SSOP/
TSSOP/TVSOP
TOP VIEW
E56-1
CERPACK
TOP VIEW
3032 drw 02
5.4
3032 drw 03
2
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
PIN DESCRIPTION
Signal
A(1:12)
1B(1:12)
2B(1:12)
LEA1B
I/O
I/O
I/O
I/O
I
Description
Bidirectional Data Port A. Usually connected to the CPU's Address/Data bus.
Bidirectional Data Port 1B. Connected to the even path or even bank of memory.
Bidirectional Data Port 2B. Connected to the odd path or odd bank of memory.
Latch Enable Input for A-1B Latch. The Latch is open when LEA1B is HIGH. Data from the A-port is latched on
the HIGH to LOW transition of LEA1B.
LEA2B
I
Latch Enable Input for A-2B Latch. The Latch is open when LEA2B is HIGH. Data from the A-Port is latched on
the HIGH to LOW transition of LEA2B.
LE1B
I
Latch Enable Input for the 1B-A Latch. The Latch is open when LE1B is HIGH. Data from the 1B port is latched
on the HIGH to LOW transition of LE1B.
LE2B
I
Latch Enable Input for the 2B-A Latch. The Latch is open when LE2B is HIGH. Data from the 2B port is latched
on the HIGH to LOW transition of LE2B.
SEL
I
1B or 2B Path Selection. When HIGH, SEL enables data transfer from 1B Port to A Port. When LOW, SEL enables
data transfer from 2B Port to A Port.
I
Output Enable for A Port (Active LOW).
I
Output Enable for 1B Port (Active LOW).
I
Output Enable for 2B Port (Active LOW).
OEA
OE1B
OE2B
3032 tbl 01
(1)
(2)
FUNCTION TABLES
ABSOLUTE MAXIMUM RATINGS
Symbol
Description
Max.
VTERM(2) Terminal Voltage with Respect to –0.5 to +7.0
GND
VTERM(3) Terminal Voltage with Respect to
–0.5 to
GND
VCC +0.5
TSTG
Storage Temperature
–65 to +150
Unit
V
I OUT
DC Output Current
V
–60 to +120
2B
H
X
H
H
OEA
Output
A
X
L
H
L
X
H
H
X
L
L
°C
X
H
L
X
L
A(1)
mA
X
H
L
X
H
L
H
X
L
L
X
H
L
L
X
X
L
X
L
L
A(1)
X
X
X
X
X
H
Z
3032 tbl 04
Inputs
A
H
CAPACITANCE (TA = +25°C, F = 1.0MHZ)
Conditions
VIN = 0V
Typ.
3.5
Max.
6.0
Unit
pF
VOUT = 0V
3.5
8.0
pF
NOTE:
1. This parameter is measured at characterization but not tested.
LE2B
X
3032 tbl 02
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
Symbol
Parameter(1)
CIN
Input
Capacitance
CI/O
I/O
Capacitance
Inputs
SEL LE1B
1B
3032 tbl 03
LEA1B LEA2B
H
H
Outputs
OE1B OE2B
L
L
1B
2B
H
H
L
H
H
L
L
L
L
H
H
L
L
L
H
B(1)
L
H
L
L
L
L
B(1)
H
L
H
L
L
B(1)
H
L
L
L
H
L
L
B(1)
X
L
L
L
L
B(1)
B(1)
X
X
X
H
H
Z
Z
X
X
X
L
H
Active
Z
X
X
X
H
L
Z
Active
X
X
X
L
L
Active
Active
3032 tbl 05
NOTES:
1. Output level before the indicated steady-state input conditions were
established.
2. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
↑ = LOW-to-HIGH Transition
5.4
3
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
VIL
Input LOW Level
II H
Input HIGH Current (Input pins)(5)
Symbol
VIH
Min.
2.0
Typ.(2)
—
Max.
Guaranteed Logic LOW Level
—
—
0.8
V
VCC = Max.
—
—
±1
µA
—
—
±1
VI = GND
—
—
±1
—
—
±1
VO = 2.7V
—
—
±1
VO = 0.5V
—
—
±1
VI = VCC
Input HIGH Current (I/O pins)(5)
II L
Input LOW Current (Input
Input LOW Current (I/O
I OZH
pins)(5)
pins)(5)
High Impedance Output Current
VCC = Max.
pins) (5)
—
Unit
V
µA
I OZL
(3-State Output
VIK
Clamp Diode Voltage
VCC = Min., IIN = –18mA
—
–0.7
–1.2
V
I OS
Short Circuit Current
VCC = Max., VO = GND (3)
–80
–140
–225
mA
VH
Input Hysteresis
—
100
—
mV
I CCL
I CCH
I CCZ
Quiescent Power Supply Current
—
5
500
µA
—
VCC = Max., VIN = GND or VCC
3032 tbl 06
OUTPUT DRIVE CHARACTERISTICS FOR FCT16260T
Symbol
IO
Parameter
Output Drive Current
Test Conditions(1)
VCC = Max., VO = 2.5V(3)
Min.
–50
Typ.(2)
—
Max.
–180
Unit
mA
VOH
Output HIGH Voltage
VCC = Min.
2.5
3.5
—
V
2.4
3.5
—
V
2.0
3.0
—
V
—
0.2
0.55
V
—
—
±1
I OH = –3mA
VIN = VIH or V IL
VOL
Output LOW Voltage
I OFF
Input/Output Power Off Leakage(5)
VCC = Min.
VIN = VIH or V IL
VCC = 0V, VIN or V O
I OH = –12mA MIL.
I OH = –15mA COM'L.
I OH = –24mA MIL.
I OH = –32mA COM'L.(4)
I OL = 48mA MIL.
I OL = 64mA COM'L.
≤ 4.5V
µA
3032 tbl 07
OUTPUT DRIVE CHARACTERISTICS FOR FCT162260T
Symbol
I ODL
Parameter
Output LOW Current
Test Conditions(1)
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V (3)
Min.
60
Typ.(2)
115
Max.
200
Unit
mA
I ODH
Output HIGH Current
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3)
–60
–115
–200
mA
VOH
Output HIGH Voltage
2.4
3.3
—
V
VOL
Output LOW Voltage
VCC = Min.
VIN = VIH or V IL
VCC = Min.
VIN = VIH or V IL
—
0.3
0.55
V
I OH = –16mA MIL.
I OH = –24mA COM'L.
I OL = 16mA MIL.
I OL = 24mA COM'L.
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at TA = –55°C.
5.4
3032 lnk 08
4
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
ICCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current (4)
IC
Total Power Supply Current (6)
∆ICC
Test Conditions(1)
VCC = Max.
VIN = 3.4V(3)
VCC = Max.
Outputs Open
One Output Port Enabled
LExx = VCC
One Input Bit Toggling
One Output Bit Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
fi = 10MHz
50% Duty Cycle
One Output Port Enabled
LExx = VCC
One Input Bit Toggling
One Output Bit Toggling
VCC = Max.
Outputs Open
fi = 2.5MHz
50% Duty Cycle
One Output Port Enabled
LExx = VCC
Twelve Input Bits Toggling
Twelve Output Bits Toggling
Min.
—
Typ.(2)
0.5
Max.
1.5
Unit
VIN = VCC
VIN = GND
—
60
100
µA/
MHz
VIN = VCC
VIN = GND
—
0.6
1.5
mA
VIN = 3.4V
VIN = GND
—
0.9
2.3
VIN = VCC
VIN = GND
—
1.8
3.5 (5)
VIN = 3.4V
VIN = GND
—
4.8
12.5 (5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
5.4
mA
3032 tbl 09
5
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16260AT/162260AT
Com'l.
Symbol
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
tH
tW
Parameter
Propagation Delay
AX to 1BX or Ax to 2BX
Propagation Delay
1BX to AX or 2BX to AX
Propagation Delay
LEXB to AX
Propagation Delay
LEA1B to 1BX or
LEA2B to 2BX
Propagation Delay
SEL to AX
Output Enable Time
OEA to AX, OE1B to 1BX, or
OE2B to 2BX
Output Disable Time
OEA to AX, OE1B to 1BX, or
OE2B to 2BX
Set-Up Time, HIGH or LOW
Data to Latch
Hold Time, Latch to Data
Pulse Width, Latch
tSK(o) Output Skew (3)
HIGH(4)
Mil.
FCT16260CT/162260CT
Com'l.
Mil.
FCT16260ET/162260ET
Com'l.
Mil.
Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
C L = 50pF
R L = 500Ω
1.5
5.2
1.5
5.6
1.5
4.7
1.5
5.1
1.5
3.6
—
—
ns
1.5
5.6
1.5
5.9
1.5
5.0
1.5
5.4
1.5
3.6
—
—
ns
1.5
5.2
1.5
5.6
1.5
4.7
1.5
5.1
1.5
4.0
—
—
ns
1.5
4.7
1.5
5.2
1.5
4.4
1.5
4.8
1.5
4.0
—
—
ns
1.5
5.2
1.5
5.6
1.5
4.7
1.5
5.1
1.5
4.0
—
—
ns
1.5
5.7
1.5
6.1
1.5
5.1
1.5
5.4
1.5
4.4
—
—
ns
1.5
4.4
1.5
4.8
1.5
4.0
1.5
4.4
1.5
4.0
—
—
ns
1.5
—
1.5
—
1.0
—
1.0
—
1.0
—
—
—
ns
1.0
—
1.5
—
1.0
—
1.5
—
1.0
—
—
—
ns
3.0
—
3.0
—
3.0
—
3.0
—
3.0
—
—
—
ns
—
0.5
—
0.5
—
0.5
—
0.5
—
0.5
—
—
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This parameter is guaranteed but not tested.
5.4
3032 tbl 10
6
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
V CC
7.0V
Closed
Open
3032 lnk 11
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
D.U.T.
50pF
RT
Open Drain
Disable Low
All Other Tests
V OUT
Pulse
Generator
Switch
Enable Low
500Ω
VIN
Test
500Ω
CL
3032 lnk 04
SET-UP, HOLD AND RELEASE TIMES
DATA
INPUT
tH
tSU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tREM
tSU
PULSE WIDTH
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
1.5V
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
3V
1.5V
0V
tH
3032 lnk 06
3032 lnk 05
ENABLE AND DISABLE TIMES
PROPAGATION DELAY
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
DISABLE
3V
CONTROL
INPUT
tPLZ
tPZL
VOH
1.5V
VOL
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
SWITCH
CLOSED
3.5V
1.5V
tPZH
OUTPUT
NORMALLY
HIGH
3032 lnk 07
SWITCH
OPEN
1.5V
0V
3.5V
0.3V
VOL
tPHZ
0.3V
1.5V
0V
VOH
0V
3032 lnk 08
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
5.4
7
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
ORDERING INFORMATION
IDT
FCT XXXX
X
Device
Temperature
Type
Range
X
Package
X
Process
Blank
B
PV
PA
PF
E
Commercial
MIL-STD-883, Class B
Shrink Small Outline Package (SO56-1)
Thin Shrink Small Outline Package (SO56-2)
Thin Very Small Outline Package (SO56-3)
CERPACK (E56-1)
16260AT 12-Bit Tri-Port Bus Exchanger
16260CT
16260ET
162260AT
162260CT
162260ET
54
74
-55°C to +125°C
-40°C to +85°C
3032 drw 09
5.4
8
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