IXYS MXEI2300XB 300-output epaper gate driver Datasheet

MXEI2300
300-Output ePaper Gate Driver
INTEGRATED CIRCUITS DIVISION
Features
Description
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The MXEI2300 is a 300-bit serial shift register, level
translator, and high voltage buffered driver. The shift
register is seeded by the CE1, CE2, R/L, SPV, and
CKV inputs.
CMOS Technology
Drives Segment or Active Matrix Displays
16V to 47V Output Drive (VDD to VEE)
Selectable Output Shift Direction and Polarity
3 Output Switching Modes
Cascadable (4 Maximum)
The output pulse pattern is selected with the MODE1
and MODE2 inputs. A one-pulse, continuous
two-pulse, jumping two-pulse, or no-pulse pattern can
be generated. Pulse polarity is selected with the
WALK0 input.
Applications
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eBooks / eReaders
Electronic Shelf Labels / Point Of Purchase Displays
Mobile Phones / Portable Hand Held Devices
Smart Cards
Signage
The register output bits are amplified rail-rail from VEE
to VDD , and the output strength of the buffer drivers is
modulated by the VBIAS generator. This allows the
OGn outputs to be continuously optimized for peak
performance while minimizing transients over a wide
operating range.
Ordering Information
Part
Description
MXEI2300WB
Gold Bumped Die / Wafer Form
MXEI2300XB
Gold Bumped Die / Waffle Pack
The MXEI2300 is designed to operate over a
temperature range of -40°C to +85°C, and is available
as Gold Bumped Die in Wafer Form or Waffle Pack.
Figure 1. Functional Block Diagram
WALK0
TEST1
Shift register/pulse generator
MODE2
CE1
CE2
level translators
MODE1
controller
R/L
bit1
bit2
...
bit300
SPV
CKV
VBIAS
generator
LS/amp
LS/amp
buffer/
driver
buffer/
driver
Vdd
Vdd
...
...
LS/amp
buffer/
driver
Vdd
ESD
diodes
Vee
Vee
OG1
PB-MXEI2300-January 21, 2014
www.ixysic.com
Vee
OG2
OG300
1
MXEI2300
INTEGRATED CIRCUITS DIVISION
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Specification: PB-MXEI2300-January 21, 2014
©Copyright 2014, IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
1/21/2014
January 21, 2014
www.ixysic.com
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