LM3503 www.ti.com SNVS329D – JULY 2005 – REVISED AUGUST 2006 LM3503 Dual-Display Constant Current LED Driver with Analog Brightness Control Check for Samples: LM3503 FEATURES 1 • 2 • • • • • • • • Drives up to 4, 6, 8 or 10 White LEDs for Dual Display Backlighting >80% Peak Efficiency Output Voltage Protection Options: 16V, 25V, 35V & 44V Input Under-Voltage Protection Internal Soft Start Eliminates Inrush Current 1 MHz Constant Switching Frequency Analog Brightness Control Wide Input Voltage Range: 2.5V to 5.5V Low Profile Packages: <1 mm Height – 10 Bump DSBGA – 16 Pin WQFN APPLICATIONS • • Dual Display Backlighting in Portable devices Cellular Phones and PDAs DESCRIPTION The LM3503 is a white LED driver for lighting applications. For dual display backlighting applications, the LM3503 provides a complete solution. The LM3503 contains two internal white LED current bypass FET (Field Effect Transistor) switches. The white LED current can be adjusted with a DC voltage from a digital to analog converter or RC filtered PWM (pulse-width-modulated) signal at the Cntrl pin. With no external compensation, cycle-by-cycle current limit, output over-voltage protection, input under-voltage protection, and dynamic white LED current control capability, the LM3503 offers superior performance over other step-up white LED drivers. Typical Application L 22 PH D MAIN: 2 to 5 LEDs Sw CIN + VSUPPLY 4.7 PF VOUT1 VIN VOUT2 Cntrl COUT - LM3503-44 En1 1 PF Fb En2 AGND PGND SUB: 2 to 5 LEDs Logic Voltage Signal Inputs R1 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2006, Texas Instruments Incorporated LM3503 SNVS329D – JULY 2005 – REVISED AUGUST 2006 www.ti.com Connection Diagram 4 A2 A1 3 2 1 A3 B1 B3 C1 C3 D1 D3 5 16 6 15 7 14 8 13 9 10 11 12 D2 Figure 1. 10-Bump Thin DSBGA Package (YPA0010) (Top View) Figure 2. 16-Lead Thin WQFN Package (RGH0016A) (Top View) PIN DESCRIPTIONS Bump # Pin # Name A1 9 Cntrl Description B1 7 Fb C1 6 VOUT2 Drain Connections of the NMOS and PMOS Field Effect Transistor (FET) Switches (Figure 3: N2 and P1). Connect 100nF at VOUT2 node if VOUT2 is not used D1 4 VOUT1 Over-Voltage Protection (OVP) and Source Connection of the PMOS FET Switch (Figure 3: P1) D2 2 and 3 Sw D3 15 and 16 Pgnd Power Ground Connection C3 14 Agnd Analog Ground Connection B3 13 VIN Input Voltage Connection A3 12 En2 NMOS FET Switch Control Connection A2 10 En1 PMOS FET Switch Control Connection 1 NC No Connection 5 NC No Connection 8 NC No Connection 11 NC No Connection DAP DAP White LED Current Control Connection Feedback Voltage Connection Drain Connection of the Power NMOS Switch (Figure 3: N1) Die Attach Pad (DAP), to be soldered to the printed circuit board’s ground plane for enhanced thermal dissipation. Cntrl (Bump A1): White LED current control pin. Use this pin to control the feedback voltage with an external DC voltage. Fb (Bump B1):Output voltage feedback connection. VOUT2 (Bump C1):Drain connections of the internal PMOS and NMOS FET switches (Figure 3: P1 and N2). It is recommended to connect 100nF at VOUT2 if VOUT2 is not used for LM3503-35V & LM3503-44V versions. VOUT1(Bump D1): Source connection of the internal PMOS FET switch (Figure 3: P1) and OVP sensing node. The output capacitor must be connected as close to the device as possible, between the VOUT1 pin and ground plane. Also connect the Schottky diode as close as possible to the VOUT1 pin to minimize trace resistance and EMI radiation. Sw (Bump D2): Drain connection of the internal power NMOS FET switch (Figure 3: N1). Minimize the metal trace length and maximize the metal trace width connected to this pin to reduce EMI radiation and trace resistance. Pgnd (Bump D3): Power ground pin. Connect directly to the ground plane. Agnd (Bump C3):Analog ground pin. Connect the analog ground pin directly to the Pgnd pin. 2 Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 LM3503 www.ti.com SNVS329D – JULY 2005 – REVISED AUGUST 2006 VIN (Bump B3): Input voltage connection pin. The CIN capacitor should be as close to the device as possible, between the VIN pin and ground plane. En2 (Bump A3): Enable pin for the internal NMOS FET switch (Figure 3: N2) during device operation. When VEn2 is ≥ 1.4V, the internal NMOS FET switch turns off and the SUB display is turned on. The En2 pin has an internal pull down circuit, thus the internal NMOS FET switch is normally in the on state of operation with the SUB display turned off. When VEn2 is ≤ 0.3V, the internal NMOS FET switch turns on and the SUB display is turned off. If both VEn1 and VEn2 are ≤ 0.3V the LM3503 will shutdown. If VOUT2 is not used, En2 must be floating or grounded and En1 used to enable the device. En1 (Bump A2): Enable pin for the internal PMOS FET switch (Figure 3: P1) during device operation. When VEn1 is ≤ 0.3V, the internal PMOS FET switch turns on and the MAIN display is turned off. When VEn1 is ≥ 1.4V, the internal PMOS FET switch turns off and the MAIN display is turned on. If both VEn1 and VEn2 are ≤ 0.3V the LM3503 will shutdown. The En1 pin has an internal pull down circuit, thus the internal PMOS FET switch is normally in the on state of operation with the MAIN display turned off. If VOUT2 is not used, En2 must be grounded and En1 use to enable the device. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) −0.3V to +5.5V VIN Pin Sw Pin −0.3V to +48V Fb Pin −0.3V to +5.5V Cntrl Pin −0.3V to +5.5V VOUT1Pin −0.3V to +48V VOUT2 Pin −0.3V to VOUT1 En1 −0.3V to +5.5V −0.3V to +5.5V En2 Continuous Power Dissipation Internally Limited Maximum Junction Temperature (TJ-MAX) +150°C −65°C to +150°C Storage Temperature Range ESD Rating (3) Human Body Model 2 kV Machine Model (1) (2) (3) 200V Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical characteristic specifications do not apply when operating the device outside of its rated operating conditions. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. Operating Conditions (1) (2) Junction Temperature (TJ) Range −40°C to +125°C Ambient Temperature (TA) Range −40°C to +85°C Supply Voltage, VIN Pin 2.5V to 5.5V En1 and En2 Pins 0V to 5.5V Cntrl Pin 0V to 3.5V (1) (2) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical characteristic specifications do not apply when operating the device outside of its rated operating conditions. All voltages are with respect to the potential at the GND pin. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 3 LM3503 SNVS329D – JULY 2005 – REVISED AUGUST 2006 www.ti.com Thermal Properties (3) Junction-to-Ambient Thermal Resistance (θJA) DSBGA Package 65°C/W WQFN Package 49°C/W (3) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJA, and the ambient temperature, TA. See Thermal Properties for the thermal resistance. The maximum allowable power dissipation at any ambient temperature is calculated using: PD(MAX) = (TJ(MAX)–TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature. For more information on this topic, please refer to Application Note 1187(An1187): Leadless Leadframe Package (LLP) and Application Note 1112(AN1112) for DSBGA chip scale package. Electrical Characteristics (1) (2) Limits in standard typeface are for TJ = +25°C. Limits in bold typeface apply over the full operating junction temperature range (−40°C ≤ TJ ≤ +125°C). Unless otherwise specified,VIN = 2.5V. Symbol Parameter Conditions VIN Input Voltage IQ Non-Switching Switching Shutdown Cntrl = 1.6V Fb = 0V, Sw Is Floating En1 = En2 = 0V VFb Feedback Voltage Cntrl = 3.5V ICL NMOS Power Switch Current Limit 16, Fb = 0V 25, Fb = 0V 35, Fb = 0V 44,FB = 0V IFb Feedback Pin Output Bias Current Fb = 0.25V, Cntrl = 1.6V FS Switching Frequency RDS(ON) NMOS Power Switch ON ISw = 500 mA (3) Resistance (Figure 3: N1) RPDS(ON) Min IPMOS = 20 mA, En1 = 0V, En2 = 1.5V NMOS ON Resistance Of VOUT2/Fb Switch (Figure 3: N2) INMOS = 20 mA, En1 = 1.5V, En2 = 0V DMAX Maximum Duty Cycle Fb = 0V ISw Sw Pin Leakage Current (4) Sw = 42V, En1 = En2 =0V IVOUT1(OFF) VOUT1 Pin Leakage Current (4) VOUT1 = 14V, VOUT1 = 23V, VOUT1 = 32V, VOUT1 = 42V, VOUT1 Pin Bias Current (4) VOUT1 = 14V, VOUT1 = 23V, VOUT1 = 32V, VOUT1 = 42V, IVOUT2 VOUT2Pin Leakage Current (4) Fb = En1 = En2 = 0V, VOUT2 = VOUT1 = 42V UVP Under-Voltage Protection On Threshold Off Threshold IVOUT1(ON) (1) (2) (3) (4) 4 Max Units 5.5 V 0.5 1.9 0.1 1 3 3 mA mA µA 0.5 0.55 0.6 V 250 400 450 450 400 600 750 750 650 800 1050 1050 mA 64 500 nA 1 1.2 MHz 0.55 1.1 Ω 5 10 Ω 2.5 5 Ω 0.8 PMOS ON Resistance Of VOUT1/VOUT2 Switch (Figure 3: P1) RNDS(ON) Typ 2.5 90 95 % 0.01 5 µA En1 = En2 = 0V (16) En1 = En2 = 0V (25) En1 = En2 = 0V (35) En1 = En2 = 0V (44) 0.1 0.1 0.1 0.1 3 3 3 3 µA En1 = En1 = 1.5V En1 = En2 = 1.5V En1 = En2 = 1.5V En1 = En2 = 1.5V 40 50 50 85 80 100 100 140 µA 0.1 3 µA 2.4 2.3 2.5 (16) (25) (35) (44) 2.2 V All voltages are with respect to the potential at the GND pin. Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. NMOS Power On Resistance measured at ISW= 250mA for sixteen voltage version. Current flows into the pin. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 LM3503 www.ti.com SNVS329D – JULY 2005 – REVISED AUGUST 2006 Electrical Characteristics(1)(2) (continued) Limits in standard typeface are for TJ = +25°C. Limits in bold typeface apply over the full operating junction temperature range (−40°C ≤ TJ ≤ +125°C). Unless otherwise specified,VIN = 2.5V. Symbol OVP VEn1 Parameter Over-Voltage Protection (5) Conditions On Threshold (16) Off Threshold (16) On Threshold (25) F Off Threshold (25) On Threshold (35) Off Threshold (35) On Threshold (44) Off Threshold (44) Min Typ Max Units 14.5 14.0 22.5 21.5 32.0 31.0 40.5 39.0 15.5 15 24 23 34 33 42 41 16.5 16.0 25.5 24.5 35.0 34.0 43.5 42.0 V 0.8 0.3 PMOS FET Switch and Device Enabling Threshold (Figure 3: P1) Off Threshold NMOS FET Switch and Device Enabling Threshold (Figure 3: N2) Off Threshold On Threshold 1.4 VCntrl VCntrl Range VIN = 3.6V 0.2 IEn1 En1 Pin Bias Current (6) En1 = 2.5V En1 = 0V 7 0.1 14 IEn2 En2 Pin Bias Current (6) En2 = 2.5V En2 = 0V 7 0.1 14 ICNTRL Cntrl Pin Bias Current (6) Cntrl = 2.5V 8 14 VEn2 (5) (6) On Threshold 1.4 V 0.8 0.8 0.3 V 0.8 3.5 V µA µA µA The on threshold indicates that the LM3503 is no longer switching or regulating LED current, while the off threshold indicates normal operation. Current flows into the pin. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 5 LM3503 SNVS329D – JULY 2005 – REVISED AUGUST 2006 www.ti.com Block Diagram 13 VIN Sw 2,3 Soft Start Thermal Shutdown OVP Comparator Current Limit + UVP Reference Light Load Reference Error Amplifier Fb VOUT1 + - UVP Comparator 4 OVP Reference + - Light Load Comparator Current Sense PWM Comparator + + P1 N1 Driver Logic VOUT2 N2 9 Cntrl 6 Oscillator FET Logic + - Duty Limit Comparator Duty Limit Reference 7 14 15,16 10 AGND PGND En1 En2 Fb 12 Figure 3. Block Diagram Detailed Description of Operation The LM3503 utilizes an asynchronous current mode pulse-width-modulation (PWM) control scheme to regulate the feedback voltage over specified load conditions. The DC/DC converter behaves as a controlled current source for white LED applications. The operation can best be understood by referring to the block diagram in Figure 3 for the following operational explanation. At the start of each cycle, the oscillator sets the driver logic and turns on the internal NMOS power device, N1, conducting current through the inductor and reverse biasing the external diode. The white LED current is supplied by the output capacitor when the internal NMOS power device, N1, is turned on. The sum of the error amplifier’s output voltage and an internal voltage ramp are compared with the sensed power NMOS, N1, switch voltage. Once these voltages are equal, the PWM comparator will then reset the driver logic, thus turning off the internal NMOS power device, N1, and forward biasing the external diode. The inductor current then flows through the diode to the white LED load and output capacitor. The inductor current recharges the output capacitor and supplies the current for the white LED load. The oscillator then sets the driver logic again repeating the process. The output voltage of the error amplifier controls the current through the inductor. This voltage will increase for larger loads and decrease for smaller loads limiting the peak current in the inductor and minimizing EMI radiation. The duty limit comparator is always operational, it prevents the internal NMOS power switch, N1, from being on for more than one oscillator cycle and conducting large amounts of current. The light load comparator allows the LM3503 to properly regulate light/small white LED load currents, where regulation becomes difficult for the LM3503’s primary control loop. Under light load conditions, the LM3503 will enter into a pulse skipping pulse-frequency-mode (PFM) of operation where the operational frequency will vary with the load. As a result of PFM mode operation, the output voltage ripple magnitude will significantly increase. 6 Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 LM3503 www.ti.com SNVS329D – JULY 2005 – REVISED AUGUST 2006 The LM3503 has two control pins, En1 and En2, used for selecting which segment of a single white LED string network is active for dual display applications. En1 controls the main display (MAIN) segment of the single string white LED network between pins VOUT1 and VOUT2. En2 controls the sub display (SUB) segment of the single string white LED network between the VOUT2 and Fb. If both VEn1 and VEn2 are ≤ 0.3V, the LM3503 will shutdown, for further description of the En1 and En2 operation, see Figure 33. During shutdown the output capacitor discharges through the string of white LEDs and feedback resistor to ground. The LED current can be dynamically controlled by a DC voltage on the Cntrl pin. When VCntrl = 0V the white LED current may not be equal to zero because of offsets within the LM3503 internal circuitry. To guarantee zero white LED current the LM3503 must be in shutdown mode operation. The LM3503 has dedicated protection circuitry active during normal operation to protect the integrated circuit (IC) and external components. Soft start circuitry is present in the LM3503 to allow for slowly increasing the current limit to its steady-state value to prevent undesired high inrush current during start up. Thermal shutdown circuitry turns off the internal NMOS power device, N1, when the internal semiconductor junction temperature reaches excessive levels. The LM3503 has a under-voltage protection (UVP) comparator that disables the internal NMOS power device when battery voltages are too low, thus preventing an on state where the internal NMOS power device conducts large amounts of current. The over-voltage protection (OVP) comparator prevents the output voltage from increasing beyond the protection limit when the white LED string network is removed or if there is a white LED failure. OVP allows for the use of low profile ceramic capacitors at the output. The current through the internal NMOS power device, N1, is monitored to prevent peak inductor currents from damaging the IC. If during a cycle (cycle=1/switching frequency) the peak inductor current exceeds the current limit for the LM3503, the internal NMOS power device will be turned off for the remaining duration of that cycle. En1 En2 Result (See Figure 1 and Figure 2) 0.3V 0.3V [P1ÆOFF N2ÆOFF N1ÆOFF] or [MAINÆOFF SUBÆOFF N1ÆOFF] 1.4V 0.3V [P1ÆOFF N2ÆON N1ÆSwitching] or [MAINÆON SUBÆOFF N1ÆSwitching] 0.3V 1.4V [P1ÆON N2ÆOFF N1ÆSwitching] or [MAINÆOFF SUBÆON N1ÆSwitching] 1.4V 1.4V [P1ÆOFF N2ÆOFF N1ÆSwitching] or [MAINÆON SUBÆON N1ÆSwitching] Shutdown X Figure 4. Operational Characteristics Table Typical Performance Characteristics (See Typical Application Circuit :e L=DO1608C-223 and D=B150-13. Efficiency: η = POUT/ PIN = [(VOUT – VFb ) * IOUT] / [VIN * IIN]. TA = +25°C, unless otherwise stated.) Switching Frequency vs Temperature 0.600 1.03 0.580 1.02 -40oC 0.560 0.540 25oC 0.520 125oC 0.500 0.480 0.460 1.00 0.99 0.98 0.97 0.96 0.440 0.95 0.420 0.94 0.400 2.5 3.0 3.5 4.0 VIN = 2.5V 1.01 FREQUENCY (MHz) NON-SWITCHING IQ (mA) IQ (Non-Switching) vs VIN 4.5 5.0 5.5 INPUT VOLTAGE (V) 0.93 -40 -20 0 20 40 60 80 100 120 -30 -10 10 30 50 70 90 110 130 TEMPERATURE (oC) Figure 5. Figure 6. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 7 LM3503 SNVS329D – JULY 2005 – REVISED AUGUST 2006 www.ti.com Typical Performance Characteristics (continued) (See Typical Application Circuit :e L=DO1608C-223 and D=B150-13. Efficiency: η = POUT/ PIN = [(VOUT – VFb ) * IOUT] / [VIN * IIN]. TA = +25°C, unless otherwise stated.) IQ (Switching) vs VIN IQ (Switching) vs Temperature 1.95 4.00 VIN = 2.5V SWITCHING IQ (mA) SWITCHING IQ (mA) 3.50 -40oC 3.00 125oC 25oC 2.50 1.90 1.85 1.80 2.00 1.50 2.5 3.0 3.5 4.0 4.5 5.0 1.75 -40 -20 0 20 40 60 80 100 120 -30 -10 10 30 50 70 90 110 130 5.5 INPUT VOLTAGE (V) TEMPERATURE (oC) Figure 7. Figure 8. 10 LED Efficiency vs LED Current 8 LED Efficiency vs LED Current 90 90 VIN = 5.5V VIN = 5.5V 80 80 EFFICIENCY (%) EFFICIENCY (%) 70 60 VIN = 4.2V 50 VIN = 3.3V 40 VIN = 3V 30 70 VIN = 4.2V 60 VIN = 3V 50 VIN = 3.3V 40 30 20 VIN = 2.7V VIN = 2.7V 10 20 0 2 4 6 8 10 12 14 16 18 20 0 2 4 LED CURRENT (mA) 6 8 10 12 14 16 18 20 LED CURRENT (mA) Figure 9. Figure 10. 6 LED Efficiency vs LED Current 4 LED Efficiency vs LED Current 100 90 VIN = 5.5V VIN = 4.2V VIN = 5.5V 90 80 EFFICIENCY (%) EFFICIENCY (%) 80 70 VIN = 4.2V 60 VIN = 3.3V 50 VIN = 3V 40 VIN = 3.3V 60 VIN = 3V 50 40 VIN = 2.7V 30 VIN = 2.7V 30 20 10 20 0 2 4 6 8 0 10 12 14 16 18 20 2 4 6 8 10 12 14 16 18 20 LED CURRENT (mA) LED CURRENT (mA) Figure 11. 8 70 Figure 12. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 LM3503 www.ti.com SNVS329D – JULY 2005 – REVISED AUGUST 2006 Typical Performance Characteristics (continued) (See Typical Application Circuit :e L=DO1608C-223 and D=B150-13. Efficiency: η = POUT/ PIN = [(VOUT – VFb ) * IOUT] / [VIN * IIN]. TA = +25°C, unless otherwise stated.) Cntrl Pin Current vs Cntrl Pin Voltage Maximum Duty Cycle vs Temperature 14 98 VIN = 2.5 MAX DUTY CYCLE (%) CNTRL PIN CURRENT (PA) 12 10 -40oC 8 25oC 6 125oC 4 97 96 95 2 0 0.0 0.5 1.0 1.5 2.0 2.5 94 -40 -20 0 20 40 60 80 100 120 -30 -10 10 30 50 70 90 110 130 3.0 CNTRL PIN VOLTAGE (V) TEMPERATURE (oC) Figure 13. Figure 14. En1 Pin Current vs En1 Pin Voltage En2 Pin Current vs En2 Pin Voltage 30 18 16 EN2 PIN CURRENT (PA) EN1 PIN CURRENT (PA) 25 -40oC 20 15 25oC 10 125oC 14 -40oC 12 25oC 10 8 125oC 6 4 5 2 0 0.0 1.0 3.0 4.0 5.0 1.0 2.0 3.0 4.0 5.0 EN1 PIN VOLTAGE (V) EN2 PIN VOLTAGE (V) Figure 15. Figure 16. VOUT1 Pin Current vs VOUT1Pin Voltage Power NMOS RDS(ON) (Figure 3: N1) vs VIN 1000 INMOS = 400 mA 140 POWER NMOS RDS(ON) (m:) VOUT1 PIN BIAS CURRENT (PA) 160 2.0 0 0.0 120 -40oC 100 25oC 80 60 125oC 40 20 8 16 24 32 40 48 VOUT1 PIN VOLTAGE (V) 125oC 800 700 600 25oC 500 -40oC 400 300 2.5 0 0 900 3.0 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V) Figure 17. Figure 18. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 9 LM3503 SNVS329D – JULY 2005 – REVISED AUGUST 2006 www.ti.com Typical Performance Characteristics (continued) (See Typical Application Circuit :e L=DO1608C-223 and D=B150-13. Efficiency: η = POUT/ PIN = [(VOUT – VFb ) * IOUT] / [VIN * IIN]. TA = +25°C, unless otherwise stated.) 3.50 NMOS RDS(ON) (Figure 3: N2) vs VIN PMOS RDS(ON) (Figure 3: P1) vs VIN 10 INMOS = 20 mA IPMOS = 20 mA PMOS SWITCH RDS(ON) (:) NMOS SWITCH RDS(ON) (:) 3.00 125oC 2.50 2.00 25oC 1.50 o -40 C 1.00 0.50 0.00 2.5 9 8 125oC 7 6 25oC 5 -40oC 4 3.0 3.5 4.0 4.5 5.0 3 2.0 5.5 12.0 0.28 Feedback Voltage vs Cntrl Pin Voltage Current Limit (LM3503-16) vs Temperature 440 -16 CURRENT LIMIT (mA) FEEDBACK VOLTAGE (V) 420 VIN = 5.5V 0.16 0.12 VIN = 2.7V 0.08 VIN = 2.5V 400 VIN = 5.5V 380 360 VIN = 7.0V 340 0.04 0.00 0.3 0.5 0.7 0.9 1.1 1.3 320 -40 -25 -10 1.5 20 35 50 65 Figure 22. Current Limit (LM3503-16) vs VIN Current Limit (LM3503-25) vs Temperature 620 600 -25 CURRENT LIMIT (mA) 440 T = 85oC 420 400 80 TEMPERATURE ( C) Figure 21. 460 -16 CURRENT LIMIT (mA) 5 o CNTRL VOLTAGE (V) T = 25oC 380 360 T = -40oC 340 VIN = 2.5V 580 560 VIN = 5.5V 540 520 500 VIN = 7.0V 480 460 440 3.0 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V) 420 -40 -25 -10 5 20 35 50 65 80 TEMPERATURE (oC) Figure 23. 10 42.0 Figure 20. 0.20 320 2.5 32.0 Figure 19. 0.24 480 22.0 VOUT1 PIN VOLTAGE (V) INPUT VOLTAGE (V) Figure 24. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 LM3503 www.ti.com SNVS329D – JULY 2005 – REVISED AUGUST 2006 Typical Performance Characteristics (continued) (See Typical Application Circuit :e L=DO1608C-223 and D=B150-13. Efficiency: η = POUT/ PIN = [(VOUT – VFb ) * IOUT] / [VIN * IIN]. TA = +25°C, unless otherwise stated.) Current Limit (LM3503-25) vs VIN Current Limit (LM3503-35/44) vs Temperature 780 620 T = 85oC 770 -35/44 CURRENT LIMIT (mA) -25 CURRENT LIMIT (mA) 600 580 T = 25oC 560 540 520 500 T = -40oC 480 VIN = 7.0V 760 750 740 730 720 VIN = 2.5V 710 460 700 440 2.5 690 -40 -25 -10 3.0 3.5 4.0 4.5 5.0 5.5 5 20 35 50 65 80 TEMPERATURE (oC) INPUT VOLTAGE (V) Figure 25. Figure 26. Current Limit (LM3503-35/44) vs VIN Feedback Voltage (VCntrl = 0.8V) vs Temp 780 0.127 770 0.126 760 FEEDBACK VOLTAGE (V) CURRENT LIMIT (mA) CNTRL = 0.8V 85oC 750 740 25oC -40oC 730 720 710 VIN = 5.5V 0.123 0.122 VIN = 2.7V 0.121 0.120 700 690 2.5 0.125 0.124 3.0 3.5 4.0 4.5 5.0 5.5 0.119 -40 -20 -30 INPUT VOLTAGE (V) 0 -10 20 10 40 30 60 50 80 70 TEMPERATURE (oC) Figure 27. Figure 28. Feedback Voltage (VCntrl = 1.6V) vs Temp VIN = 3.6V at 15mA & 4 Leds 0.257 CNTRL = 1.6V FEEDBACK VOLTAGE (V) 0.256 0.255 VIN = 5.5V 0.254 0.253 0.252 0.251 VIN = 2.7V 0.250 0.249 -40 -20 -30 0 -10 20 10 40 30 60 50 80 70 TEMPERATURE (oC) Figure 29. Figure 30. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 11 LM3503 SNVS329D – JULY 2005 – REVISED AUGUST 2006 www.ti.com Typical Performance Characteristics (continued) (See Typical Application Circuit :e L=DO1608C-223 and D=B150-13. Efficiency: η = POUT/ PIN = [(VOUT – VFb ) * IOUT] / [VIN * IIN]. TA = +25°C, unless otherwise stated.) Dimming Duty Cycle vs LED Current VIN=3.6V, 2LEDs on Main & Sub Display VIN = 3.6V at 15mA & 2 Leds 40.00 LED CURRENT (mA) 35.00 30.00 50 kHz 25.00 10 kHz 20.00 1 kHz 500 Hz 15.00 10.00 200 Hz 5.00 0.00 10 20 30 40 50 60 70 80 90 DUTY CYCLE (%) Figure 31. 12 Figure 32. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 LM3503 www.ti.com SNVS329D – JULY 2005 – REVISED AUGUST 2006 APPLICATION INFORMATION WHITE LED CURRENT SETTING The white LED current is controlled by a DC voltage at the Cntrl pin. The relationship between the Cntrl pin voltage and Fb pin voltage can be computed with the following: VFB = (0.156) x (VCntrl) • • VCntrl: Cntrl Pin Voltage. Voltage Range: 0.2V ≤ VCntrl ≤ 3.5V. VFb: Feedback Pin Voltage. (1) LED CURRENT The LED current is set using the following equation: ILED = VFb R1 (2) To determine the maximum output current capability of the device, it is best to estimate using equations on page 16 and the minimum peak current limit of the device (see electrical table). Note the current capability will be higher with less LEDs in the application. WHITE LED DIMMING PWM Signal Sw VOUT1 VIN X R Y C Cntrl VOUT2 LM3503 En1 Fb En2 AGND PGND R1 Figure 33. If VOUT2 is not used, En2 must be grounded Aside from varying the DC voltage at the Cntrl pin, white LED dimming can be accomplished through the RC filtering of a PWM signal. The PWM signal frequency should be at least a decade greater than the RC filter bandwidth. WHITE LED DIMMING is how the LM3503 should be wired for PWM filtered white LED dimming functionality. When using PWM dimming, it is recommended to add 1-2ms delay between the Cntrl signal and the main Enable sginal (En1) to allow time for the output to discharge. This will prevent potential flickering especially if the Sub display is compose of 2 LEDs or less. The equations below are guidelines for choosing the correct RC filter values in relation to the PWM signal frequency. Equation: FRC = 1 2xSxRxC (3) Equation: FPWM > 10 x FRC (4) Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 13 LM3503 SNVS329D – JULY 2005 – REVISED AUGUST 2006 FRC: www.ti.com RC Filter Bandwidth Cutoff Frequency. FPWM: PWM Signal Frequency. R: Chosen Filter Resistor. C: Chosen Filter Capacitor. For example, using the above equations to determine the proper RC values. Assume the following condition:VIN= 3.6V, C=0.01µF and FPWM = 500Hz, then FRC= 50Hz by relation to equation 2. By rearranging equation 1 to solve for R; R = 318.5K ohms (standard value, R = 316K). PWM Dimming Duty Cycle vs. LED Current The results are based on the 2LEDs on Main display and 2LEDs on Sub display Duty 200Hz 500Hz 1KHz 10KHz 50KHz 100kHz (%) R = 787k ohms R =316k ohms R = 158kohms R=16.2k ohms R=3.16k ohms R=1.62k ohms 10 0.78mA 1.59mA 2.23mA 3.42mA 3.58mA 3.61mA 20 1.85mA 3.46mA 4.78mA 7.09mA 7.41mA 7.48mA 30 2.88mA 5.35mA 7.33mA 10.77mA 11.25mA 11.34mA 40 3.96mA 7.24mA 9.88mA 14.48mA 15.12mA 15.24mA 50 5.05mA 9.12mA 12.45mA 19.1mA 19.06mA 19.16mA 60 6.08mA 11.03mA 15.03mA 21.86mA 22.98mA 23.10mA 70 7.13mA 12.94mA 17.61mA 25.71mA 26.9mA 27.05mA 80 8.17mA 14.83mA 20.20mA 29.53mA 30.83mA 31.00mA 90 9.24mA 16.73mA 22.79mA 33.32mA 34.78mA 35.00mA Inductor Current tON = DTS (Vin - Vout)/L Vin/L IL (avg) 'iL Time TS Figure 34. Inductor Current Waveform CONTINUOUS AND DISCONTINUOUS MODES OF OPERATION Since the LM3503 is a constant frequency pulse-width-modulated step-up regulator, care must be taken to make sure the maximum duty cycle specification is not violated. The duty cycle equation depends on which mode of operation the LM3503 is in. The two operational modes of the LM3503 are continuous conduction mode (CCM) and discontinuous conduction mode (DCM). Continuous conduction mode refers to the mode of operation where during the switching cycle, the inductor current never goes to and stays at zero for any significant amount of time during the switching cycle. Discontinuous conduction mode refers to the mode of operation where during the switching cycle, the inductor current goes to and stays at zero for a significant amount of time during the switching cycle. Figure 34 illustrates the threshold between CCM and DCM operation. In Figure 34 the inductor current is right on the CCM/DCM operational threshold. Using this as a reference, a factor can be introduced to calculate when a particular application is in CCM or DCM operation. R is a CCM/DCM factor we can use to compute which mode of operation a particular application is in. If R is ≥ 1, then the application is operating in CCM. Conversely, if R is < 1, the application is operating in DCM. The R factor inequalities are a result of the components that make up the R factor. From Figure 34, the R factor is equal to the average inductor current, IL(avg), divided by half the inductor ripple current, ΔiL. Using Figure 34, the following equation can be used to compute R factor: 14 Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 LM3503 www.ti.com R= SNVS329D – JULY 2005 – REVISED AUGUST 2006 2 * IL (avg) 'iL IL (avg) = 'iL = (5) [IOUT] [(1-D) * Eff] (6) [VIN * D] [L * Fs] (7) 2 [2 * IOUT * L * Fs * (VOUT) ] R= 2 [(VIN) * Eff * (VOUT - VIN)] VIN: (8) Input Voltage. VOUT: Output Voltage. Eff: Efficiency of the LM3503. Fs: Switching Frequency. IOUT: White LED Current/Load Current. L: Inductance Magnitude/Inductor Value. D: Duty Cycle for CCM operation. ΔiL: Inductor Ripple Current. IL(avg): Average Inductor Current. For CCM operation, the duty cycle can be computed with: tON D= TS (9) [VOUT - VIN] D= D: [VOUT] (10) Duty Cycle for CCM Operation. VOUT: Output Voltage. VIN : Input Voltage. For DCM operation, the duty cycle can be computed with: tON D= TS (11) [2 * IOUT * L * (VOUT - VIN) * Fs] D= D: 2 [(VIN) * Eff] (12) Duty Cycle for DCM Operation. VOUT: Output Voltage. VIN : Input Voltage. IOUT: White LED Current/Load Current. Fs: Switching Frequency. L: Inductor Value/Inductance Magnitude. INDUCTOR SELECTION In order to maintain inductance, an inductor used with the LM3503 should have a saturation current rating larger than the peak inductor current of the particular application. Inductors with low DCR values contribute decreased power losses and increased efficiency. The peak inductor current can be computed for both modes of operation: CCM and DCM. The cycle-by-cycle peak inductor current for CCM operation can be computed with: Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 15 LM3503 SNVS329D – JULY 2005 – REVISED AUGUST 2006 IPeak IPeak | IL (avg) + | www.ti.com 'iL (13) 2 [IOUT] [(1 - D) * Eff] + [VIN * D] [2 * L * Fs] VIN: Input Voltage. Eff: Efficiency of the LM3503. Fs: Switching Frequency. (14) IOUT: White LED Current/Load Current. L: Inductance Magnitude/Inductor Value. D: Duty Cycle for CCM Operation. IPEAK: Peak Inductor Current. ΔiL: Inductor Ripple Current. IL(avg): Average Inductor Current. The cycle-by-cycle peak inductor current for DCM operation can be computed with: IPeak | [VIN * D] [L * Fs] (15) VIN: Input Voltage. Fs: Switching Frequency. L: Inductance Magnitude/Inductor Value. D: Duty Cycle for DCM Operation. IPEAK: Peak Inductor Current. The minimum inductance magnitude/inductor value for the LM3503 can be calculated using the following, which is only valid when the duty cycle is > 0.5: [VIN * RDS(ON) * ((D/'¶) - 1)] L> [1.562 * Fs] D: Duty Cycle. D’: 1-D. (16) RDS(ON): NMOS Power Switch ON Resistance. Fs: Switching Frequency. VIN: Input Voltage. L: Inductance Magnitude/Inductor Value. This equation gives the value required to prevent subharmonic oscillations. The result of this equation and the inductor ripple currents should be accounted for when choosing an inductor value. Some recommended Inductor manufactures included but are not limited to: Coilcraft 16 DO1608C-223 DT1608C-223 www.coilcraft.com Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 LM3503 www.ti.com SNVS329D – JULY 2005 – REVISED AUGUST 2006 CAPACITOR SELECTION Multilayer ceramic capacitors are the best choice for use with the LM3503. Multilayer ceramic capacitors have the lowest equivalent series resistance (ESR). Applied voltage or DC bias, temperature, dielectric material type (X7R, X5R, Y5V, etc), and manufacturer component tolerance have an affect on the true or effective capacitance of a ceramic capacitor. Be aware of how your application will affect a particular ceramic capacitor by analyzing the aforementioned factors of your application. Before selecting a capacitor always consult the capacitor manufacturer’s data curves to verify the effective or true capacitance of the capacitor in your application. INPUT CAPACITOR SELECTION The input capacitor serves as an energy reservoir for the inductor. In addition to acting as an energy reservoir for the inductor the input capacitor is necessary for the reduction in input voltage ripple and noise experienced by the LM3503. The reduction in input voltage ripple and noise helps ensure the LM3503’s proper operation, and reduces the effect of the LM3503 on other devices sharing the same supply voltage. To ensure low input voltage ripple, the input capacitor must have an extremely low ESR. As a result of the low input voltage ripple requirement multilayer ceramic capacitors are the best choice. A minimum capacitance of 2.0 µF is required for normal operation, so consult the capacitor manufacturer’s data curves to verify whether the minimum capacitance requirement is going to be achieved for a particular application. OUTPUT CAPACITOR SELECTION The output capacitor serves as an energy reservoir for the white LED load when the internal power FET switch (Figure 3: N1) is on or conducting current. The requirements for the output capacitor must include worst case operation such as when the load opens up and the LM3503 operates in over-voltage protection (OVP) mode operation. A minimum capacitance of 0.5 µF is required to ensure normal operation. Consult the capacitor manufacturer’s data curves to verify whether the minimum capacitance requirement is going to be achieved for a particular application. Some recommended capacitor manufacturers included but are not limited to: Taiyo-Yuden GMK212BJ105MD (0805/35V) www.t-yuden.com muRata GRM40-035X7R105K (0805/50V) www.murata.com TDK C3216X7R1H105KT (1206/50V) www.tdktca.com C3216X7R1C475K (1206/16V) AVX 08053D105MAT (0805/25V) www.avxcorp.com 08056D475KAT (0805/6.3V) 1206ZD475MAT (1206/10V) DIODE SELECTION To maintain high efficiency it is recommended that the average current rating (IF or IO) of the selected diode should be larger than the peak inductor current (ILpeak). At the minimum the average current rating of the diode should be larger than the maximum LED current. To maintain diode integrity the peak repetitive forward current (IFRM) must be greater than or equal to the peak inductor current (ILpeak). Diodes with low forward voltage ratings (VF) and low junction capacitance magnitudes (CJ or CT or CD) are conducive to high efficiency. The chosen diode must have a reverse breakdown voltage rating (VR and/or VRRM) that is larger than the output voltage (VOUT). No matter what type of diode is chosen, Schottky or not, certain selection criteria must be followed: 1. VR and VRRM > VOUT 2. IF or IO ≥ ILOAD or IOUT 3. IFRM ≥ ILpeak Some recommended diode manufacturers included but are not limited to: Vishay SS12(1A/20V) www.vishay.com SS14(1A/40V) SS16(1A/60V) Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 17 LM3503 SNVS329D – JULY 2005 – REVISED AUGUST 2006 On Semiconductor www.ti.com MBRM120E (1A/20V) www.onsemi.com MBRS1540T3 (1.5A/40V) MBR240LT (2A/40V) Central Semiconductor CMSH1-40M (1A/40V) www.centralsemi.com SHUTDOWN AND START-UP On startup, the LM3503 contains special circuitry that limits the peak inductor current which prevents large current spikes from loading the battery or power supply. The LM3503 is shutdown when both En1 and En2 signals are less than 0.3V. During shutdown the output voltage is a diode drop below the supply voltage. When shutdown, the softstart is reset to prevent inrush current at the next startup. THERMAL SHUTDOWN The LM3503 stops regulating when the internal semiconductor junction temperature reaches approximately 140°C. The internal thermal shutdown has approximately 20°C of hysteresis which results in the LM3503 turning back on when the internal semiconductor junction temperature reaches 120°C. When the thermal shutdown temperature is reached, the softstart is reset to prevent inrush current when the die temperature cools. UNDER VOLTAGE PROTECTION The LM3503 contains protection circuitry to prevent operation for low input supply voltages. When Vin drops below 2.3V, typically, the LM3503 will no longer regulate. In this mode, the output voltage will be one diode drop below Vin and the softstart will be reset. When Vin increases above 2.4V, typically, the device will begin regulating again. OVER VOLTAGE PROTECTION The LM3503 contains dedicated ciruitry for monitoring the output voltage. In the event that the LED network is disconnected from the LM3503, the output voltage will increase and be limited to 15.5V(typ.) for the 16V version, 24V(typ.) for the 25V version, 34V(typ.) for 35V version and 42V(typ.) for the 44V version. (see electrical table for more details). In the event that the network is reconnected regulation will resume at the appropriate output voltage. LAYOUT CONSIDERATIONS All components, except for the white LEDs, must be placed as close as possible to the LM3503. The die attach pad (DAP) must be soldered to the ground plane. The input bypass capacitor CIN, as shown in the Typical Application Circuit, must be placed close to the IC and connect between the VIN and Pgnd pins. This will reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 100 nF bypass capacitor can be placed in parallel with CIN to shunt any high frequency noise to ground. The output capacitor, COUT, must be placed close to the IC and be connected between the VOUT1 and Pgnd pins. Any copper trace connections for the COUT capacitor can increase the series resistance, which directly effects output voltage ripple and efficiency. The current setting resistor, R1, should be kept close to the Fb pin to minimize copper trace connections that can inject noise into the system. The ground connection for the current setting resistor network should connect directly to the Pgnd pin. The Agnd pin should be tied directly to the Pgnd pin. Trace connections made to the inductor should be minimized to reduce power dissipation and increase overall efficiency while reducing EMI radiation. For more details regarding layout guidelines for switching regulators, refer to Applications Note AN-1149. 18 Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM3503 PACKAGE OPTION ADDENDUM www.ti.com 9-Mar-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) LM3503ITL-16/NOPB ACTIVE DSBGA YPA 10 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 SBHB LM3503ITL-25/NOPB ACTIVE DSBGA YPA 10 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 SBJB LM3503ITL-35/NOPB ACTIVE DSBGA YPA 10 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 SBKB LM3503ITL-44/NOPB ACTIVE DSBGA YPA 10 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 SDNB LM3503ITLX-16/NOPB ACTIVE DSBGA YPA 10 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 SBHB LM3503ITLX-25/NOPB ACTIVE DSBGA YPA 10 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 SBJB LM3503ITLX-35/NOPB ACTIVE DSBGA YPA 10 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 SBKB LM3503ITLX-44/NOPB ACTIVE DSBGA YPA 10 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 SDNB LM3503SQ-16 ACTIVE WQFN RGH 16 1000 TBD Call TI Call TI -40 to 85 L00045B LM3503SQ-16/NOPB ACTIVE WQFN RGH 16 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00045B LM3503SQ-25 ACTIVE WQFN RGH 16 1000 TBD Call TI Call TI -40 to 85 L00046B LM3503SQ-25/NOPB ACTIVE WQFN RGH 16 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00046B LM3503SQ-35 ACTIVE WQFN RGH 16 1000 TBD Call TI Call TI -40 to 85 L00047B LM3503SQ-35/NOPB ACTIVE WQFN RGH 16 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00047B LM3503SQ-44 ACTIVE WQFN RGH 16 1000 TBD Call TI Call TI -40 to 85 L00053B LM3503SQ-44/NOPB ACTIVE WQFN RGH 16 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00053B LM3503SQX-16 ACTIVE WQFN RGH 16 4500 TBD Call TI Call TI -40 to 85 L00045B LM3503SQX-16/NOPB ACTIVE WQFN RGH 16 4500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00045B Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 9-Mar-2013 Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) LM3503SQX-25 ACTIVE WQFN RGH 16 4500 TBD Call TI Call TI -40 to 85 L00046B LM3503SQX-25/NOPB ACTIVE WQFN RGH 16 4500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00046B LM3503SQX-35 ACTIVE WQFN RGH 16 4500 TBD Call TI Call TI -40 to 85 L00047B LM3503SQX-35/NOPB ACTIVE WQFN RGH 16 4500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00047B LM3503SQX-44 ACTIVE WQFN RGH 16 4500 TBD Call TI Call TI -40 to 85 L00053B LM3503SQX-44/NOPB ACTIVE WQFN RGH 16 4500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00053B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Only one of markings shown within the brackets will appear on the physical device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 9-Mar-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 17-Nov-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LM3503ITL-16/NOPB DSBGA YPA 10 250 178.0 8.4 LM3503ITL-25/NOPB DSBGA YPA 10 250 178.0 LM3503ITL-35/NOPB DSBGA YPA 10 250 178.0 LM3503ITL-44/NOPB DSBGA YPA 10 250 LM3503ITLX-16/NOPB DSBGA YPA 10 LM3503ITLX-25/NOPB DSBGA YPA LM3503ITLX-35/NOPB DSBGA YPA LM3503ITLX-44/NOPB DSBGA W Pin1 (mm) Quadrant 2.03 2.21 0.76 4.0 8.0 Q1 8.4 2.03 2.21 0.76 4.0 8.0 Q1 8.4 2.03 2.21 0.76 4.0 8.0 Q1 178.0 8.4 2.03 2.21 0.76 4.0 8.0 Q1 3000 178.0 8.4 2.03 2.21 0.76 4.0 8.0 Q1 10 3000 178.0 8.4 2.03 2.21 0.76 4.0 8.0 Q1 10 3000 178.0 8.4 2.03 2.21 0.76 4.0 8.0 Q1 YPA 10 3000 178.0 8.4 2.03 2.21 0.76 4.0 8.0 Q1 LM3503SQ-16 WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQ-16/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQ-25 WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQ-25/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQ-35 WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQ-35/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQ-44 WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQ-44/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQX-16 WQFN RGH 16 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQX-16/NOPB WQFN RGH 16 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Nov-2012 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM3503SQX-25 WQFN RGH 16 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQX-25/NOPB WQFN RGH 16 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQX-35 WQFN RGH 16 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQX-35/NOPB WQFN RGH 16 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQX-44 WQFN RGH 16 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM3503SQX-44/NOPB WQFN RGH 16 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3503ITL-16/NOPB DSBGA YPA 10 250 203.0 190.0 41.0 LM3503ITL-25/NOPB DSBGA YPA 10 250 203.0 190.0 41.0 LM3503ITL-35/NOPB DSBGA YPA 10 250 203.0 190.0 41.0 LM3503ITL-44/NOPB DSBGA YPA 10 250 203.0 190.0 41.0 LM3503ITLX-16/NOPB DSBGA YPA 10 3000 206.0 191.0 90.0 LM3503ITLX-25/NOPB DSBGA YPA 10 3000 206.0 191.0 90.0 LM3503ITLX-35/NOPB DSBGA YPA 10 3000 206.0 191.0 90.0 LM3503ITLX-44/NOPB DSBGA YPA 10 3000 206.0 191.0 90.0 LM3503SQ-16 WQFN RGH 16 1000 203.0 190.0 41.0 LM3503SQ-16/NOPB WQFN RGH 16 1000 203.0 190.0 41.0 LM3503SQ-25 WQFN RGH 16 1000 203.0 190.0 41.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 17-Nov-2012 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3503SQ-25/NOPB WQFN RGH 16 1000 203.0 190.0 41.0 LM3503SQ-35 WQFN RGH 16 1000 203.0 190.0 41.0 LM3503SQ-35/NOPB WQFN RGH 16 1000 203.0 190.0 41.0 LM3503SQ-44 WQFN RGH 16 1000 203.0 190.0 41.0 LM3503SQ-44/NOPB WQFN RGH 16 1000 203.0 190.0 41.0 LM3503SQX-16 WQFN RGH 16 4500 349.0 337.0 45.0 LM3503SQX-16/NOPB WQFN RGH 16 4500 349.0 337.0 45.0 LM3503SQX-25 WQFN RGH 16 4500 349.0 337.0 45.0 LM3503SQX-25/NOPB WQFN RGH 16 4500 349.0 337.0 45.0 LM3503SQX-35 WQFN RGH 16 4500 349.0 337.0 45.0 LM3503SQX-35/NOPB WQFN RGH 16 4500 349.0 337.0 45.0 LM3503SQX-44 WQFN RGH 16 4500 349.0 337.0 45.0 LM3503SQX-44/NOPB WQFN RGH 16 4500 349.0 337.0 45.0 Pack Materials-Page 3 MECHANICAL DATA RGH0016A SQA16A (Rev A) www.ti.com MECHANICAL DATA YPA0010 0.600 ±0.075 D E TLP10XXX (Rev D) D: Max = 2.144 mm, Min =2.043 mm E: Max = 1.966 mm, Min =1.865 mm 4215069/A NOTES: A. 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