MPS MP5022CGQV 12v, 3mohm rds(on), hot-swap protection device with current monitoring Datasheet

MP5022C
12V, 3mΩ RDS(ON), Hot-Swap Protection
Device with Current Monitoring
DESCRIPTION
FEATURES
The MP5022C is a hot-swap protection device
designed to protect circuitry on its output from
transients on its input. The MP5022C also
protects its input from unwanted shorts and
transients coming from its output.
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•
•
•
•
During start-up, inrush current is limited by the
slew rate at the output. The slew rate is
controlled by an external capacitor at SS.
The maximum load at the output is currentlimited through sense FET topology. The
magnitude of the current limit is controlled by a
low-power resistor from ISET to ground.
An internal charge pump drives the gate of the
power device, allowing a power FET with a very
low on resistance of 3mΩ to turn on.
The MP5022C includes an IMON option that
produces a voltage proportional to the current
through the power device set by a resistor from
IMON to ground.
Full protection features includes current limit,
thermal shutdown, damaged MOSFET detection,
over-voltage protection (OVP), and under-voltage
protection (UVP).
The MP5022C is available
(3mmx5mm) package.
in
a
QFN-22
•
•
•
•
•
•
•
•
•
•
4.8V-to-16V Operating Input Range
Integrated 3mΩ Power FET
Adjustable Current Limit
Output Current Measurement
±3% Current Monitor Accuracy (6A < Io <
15A)
Fast Response (<200ns) for Short Protection
PG Detector and FLTB Indication
PG Assert Low at VIN = 0
Input-to-Output Short-Circuit Detection
External Soft Start
Programmable LOADEN Blanking Time
Configurable Over-Voltage Lockouts with
Hysteresis
Under-Voltage Lockout (UVLO)
Thermal Protection
Available in a Small QFN-22 (3mmx5mm)
Package
APPLICATIONS
•
•
•
•
•
•
Hot Swap
PC Cards
Disk Drives
Servers
Networking
Laptops
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For
MPS green status, please visit the MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
MP5022C Rev. 1.0
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1
MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
TYPICAL APPLICATION
VIN
TVS
21-22,
Exposed Pad
Enable
Load Enable
1
2
3
VIN
EN
LOADEN
D1
AVIN
MP5022C
RAVIN
FLTB
SS
CSS
CAVIN
12
R2
+3.3V
11
PG 10 Power Good
ISET
RSET
OV
R1
R3
TIMER
CT
5
COUT
ENTM
CENTM
4
VOUT
13-20
VOUT
6
GND
7
IMON
9
8
CMON
R4
Fault Bar
Output Current Monitor
RMON
MP5022C Rev. 1.0
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP5022CGQV
QFN-22 (3mmx5mm)
See Below
* For Tape & Reel, add suffix –Z (e.g. MP5022CGQV–Z)
TOP MARKING
MP: MPS prefix
Y: Year code
W: Week code
5022C: First five digits of the part number
LLL: Lot number
PACKAGE REFERENCE
TOP VIEW
EN
VIN
VIN
22
21
1
20 VOUT
VIN
LOADEN 2
19 VOUT
VIN
ENTM 3
18 VOUT
TIMER 4
17 VOUT
VIN
ISET
5
SS
6
16 VOUT
15 VOUT
VIN
GND
7
IMON
8
FLTB
9
14 VOUT
13 VOUT
VIN
12 AVIN
10
11
PG
OV
QFN-22 (3mmx5mm)
MP5022C Rev. 1.0
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
VIN, AVIN ...................................... -0.3V to 24V
VOUT ............................................ -0.3V to 20V
Other pins ..................................... -0.3V to 6.5V
Continuous power dissipation (TA = +25°C) (2)
............................................................2.7W
Junction temperature ............................. +150°C
Storage temperature ................ -65°C to +155°C
QFN-22 (3mmx5mm) .............. 46 ...... 10 ... °C/W
Recommended Operating Conditions
(3)
Input voltage operating range ........ .4.8V to 16V
Operating junction temp. (TJ). ...........................
............................................... -40°C to +125°C
(4)
θJA
θJC
NOTES:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation produces an excessive die temperature, causing
the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7 4-layer board.
MP5022C Rev. 1.0
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
ELECTRICAL CHARACTERISTICS
VIN = 12V, RSET = 10.2k, COUT = 470μF, TJ = 25°C, unless otherwise noted.
Parameters
Supply Current
Symbol
Quiescent current
IQ
Condition
Min
Typ
Max
Units
EN = high, no load
Fault latch off
EN = 0, VIN = 16V
1.3
1.3
2.0
mA
mA
μA
TJ = 25°C
(5)
TJ = 85°C
3
3.8
700
Power FET
On resistance
RDS(ON)
Off-state leakage current
Maximum continuous current
IOFF
(5)
VIN = 24V, EN = 0V
IOUT_MAX
Thermal Shutdown
(5)
Shutdown temperature
tSTD
VIN Under-Voltage Protection (UVLO)
VIN UVLO threshold
VIN UVLO
VIN UVLO hysteresis
VIN UVLOHYS
LOADEN
Low-level input voltage
VL
High-level input voltage
VH
Soft Start (SS)
SS pull-up current
ISS
Current Limit
Current limit at normal operation
ILimit NO
(5)
Current limit response time
tCL
(5)
Secondary current limit
ILimitH
Short-circuit protection response
tSC
(5)
time
Output Current Monitor
Gain of current sense amplifier
AIMON
Max IMON voltage
Timer
Upper threshold voltage
Insertion delay charge current
Fault detection charge current
Discharge RDS(ON)
LOADEN Blanking Time (ENTM)
Upper threshold voltage
Charge current
VIMON
VTMRH
IINSERT
IFLTD
RFLTE
VENTMRH
IENTMCC
4
4.8
mΩ
1
μA
15
A
145
VIN UVLO rising threshold
4.15V
0.25
°C
4.5
V
V
0.9
V
V
2.3
VSS = 0V
RSET = 10.2k
10
12.5
15
μA
11.34
12.6
20
36
13.86
A
μs
A
Regardless of RSET
200
6A < IOUT < 15A
3A < IOUT < 6A
ns
9.7
9.5
10
10
10.3
10.5
3
μA/A
μA/A
V
1.2
34.5
175
1.24
43
215
35
1.28
51.5
255
70
V
μA
μA
Ω
1.2
0.8
1.24
1.1
1.28
1.4
V
μA
IOUT < ILimit
MP5022C Rev. 1.0
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, RSET = 10.2k, COUT = 470μF, TJ = 25°C, unless otherwise noted.
Parameters
Enable
Rising threshold
Hysteresis
Over-Voltage (OV)
OV threshold
OV threshold hysteresis
Fault Bar (FLTB)/Power Good (PG)
Low-level output voltage
Fault bar off-state leakage current
Fault bar propagation delay
Symbol
VENRS
VENHYS
VOV TH
VOV HYS
VOV rising
VOV falling
VOL
IFLT LKG
Sink current 1mA
VFLTB = 3.3V
ISET stepped to 1V to
FLTB pull-down
tPDE
(5)
Power good rising threshold
Power good falling threshold
Power good off-state leakage current
Condition
PGVth Hi
PGVth Lo
IPG LKG
VOL_100
PG low-level output voltage
VOL_10
Min
Typ
Max
Units
1.258
1.325
170
1.391
V
mV
1.2
1.24
90
1.28
V
mV
0.2
1
V
μA
16
μs
80%
2.5
VIN
VIN
μA
600
720
mV
720
870
mV
8
90%
75%
VPG = 3.3V
VIN = 0V, pull up to 3.3V
through 100kΩ resistor
VIN = 0V, pull up to 3.3V
through 10kΩ resistor
NOTE:
5) Guaranteed by design.
MP5022C Rev. 1.0
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, COUT = 470µF, CENTM = 1μF, CT = 220nF, CSS = 47nF, RSET = 6.8kΩ, TA = +25°C, unless
otherwise noted.
MP5022C Rev. 1.0
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5/26/2016
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, COUT = 470µF, CENTM = 1μF, CT = 220nF, CSS = 47nF, RSET = 6.8kΩ, TA = +25°C, unless
otherwise noted.
MP5022C Rev. 1.0
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5/26/2016
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, COUT = 470µF, CENTM = 1μF, CT = 220nF, CSS = 47nF, RSET = 6.8kΩ, TA = +25°C, unless
otherwise noted.
MP5022C Rev. 1.0
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
PIN FUNCTIONS
Pin #
1
2
Name
Description
Enable input. EN used in conjunction with LOADEN can turn on or off the main power
EN
device in the MP5022C. EN is pulled high internally.
Load enable input. LOADEN used in conjunction with EN can turn on or off the main
power device in the MP5022C (see Table 1). LOADEN is also used to shut down the
LOADEN power switch after the LOADEN blanking time, but cannot turn it back on by recycling
LOADEN only.
3
ENTM
4
TIMER
5
ISET
6
SS
7
GND
8
IMON
9
FLTB
10
PG
11
OV
12
AVIN
13-20
VOUT
21, 22,
Exposed
Pads
VIN
LOADEN blanking time set. Connect an external capacitor to set the LOADEN blanking
time. Once EN is active, the timer starts and the LOADEN de-assertion is blanked. The
switch shuts down in the presence of a fault or EN low condition, but LOADEN low during
the blanking time has no effect.
Timer set. An external capacitor sets the hot-plug insertion time delay and fault time-out
period.
Current limit set. Place a resistor from ISET to ground to set the value of the overcurrent limit.
Soft start. An external capacitor connected to SS sets the soft-start time of the output
voltage. The internal circuit controls the slew rate of the output voltage at start-up. Float
SS to set the soft-start time at its minimum (1ms).
Ground.
Output current monitor. IMON provides a voltage proportional to the current flowing
through the power device. Placing a 10kΩ resistor (RMON) to ground creates a 0V to 1.5V
voltage when the current is between 0A and 15A. Place a capacitor greater than 10nF in
parallel with RMON during application.
Fault bar. FLTB is an open-drain output that drives to ground when an over-current or a
thermal shutdown occurs. Pull FLTB up to an external power supply through a 10-100kΩ
resistor.
Power good. PG is an open-drain output. Pull PG up to an external power supply through
a 10-100kΩ resistor. PG high means power good.
Over-voltage enable input. Pull OV high to turn off the internal MOSFET. Connect OV to
an external resistive divider to set the over-voltage disable threshold.
Internal power supply for VCC sub regulator. Connect a 49.9Ω, 0603 package resistor
from VIN to AVIN and a 2.2μF bypass capacitor to GND to guarantee full operation in the
event that VIN collapses during a strong short from VOUT to GND.
Output. VOUT is the voltage controlled by the IC. A Schottky diode should be placed
between VOUT and GND to absorb the negative voltage spike.
Input power supply for main power.
MP5022C Rev. 1.0
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
BLOCK DIAGRAM
VIN
AVIN
Current
Sense
Charge
Pump
LDO
VCC
8µA
1: 2500
IMON
VOUT
Fast Off Comp
500KΩ
6.9KΩ
300Ω
100Ω
100KΩ
1V
2MΩ
VIN/1100K
Soft Start
ISET
Current Limit Amp
SS
650mV
PG
UVLO
Control Logic
VCC
FLTB
2µA
EN
VCC
215µA
43µA
VCC
LOADEN
VCC
4µA
1µA
8µA
TIMER
ENTM
Thermal
Sense
1.24V
80KΩ
OV
1.24V
GND
Figure 1: Functional Block Diagram
MP5022C Rev. 1.0
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
OPERATION
The MP5022C is designed to limit the inrush
current to the load when a circuit card is inserted
into a live backplane power source, limiting the
backplane’s voltage drop and the dV/dt of the
voltage to the load. The MP5022C provides an
integrated solution for monitoring the input
voltage, output voltage, output current, and die
temperature to eliminate the need for an external
current sense power resistor, power MOSFET,
and thermal sense device.
Current Limit
The MP5022C provides a constant current limit
that can be programmed by an external resistor.
Once the device reaches its current limit
threshold, the internal circuit regulates the gate
voltage to hold the current in the power FET
constant. To limit the current, the gate-to-source
voltage must be regulated from 4V to around 1V.
The typical response time is about 20µs. The
output current may have a small overshoot
during this time period.
When the current limit is triggered, the fault timer
starts. If the output current falls below the current
limit threshold before the end of the fault timeout
period, the MP5022C resumes normal operation.
Otherwise, if the current-limit duration exceeds
the fault timeout period, the power FET is latched
off.
When the device reaches either its current limit
or over-temperature threshold, FLTB is driven
low with an 8μs propagation delay to indicate a
fault. The desired current limit at normal
operation is a function of the external current-limit
resistor.
Short-Circuit Protection (SCP)
If the load current increases rapidly due to a
short circuit, the current may exceed the currentlimit threshold before the control loop can
respond. If the current reaches a 36A secondary
current-limit level, a fast turn-off circuit activates
to turn off the power FET using a 100mA pulldown gate discharge current (see Figure 2). This
limits the peak current through the switch to limit
the input voltage drop. The total short-circuit
response time is about 200ns.
When short-circuit protection is triggered, the
chip restarts to determine whether the overload
condition exists or not. If the short-circuit has
been induced by the input line transient, the part
works normally. If a real short circuit occurs, the
part latches off completely (see Figure 2 and
Figure 3).
FLTB switches low once it reaches a 36A current
limit and asserts low until the short circuit is
removed.
Fault Timer and Restart
When the current reaches its limit threshold, a
215µA fault timer current source charges the
external capacitor (CT) at TIMER. If the current
limit state ceases before TIMER reaches 1.24V,
the MP5022C resumes normal operation mode
and releases TIMER immediately when the
current limit is removed. If the current limit state
lasts after the TIMER voltage reaches 1.24V, the
power FET switches off. The capacitance of CT
can be determined with Equation (1):
CT =
215 ⋅ t fault
1.24
(1)
Where CT is the fault timer capacitance (nF), and
tfault is the fault timer (ms). For example, a 100nF
capacitor yields a fault timer of 0.58ms.
This fault timer capacitor also determines the
insertion delay timer during start-up.
MP5022C Rev. 1.0
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
EN
EN restart
0
Vout
0
Iout
Output short circuit
Latch off here
Overload Current limit
Trips absolute
current protection
36A
Current limit exit
Current limit
TCL
Latch off here if short
circuit exists
TSC
~0.2µs
0
VGS
Controlled Ron
mode
Soft Start
4V
0
Fast pulldown
1.24V
1.24V
215µA
43µA
TIMER
0
215µA
t1
Fault timeout period
Insertion delay time
Fault timeout period
FLTB
0
t
8µs
Figure 2: Over-Current Protection
Vin
Vin line transient
0
Vout
0
36A
Trips absolute
current protection
Iout
TSC
0
VGS
0
~0.2µs
Fast
pulldown
TIMER
0
Fault timeout period
FLTB
0
t
Figure 3: VIN Line Transient Response
MP5022C Rev. 1.0
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
Power Good (PG)
Power good (PG) indicates whether the output
voltage is in the normal range relative to the input
voltage. PG is also the open drain of the FET.
Pull PG up to the external power supply through
a 10-100kΩ resistor. During start-up, the power
good output is driven low. This instructs the
system to remain off and minimize the load on
VOUT to reduce inrush current and power
dissipation at start-up.
The power-good signal is pulled high when the
device meets the following conditions:
• VOUT > 90% * VIN
• VGS > 3V
• VOUT > VIN - 0.8V
Once these conditions are met, the system can
then draw full power.
When VOUT < 75% * VIN, PG is switched low. The
PG output is pulled low when EN is below its
threshold. With no input, PG stays at a logic low
level in the presence of a pull-up supply.
Power-Up Sequence
For hot-swap applications, the input of the
MP5022C can experience a voltage spike or
transient during the hot-plug procedure. This is
caused by the parasitic inductance of the input
trace and the input capacitor. To help stabilize
the input voltage, an insertion delay is
implemented before the main FET is turned on.
TIMER charges the external capacitor (CT)
through a 43µA constant current source when the
input voltage reaches the UVLO threshold (see
Figure 4). The insertion delay finishes when the
TIMER voltage reaches 1.24V. The capacitance
of CT can be determined with Equation (2):
CT =
43 ⋅ t delay
1.24
(2)
Where CT is the insertion delay timer capacitance
(nF), and tdelay is the insertion delay (ms). For
example, a 100nF capacitor yields an insertion
delay timer of 2.9ms.
Fault Bar (FLTB)
Fault bar (FLTB) is an open-drain output used to
indicate that a fault has occurred. Pull FLTB up to
an external power supply through a 10-100kΩ
resistor.
When the device reaches its current limit, the die
temperature exceeds the thermal shutdown
threshold or the MOSFET is shorted before
power-up, the fault output is driven low with an
8µs propagation delay. If a short circuit occurs
and the 36A secondary current limit is reached,
the FLTB is switched low immediately.
FLTB goes high when the MP5022C resumes
normal operation. This means that the output
voltage is higher than the setting voltage of the
PG rising threshold, and the power FET is fully
on (VGS > 3V).
External Pull-Up Voltage for PG and FLTB
PG and FLTB require an external power supply.
The open-drain output of PG can work from the
external pull-up voltage, even when VIN = 0 and
EN is disabled. Use a 10-100kΩ pull-up resistor
for PG and FLTB.
Figure 4: Start-Up Sequence
This insertion delay timer capacitor also
determines the fault timer, as specified in the
Fault Timer and Restart section on page 12.
After TIMER reaches 1.24V, an 8µA current
source pulls up the power FET’s gate-source
voltage. Meanwhile, the TIMER voltage is
discharged to zero. Once the gate voltage
reaches its threshold (VGSTH), the output voltage
begins to rise. The rise time is determined by the
soft-start capacitor.
MP5022C Rev. 1.0
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
Soft Start (SS)
A capacitor connected to SS determines the softstart time. When the insertion delay time ends, a
constant-current source proportional to the input
voltage charges up the SS voltage. The output
voltage rises at a similar slew rate to the SS
voltage.
The SS capacitor value can be calculated with
Equation (3):
6 ⋅ t SS
CSS =
RSS
(3)
Where tSS is the soft-start time, and RSS is 1.1MΩ.
For example, a 47nF capacitor gives a soft-start
time of 8.6ms.
If the load capacitance is extremely large, the
current required to maintain the preset soft-start
time exceeds the current limit. In this case, the
rise time is controlled by the load capacitor and
the current limit.
Float SS to generate a fast ramp-up voltage. An
8μA current source pulls up the gate of the power
FET. The gate charge current controls the output
voltage rise time. The approximate soft-start time
(1ms) is the minimum soft-start time.
Enable and LOADEN
EN and LOADEN are used to control the on/off
status of the MP5022C (see Table 1).
During the LOADEN blanking time, EN = 1 alone
is sufficient to turn on the switch. After the
LOADEN blanking time expires, both EN = 1 and
LOADEN = 1 are required to turn on the switch.
At all times, EN = 0 turns off the switch. Recycle
EN or VIN to restart the chip once it is latched off.
Table 1: EN/LOADEN Blanking Time
LOADEN blanking
time over?
N
Please note that LOADEN is used to shut down
the power switch after the LOADEN blanking
time, but LOADEN cannot turn on the power
switch by recycling LOADEN only (see Figure 5).
on
Power FET
off
LOADEN
1.24V
ENTM
LOADEN Blanking Time
EN
t
Figure 5: EN/LOADEN Timing Diagram
EN is pulled high internally with a 2µA internal
pull-up current source.
Once the part is enabled, the insertion delay
timer starts. When the insertion delay time ends,
the internal 8μA current source charges the
power FET’s gate. Charging takes about 1ms for
VGS to reach its threshold. Then the output
voltage rises following the SS controlled slew
rate.
LOADEN Blanking Time
Supposing EN is high, LOADEN has a
programmable blanking time that prevents
LOADEN from de-asserting during the blanking
time (see Figure 6). All fault functionality is
operative during start-up, so the power switch
shuts down if a fault is detected. However,
LOADEN going low during this blanking time will
not turn off the switch. At the end of the blanking
time, LOADEN operates normally.
EN
EN
LOADEN
Status
0
0
Off
N
N
N
Y
Y
Y
0
1
1
0
0
1
1
0
1
0
1
0
Off
On
On
Off
Off
Off
Y
1
1
On
1. 24 V
T IM ER
t1
In se rti o n d e la y
LOAD EN
1 .24 V
EN T M
V OU T
t2
t
L OA D E N B la n kin g tim e
Figure 6: LOADEN Blanking Time
MP5022C Rev. 1.0
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5/26/2016
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15
MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
The blanking time can be set by a capacitor
connected to ENTM. The blanking timer
capacitor is calculated with Equation (4):
CENTM =
tLDNB ⋅ 10 −6
1.24
(4)
Where tLDNB is the LOADEN blanking time, and
CENTM is the LOADEN blanking time capacitor on
ENTM. For example, a 1μF capacitor gives a
blanking time of 1.24s.
Floating ENTM generates a fast ramp-up voltage
on ENTM. The blanking time during this period is
negligible.
Input-to-Output Short-Circuit Detection
The MP5022C can detect a main pass FET
during power up by treating an output voltage
exceeding VIN - 0.8V during start-up as a short on
the MOSFET. FLTB goes low to indicate a fault
condition and the power switch is held off. Once
VOUT ≤ VIN - 0.8, the part starts up normally.
Internal VCC SUB Regulator
The MP5022C has an internal 4V linear subregulator that steps down the input voltage to
generate a 4V bias supply that powers lowvoltage circuitry. The regulator is enabled when
VIN exceeds its UVLO threshold and EN is high.
AVIN
AVIN is the power supply for the internal VCC
sub-regulator. Connect a 49.9Ω resistor from VIN
to AVIN and a 2.2μF bypass capacitor to GND to
guarantee full operation in the event VIN
collapses during a strong short from VOUT to
GND. VIN has UVLO protection, but AVIN does
not provide UVLO protection. Do not use AVIN
alone to power off the MP5022C. The AVIN
supply current is 500µA, typically.
Over-Voltage Lockout (OVLO)
The MP5022C monitors the supply voltage
through OV pin for input over-voltage conditions.
An external resistive divider from VIN to OV
provides flexibility for setting the over-voltage
lockout threshold.
When the voltage on OV pin exceeds 1.24V, the
internal MOSFET is shut down, and the output is
disabled. When the voltage on OV pin falls below
1.24V-VOV_HYS, internal MOSFET is turned on
again and the output ramps up with a soft-start.
Under-Voltage Lockout (UVLO)
If the supply (input) falls below the under-voltage
lockout (UVLO) threshold, the output is disabled
and PG goes low.
When the supply exceeds the UVLO threshold
without exceeding the OV threshold, the output is
enabled.
Monitoring the Output Current
IMON provides a current proportional to the
output current (the current through the power
device). The gain of the current sense amplifier
with 10µA/A, which means that for every amp the
main FET conducts, IMON provides 10µA of
current. Placing a 10kΩ resistor to ground
creates a voltage between 0V and 2V when the
MOSFET current ranges from 0A to 20A. The
voltage compliance for IMON is from 0V to 3V.
Place a capacitor more than 10nF in parallel with
RMON during application.
MP5022C Rev. 1.0
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5/26/2016
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16
MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
APPLICATION INFORMATION
Current Limit Set (RSET)
The MP5022C current limit value should be
higher than the normal maximum load current,
allowing for tolerances in the current sense
value. The current limit can be set using
Equation (5):
1.3(V)
ILIMIT =
× 105 (A)
RSET
(5)
When the current limit is set lower than 7A,
place an R-C circuit in parallel with the ISET
resistor (see Figure 7). Generally, choose R =
20kΩ and C = 560pF.
Figure 8: Current Limit vs. RSET Value (Current
Limit ≥7A)
Figure 9 shows a graphical view of the RSET
resistor vs. the current limit for currents 7A and
below.
ISET
R
RSET
C
Figure 7: R-C Filter Circuit for ISET
Figure 8 shows a quick graphical view of the
RSET resistor value vs. the desired current when
the desired current limit is greater than 7A.
Table 2 provides the bench results for the
evaluation board.
Table 2: Current Limit vs. Current Limit Resistor
Current limit resistor (kΩ)
6.8
16.2
32.4
Current limit (A)
19
8
4.06
Figure 9: Current Limit vs. RSET Value (Current
Limit <7A)
Current Monitor Set
The MP5022C can monitor the power MOSFET
current. Place a resistor (RMON) to ground to set
the gain of the output. The theory equation is
shown with Equation (6):
IMON =
IPOWER _ FET
105
(A)
(6)
Where IPOWER_FET is the current flowing from the
power MOSFET. Placing a 10kΩ resistor from
IMON to GND can achieve 100mV/A. Place a
capacitor more than 10nF from IMON to GND
to smooth the indicator voltage.
MP5022C Rev. 1.0
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5/26/2016
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
COUT
OUT
+
GND
Clamp
diode
TVS
OUT
OUT
OUT
OUT
AVIN
17
16
15
14
13
12
N
VIN
PG
10
R3
R4
RMON
CSS
R1
R2
VIN
VIN
11
GND
FLTB 9
IMON 8
6
SS
GND 7
VIN
TIMER 4
ISET 5
RSET
N
CAVI
OV
OUT
18
EXPOSED PAD
OUT
OUT
OUT
20
19
1
ENTM 3
EN
CENTM
VIN
CTIMER
LOADEN 2
22
RCD
VIN
VIN
21
VIN
CIN
RAVI
VIN
PCB Layout Guidelines
Efficient PCB layout is critical for stable
operation. For best results, refer to Figure 10
and follow the guidelines below.
1. Place the high current path from the board’s
input to output and the current return path in
parallel with a minimized loop to reduce the
loop inductance.
2. Place a transient voltage suppressor diode
(TVS) at VIN.
3. Place TVS as close as possible to VIN.
TVS is used to absorb the input voltage
spike from the system input line spike or
when the load current of the MP5022C
decreases sharply, which generates a
voltage spike at VIN.
4. Connect the MP5022C’s GND to a small
GND island, in which all the signal GNDs of
the part are referenced.
This signal GND island can be
connected to the main PWR GND of the
system via a single point grounding
method.
5. Ensure that the input decoupling capacitors
on VIN have a minimal trace length to VIN
and to GND.
6. Place the Schottky diode close to VOUT
and GND to absorb negative voltage spikes
when the power FET is shut off.
7. Place output capacitors as close to the
MP5022C as possible to minimize the effect
of PCB parasitic inductance.
8. Keep the IN and GND pads connected with
large coppers.
9. Place vias on the thermal pad to achieve
better thermal performance.
10. Ensure that all VIN and VOUT pins are
connected to achieve equal current
distribution of each lead or pin.
3.3V
Signal GND
Figure 10: Recommended Layout
Design Example
The detailed application schematic is shown in
Figure 11, Figure 12 and Figure 13. Figure 11
shows the application circuit for applications
over the current limit ≥7A. Figure 12 is the
application circuit for applications over the
current limit <7A. Figure 13 is the application
circuit with LOADEN unused. The typical
performance and waveforms are shown in the
Typical Performance Characteristics section.
For more detailed device applications, please
refer to the related evaluation board datasheet.
MP5022C Rev. 1.0
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5/26/2016
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18
MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
TYPICAL APPLICATION CIRCUITS
Figure 11: Over-Current Limit ≥7A Applications
Figure 12: Over-Current Limit <7A Applications
MP5022C Rev. 1.0
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5/26/2016
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
TYPICAL APPLICATION CIRCUITS (continued)
Figure 13: LOADEN Not Used
MP5022C Rev. 1.0
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5/26/2016
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MP5022C – 12V, 3mΩ RDS(ON), HOT-SWAP PROTECTION DEVICE
PACKAGE INFORMATION
QFN-22 (3mmx5mm)
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP5022C Rev. 1.0
www.MonolithicPower.com
5/26/2016
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© 2016 MPS. All Rights Reserved.
21