AD EVALZ-ADPD2212 Low noise, high sensitivity optical sensor Datasheet

FEATURES
FUNCTIONAL BLOCK DIAGRAM
Ultrahigh detectivity photodetector
90 fA/√Hz (typical) ultralow noise floor
Signal-to-noise ratio (SNR) near shot noise limit
137 µA (typical) of supply current when active
(EE = 0 µW/cm2)
1 µA (typical) of supply current in standby
High speed, deep junction photodiode
Nominal linear output current: 240 µA (typical)
Flexible output configuration
Excellent pulse response
High ambient light rejection
Space-saving, 3 mm × 4 mm LFCSP package
VCC
+
CURRENT
AMPLIFIER
–
OUT
ADPD2212
PWDN GND
13721-001
Data Sheet
Low Noise, High Sensitivity Optical Sensor
ADPD2212
Figure 1.
APPLICATIONS
Heart rate, pulse oximetry monitoring
(photoplethysmography)
Battery-powered medical sensors
Chemical analysis
GENERAL DESCRIPTION
The ADPD2212 is an optical sensor optimized for biomedical
applications. Very low power consumption and near theoretical
signal-to-noise ratio (SNR) are achieved by packaging an ultralow
capacitance deep junction silicon photodiode operated in zero
bias photoconductive mode with a low noise current amplifier.
The ADPD2212 offers a typical 400 kHz bandwidth performance,
which is well suited for use with pulsed excitation. The ADPD2212
uses very little power during operation and incorporates a
power-down pin, enabling power cycling to optimize battery
Rev. 0
life in portable applications. The ADPD2212 provides shot
noise limited performance, making it an excellent choice for
measuring signals with the highest possible fidelity in low light
conditions. This combination of low power, very high SNR, and
electromagnetic interference (EMI) immunity enables low power
system solutions not possible with traditional photodiode (PD)
and transimpedance amplifier (TIA) systems.
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ADPD2212
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Shot Noise Limited Performance ................................................9
Applications ....................................................................................... 1
Sensitivity and SNR .......................................................................9
Functional Block Diagram .............................................................. 1
Linearity..........................................................................................9
General Description ......................................................................... 1
Package Considerations ................................................................9
Revision History ............................................................................... 2
EPAD Connection .........................................................................9
Specifications..................................................................................... 3
Applications Information .............................................................. 10
Absolute Maximum Ratings............................................................ 4
Powering the Device .................................................................. 10
Thermal Resistance ...................................................................... 4
Power-Down Mode .................................................................... 10
Soldering Profile ........................................................................... 4
Pulse Mode Operation ............................................................... 10
ESD Caution .................................................................................. 4
Output Configuration ................................................................ 10
Pin Configuration and Function Descriptions ............................. 5
3-Wire Cable Voltage Configuration ....................................... 10
Typical Performance Characteristics ............................................. 6
3-Wire Current Mode Configuration ...................................... 10
Terminology ...................................................................................... 8
Evaluation Board Schematic and Layout .................................... 12
Theory of Operation ........................................................................ 9
Outline Dimensions ....................................................................... 13
Overview........................................................................................ 9
Ordering Guide .......................................................................... 13
REVISION HISTORY
4/16—Revision 0: Initial Version
Rev. 0 | Page 2 of 13
Data Sheet
ADPD2212
SPECIFICATIONS
VCC = 3.3 V, TA = 25°C, λ = 528 nm, unless otherwise noted. IPD is the photodiode current, IMOD is the modulation current, EE is
irradiance, IOUT is output current, VBIAS is the bias voltage, RFEEDBACK is the TIA feedback resistor, and RLOAD is the load resistance.
Table 1.
Parameter
GAIN
Gain (Current Amplifier)
DYNAMIC PERFORMANCE
Frequency Response Peaking
Rise Time
Fall Time
Bandwidth
OPTICAL PERFORMANCE
Diode Active Area
Saturation Irradiance
NOISE PERFORMANCE
Current Noise, Output Referred1
Current Noise Floor, Input Referred
Noise Equivalent Power
EE Required for SNR = 10000:1
POWER AND SUPPLY
Supply Voltage
Power Supply Rejection Ratio
Current
Standby
Supply at EE = 0 µW/cm2
Supply2
OUTPUT CHARACTERISTICS
Amplifier Static Bias Current
Input Referred
Output Referred
Maximum Output Voltage
Nominal Linear Output Current
Linearity into TIA
Linearity into Resistive Load
Peak Output Current3
Output Capacitance
Output Resistance
POWER-DOWN LOGIC
Input Voltage
High Level
Low Level
Leakage Current
High
Low
OPERATING AMBIENT TEMPERATURE RANGE
Symbol
Test Conditions/Comments
Min
βTLA
tR
tF
BW
NEP
VCC
PSRR
ISTANDBY
IFLOOR
ISUPPLY
10% to 90% full scale (FS) (IOUT = 24 µA)
90% to 10% FS (IOUT =24 µA)
IPD = 10 nA, IMOD = 1 nA
EE = 0 µW/cm2
IPD = 10 nA to 300 nA
IPD > 300 nA
EE = 0 µW/cm2, at 1 kHz
At 1 kHz
At 1 kHz
1.8
VCC = 1.8 V to 5.0 V, EE = 1600 µW/cm2
PWDN > VIH
IOUT = 10 µA
IOUT = 240 µA
VOUT_MAX
IOUT_FS
VBIAS = 1.3 V, RFEEDBACK = 25 kΩ
IOUT < 100 µA , RLOAD = 5 kΩ
From OUT to GND
From OUT to GND
VIH
VIL
IIH
IIL
Max
Unit
24
EE = 0 µW/cm2
EE = 0 µW/cm2
COUT
ROUT
Typ
<6
1.24
1.27
400
dB
µs
µs
kHz
2.5
1600
mm2
µW/cm2
1920
1.4 × NSHOT
1.15 × NSHOT
90
100
144
fA/√Hz
fA/√Hz
fA/√Hz
fA/√Hz
fW/√Hz
nW/cm2
3.3
120
150
5.0
1
137
166
857
µA
µA
µA
µA
10
240
VCC − 0.75
240
60
60
300
5
1000
nA
nA
V
µA
dB
dB
µA
pF
MΩ
VCC − 0.2
PWDN = 3.3 V
PWDN = 0 V
NSHOT refers to photon shot noise. Photon shot noise is the fundamental noise floor for all photodetectors in photoconductive mode.
ISUPPLY = IFLOOR + (3 × IOUT).
3
Outputs greater than IOUT_FS may have degraded performance.
2
Rev. 0 | Page 3 of 13
0.2
V
V
+85
nA
µA
°C
0.2
−8.5
−40
1
V
nA/V
ADPD2212
Data Sheet
ABSOLUTE MAXIMUM RATINGS
SOLDERING PROFILE
Rating
6.0 V
−40°C to +105°C
110°C
260°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Figure 2 and Table 4 provide information about the recommended
soldering profile.
RAMP-UP
TL
tL
TSMAX
TSMIN
tS
RAMP-DOWN
PREHEAT
t25°C TO PEAK
TIME
THERMAL RESISTANCE
Figure 2. Recommended Soldering Profile
θJA is specified for the worst case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Recommended Soldering Profile Limits1
Table 3. Thermal Resistance
Package Type
3 mm × 4 mm LFCSP
CRITICAL ZONE
TL TO TP
tP
TP
13721-022
Parameter
Supply Voltage (VCC)
Storage Temperature Range
Junction Temperature
Solder Reflow Temperature (<10 sec)
TEMPERATURE
Table 2.
θJA
66.62
θJC
11.46
Unit
°C/W
Profile Feature
Average Ramp Rate (TL to TP)
Preheat
Minimum Temperature (TSMIN)
Maximum Temperature (TSMAX)
Time from TSMIN to TSMAX (tS)
Ramp-Up Rate (TSMAX to TL)
Liquidus Temperature (TL)
Time Maintained Above TL (tL)
Peak Temperature (TP)
Time Within 5°C of Actual TP (tP)
Ramp-Down Rate
Time from 25°C (t25°C) to Peak
Temperature
1
Based on JEDEC Standard J-STD-020D.1.
ESD CAUTION
Rev. 0 | Page 4 of 13
Condition (Pb Free)
2°C/sec maximum
150°C
200°C
60 sec to 120 sec
2°C/sec maximum
217°C
60 sec to 150 sec
260°C + (0°C/−5°C)
20 sec to 30 sec
3°C/sec maximum
8 minutes maximum
Data Sheet
ADPD2212
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADPD2212
TOP VIEW
(Not to Scale)
PWDN 1
10 NIC
+
NIC 3
OUT 4
–
GND 5
9
NIC
8
NIC
7
NIC
6
NIC
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
2. THE EXPOSED PAD MUST BE LEFT FLOATING.
THE PCB AREA UNDER THE EXPOSED PAD
CAN BE LEFT BLANK TO FACILITATE
THIS REQUIREMENT.
13721-003
VCC 2
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
Mnemonic
PWDN
VCC
NIC
OUT
GND
NIC
NIC
NIC
NIC
NIC
EPAD
Description
Power-Down Input. Must be connected. Pull this pin high to disable the device.
Supply Voltage.
Not Internally Connected. This pin can be grounded.
Output Terminal.
Ground.
Not Internally Connected. This pin can be grounded.
Not Internally Connected. This pin can be grounded.
Not Internally Connected. This pin can be grounded.
Not Internally Connected. This pin can be grounded.
Not Internally Connected. This pin can be grounded.
Exposed Pad. The exposed pad must be left floating. The printed circuit board (PCB) area under the exposed pad
can be left blank to facilitate this requirement.
Rev. 0 | Page 5 of 13
ADPD2212
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
0°
–10°
–20°
1.8m
–30°
VCC
VCC
VCC
VCC
= 1.8V
= 2.5V
= 3.3V
= 5V
1.4m
SUPPLY CURRENT (A)
–40°
–50°
0.8
–60°
HORIZONTAL
VERTICAL
1.2m
1.0m
0.4
0.2
0
0.2
0.4
600µ
400µ
–70°
200µ
–80°
0.6
800µ
0.6
0
50
0
100
200
150
250
300
350
400
450
IOUT (µA)
Figure 4. Relative Radiant Sensitivity vs. Angular Displacement
13721-009
1.0
13721-004
SREL RELATIVE RADIANT SENSITIVITY
1.6m
Figure 7. Supply Current vs. Output Current (IOUT) over Supply Voltage (VCC)
9
8
NORMALIZED OUTPUT
RESPONSIVITY (A/W)
7
6
5
4
3
1µA
2
100nA
WAVELENGTH (λ)
0
13721-005
300
331
362
393
424
455
486
517
548
579
610
641
672
703
734
765
796
827
858
889
920
951
982
1013
1044
1075
0
20
40
60
80
100
TIME (µs)
13721-010
1
Figure 8. Small Signal Pulse Response
Figure 5. Responsivity vs. Wavelength
2
1µA
10µA
1µs
10µs
PWDN
OUTPUT WAVEFORM
NORMALIZED RESPONSE (dB)
0
–2
–4
–6
–8
10
30
50
TIME (µs)
–12
100
13721-007
–10
1k
10k
100k
FREQUENCY (Hz)
Figure 9. Bandwidth/Peaking
Figure 6. Power-Down Recovery Time, 1%
Rev. 0 | Page 6 of 13
1M
13721-011
–10
ADPD2212
0.25
10p
LINEARITY ERROR (%)
0.15
1p
100f
= 1.8V
= 2.5V
= 3.3V
= 4V
= 5V
0.10
0.05
0
–0.05
–0.10
–0.15
1k
100k
10k
1M
FREQUENCY (Hz)
–0.25
Figure 10. Noise Bandwidth/Peaking
0
0.15
0.10
0.05
0
–0.05
–0.10
–0.15
20
40
60
80
100
IOUT (µA)
13721-016
–40°C
+25°C
+85°C
0
60
80
100
Figure 12. Linearity Error vs. Output Current (IOUT) over Supply Voltage (VCC)
0.20
–0.25
40
IOUT (µA)
0.25
–0.20
20
13721-017
–0.20
10f
100
LINEARITY ERROR (%)
VCC
VCC
VCC
VCC
VCC
0.20
13721-014
RMS NOISE CURRENT REFERRED TO INPUT (A)
Data Sheet
Figure 11. Linearity Error vs. Output Current (IOUT) over Temperature
Rev. 0 | Page 7 of 13
ADPD2212
Data Sheet
TERMINOLOGY
Optical Power
Optical power is defined as the photon energy per unit of time
measured as radiant flux (Φ) or radiant power, which is radiant
energy (Q) per unit of time.
Responsivity
Photodiode responsivity, ρ, is a constant that correlates incident
optical power (POPT) with photodiode current (IPD) and is typically
expressed in units of amperes per watt (A/W). Responsivity is
essentially the quantum efficiency of the ability of the sensor to
convert light into electron/hole pairs and is highly dependent
upon the wavelength of the incident light as well as sensor
material and temperature.
Photodiode Area
Photodiode area is a measure of the photosensitive area of the
diode. In PIN diodes, this is the photosensitive area of intrinsic
silicon between the positive and negative doped diffusion areas.
In general, larger photodiodes demonstrate greater sensitivity as
the output signal increases linearly with photosensitive area
while noise increases at the sum of the square of the photosensitive
area. A larger photodiode area has a higher capacitance and
longer carrier diffusion paths adversely affecting bandwidth.
Photoconductive Mode
Photoconductive operation of a photodiode occurs when
photons entering the silicon generate electron/hole pairs that
are swept by the electric field to the opposite terminal. These
carriers are presented at the terminals of the photodiode as a
current proportional to the luminous flux incident on the
junction of the photodiode.
Shot Noise
Shot noise is a statistical fluctuation in any quantized signal
such as photons of light and electrons in current. The magnitude
of the shot noise is expressed as a root mean square (rms) noise
current. Shot noise is a fundamental limitation in photodetectors
and takes the form of
Shot noise = √(2qIPD)
where:
q is the charge of an electron (1.602 × 10−19 Coulomb).
IPD is the photodiode current.
Photoplethysmography (PPG)
Photoplethysmography uses light to measure biological
functions by sensing changes in the absorption spectra of soft
tissue due to changes in hemoglobin volume and composition.
Linearity
Linearity is a measure of the deviation from an ideal change
in output current relative to a change in optical power falling
on the sensor. Linearity is specified as the deviation from a best
straight line fit of the current output of the sensor over a specified range of optical power. Linearity is a critical specification in
PPG measurements due to the requirement of sensing small ac
signals impressed upon large dc offsets.
Static Bias
The ADPD2212 has an internal 10 nA bias that linearizes the
input current mirror at low input levels and prevents transient
reverse bias of the amplifier input stage. This bias is fixed and
appears on the output as a 240 nA typical offset.
Noise Equivalent Power (NEP)
Noise equivalent power is the amount of incident light power
on a photodetector, which generates a photocurrent equal to the
total noise current of the sensor. The noise level is proportional
to the square root of the frequency bandwidth; therefore, NEP
is specified with a 1 Hz bandwidth. NEP is the fundamental
baseline of the detectivity of the sensor.
Rev. 0 | Page 8 of 13
Data Sheet
ADPD2212
THEORY OF OPERATION
OVERVIEW
LINEARITY
The ADPD2212 is an integrated, low power, optical sensor
composed of a deep junction silicon photodiode coupled to a
low noise current amplifier in an optically transparent chip
scale package. The ADPD2212 is optimized for batterypowered, wearable, medical, and industrial optical sensing
applications requiring low power and high SNR.
Linearity is critical to PPG due to the need to accurately extract
a small amplitude, pulsatile ac signal modulated onto the large
dc component, which is caused by nonpulsatile tissue absorption
and ambient light. In pulsed light applications, bandwidth is a
critical component of the linearity because fast recovery of the
device from dark and/or power-down conditions can have a
profound effect on the ability of the sensor to extract the signal
of interest. The ADPD2212 is production trimmed to ensure
60 dB linearity at an irradiance of up to EE = 1600 µW/cm2, λ =
528 nm, at a supply voltage of 3.3 V.
SHOT NOISE LIMITED PERFORMANCE
The on-board photodiode of the ADPD2212 is operated in
photoconductive mode with a zero bias voltage. This mode of
operation allows the diode to operate with no dc dark current
caused by leakage across the depletion area of the diode,
providing a fundamental limit of shot noise. The noise level is
proportional to the square root of the frequency bandwidth.
SENSITIVITY AND SNR
SNR is a measure of the ability of the sensor to separate the
signal of interest from spurious signals that occur from the
surrounding environment of the device, such as ambient light,
nonlinearity, and noise within the device itself.
The ADPD2212 operates its integrated photodiode in a zero
biased photoconductive mode to provide near zero dark current
and, therefore, no dark shot noise component contribution
from the photodiode. The integrated current amplifier requires
an internal bias current of 10 nA to improve bandwidth and
linearize response at low light levels. This bias generates a shot
noise component of 90 fA/√Hz at the output of the current
amplifier and establishes the noise floor of the ADPD2212.
To optimize the sensitivity of the ADPD2212, it is important to
ensure that the optical signal is concentrated on the photoactive
area of the integrated photodiode. The on-board precision
current amplifier is shielded and is not significantly affected by
light hitting its surface, but device sensitivity is based solely on
the optical power incident to the photodetector.
PACKAGE CONSIDERATIONS
The ADPD2212 is packaged with a transparent epoxy molding
compound. To maintain optimum sensitivity, take care in
handling the device to prevent scratches or chemicals that may
affect the surface finish above the photodiode. Due to the lack
of stabilizing fillers (typically up to 70% silica) used in opaque
molding compounds, the maximum storage temperature of the
ADPD2212 is 105°C. The temperature profile for soldering is
shown in Figure 2.
EPAD CONNECTION
The EPAD on the ADPD2212 acts as a common electrical, thermal,
and mechanical platform for the photodiode and amplifier and
must not be connected externally. External cooling is not required
due to the extremely low power consumption of the ADPD2212.
Analog Devices, Inc., recommends removal of traces beneath the
device to eliminate potential coupling of external signals into the
sensitive internal nodes of the ADPD2212.
Rev. 0 | Page 9 of 13
ADPD2212
Data Sheet
APPLICATIONS INFORMATION
OUTPUT CONFIGURATION
The current output of the ADPD2212 provides flexibility in
interfacing to external circuitry.
POWERING THE DEVICE
The ADPD2212 is powered from a single positive 1.8 V to 5.0 V
supply. The ADPD2212 features high PSRR, but proper circuit
layout and bypassing is recommended to provide maximum
sensitivity, especially in situations where the ADPD2212 may share
reference nodes with transmitters in pulse mode applications.
Above the quiescent current of the integrated current amplifier,
there is a linear relationship to incident light as the current
amplifier amplifies the photodiode output by a factor of 24. In
typical battery-powered operation, the output of the source
LEDs is dynamically reduced to save power based on the received
signal strength of the photosensor. The extremely low noise
floor of the ADPD2212 provides very high SNR, allowing
accurate signal extraction with minimal source power and at
low incident optical power.
POWER-DOWN MODE
The ADPD2212 is optimized for battery-powered operation by
the inclusion of an extremely low power standby mode that can
be quickly switched to provide ultralow power consumption
during dark periods in pulsed or mode locked applications,
where the light source is cycled to improve ambient light
rejection and reduce transmitter power consumption. The
power-down pin is not internally pulled up or down, and must
be connected to an external logic level for proper operation of
the ADPD2212.
PULSE MODE OPERATION
The ADPD2212 is optimized for battery-powered operation by
the inclusion of a power-down pin (PWDN). When sensing is
inactive, the ADPD2212 can be quickly switched into standby
mode, reducing the supply current to 1 µA during dark periods
for pulsed or mode locked applications, where the light source
is cycled to improve ambient light rejection and reduce
transmitter power consumption.
For multiple wavelength systems, sequentially pulsing the optical
emitters removes the need for multiple narrow bandwidth sensors.
For both multiple wavelength (SpO2) and single wavelength
(heart rate monitoring) systems, pulsed operation can provide
significant power savings for battery-powered systems. Pulsed
mode operation provides a calibration signal that is necessary to
compensate for ambient light diffused throughout the tissue,
which can be extracted by measuring the sensor output while
the system emitters are off. Advanced algorithms can then extract
the signal of interest from dc offsets, noise, and interferer signals
such as motion artifacts.
The output of the ADPD2212 allows different configurations
depending on the application. The current gain of the ADPD2212
reduces the effect of surrounding interferers but, for best performance, careful design and layout is still necessary to achieve the
best performance. The effect of capacitance on the output must
be considered carefully regardless of configuration as bandwidth
and response time of the system can be limited simply by the
time required to charge and discharge parasitics.
Because the ADPD2212 is effectively a current source, the
ADPD2212 output voltage drifts up to its compliance voltage,
approximately 1.2 V below VCC, when connected to an interface
that presents a high impedance. The rate of this drift is dependent
on the ADPD2212 output current, parasitic capacitance, and the
impedance of the load. This drift can require additional settling
time in circuits following the ADPD2212 if they are actively
multiplexing the output of the ADPD2212 or presenting a high
impedance due to power cycling. For multiplexed systems, a
current steering architecture may offer a performance advantage
over a break-before-make switch matrix.
3-WIRE CABLE VOLTAGE CONFIGURATION
The ADPD2212 can be used in a minimal 3-wire voltage
configuration, offering a compact solution with very few
components (see Figure 13). A shunt resistor (RS) sets the
transimpedance gain in front of the analog-to-digital converter
(ADC). This configuration allows flexibility in matching the
ADC converter full-scale input to the full-scale output of the
ADPD2212. The dynamic range of the interface is limited to
the compliance voltage of the ADPD2212.
No additional amplification is needed prior to the ADC. Response
time at the lower end of the range is limited by the ability of the
output current to charge the parasitic capacitance presented to
the output of the ADPD2212.
3-WIRE CURRENT MODE CONFIGURATION
When used in the 3-wire current mode configuration with a
photodiode (see Figure 14), the ADPD2212 is insensitive to load
resistance and can be used when the signal processing is further
from the sensor. EMI noise and shielding requirements are
minimized; however, cable capacitance has a direct effect on
bandwidth, making the 3-wire current mode configuration a
better choice for unshielded interfaces. The feedback capacitance
(CF) value must be chosen carefully to eliminate stability and
bandwidth degradation of the ADPD2212. Large capacitance
around the feedback loop of the TIA has a direct effect on the
bandwidth of the system.
Rev. 0 | Page 10 of 13
Data Sheet
ADPD2212
ADPD2212
3.3V
VCC
3.3V
+
CURRENT
AMPLIFIER
–
OUT
ADC AND
MICROPROCESSOR
RS
13721-023
GND
Figure 13. ADPD2212 Used in 3-Wire Cable Voltage Configuration
ADPD2212
CF
VCC
3.3V
3.3V
OUT
TIA
ADC AND
MICROPROCESSOR
0V TO VCC – 0.75
GND
13721-024
+
CURRENT
AMPLIFIER
–
RF
Figure 14. ADPD2212 Used in 3-Wire Current Mode Configuration
Rev. 0 | Page 11 of 13
ADPD2212
Data Sheet
EVALUATION BOARD SCHEMATIC AND LAYOUT
13721-028
Figure 17 shows the evaluation board schematic. Figure 15 and
Figure 16 show the evaluation board layout for the top and
bottom layers, respectively.
13721-027
Figure 16. ADPD2212 Evaluation Board Bottom Layer
Figure 15. ADPD2212 Evaluation Board Top Layer
PWDN
EVALZ-ADPD2212
R2B
100kΩ
U1A
C1B
0.01µF
C2B
1µF
2
3
4
OUT
R1B DNI
100kΩ
5
PWDN
NIC
VCC
NIC
NIC
NIC
OUT
NIC
NIC
GND
GND
10
9
8
7
6
EPAD
C3B DNI
0.01µF
13721-026
1
VCC
Figure 17. ADPD2212 Evaluation Board Schematic (Do Not Install C3B)
Rev. 0 | Page 12 of 13
Data Sheet
ADPD2212
OUTLINE DIMENSIONS
3.10
3.00
2.90
2.24
2.14
2.04
10
6
4.10
4.00
3.90
PIN 1 INDEX
AREA
EXPOSED
PAD
0.45
0.40
0.35
TOP VIEW
5
2.50
2.40
2.30
1
BOTTOM VIEW
0.20 MIN
0.50 BSC
SEATING
PLANE
0.30
0.25
0.20
0.050 MAX
0.035 NOM
COPLANARITY
0.08
0.203 REF
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
10-31-2013-A
PKG-004256
0.70
0.65
0.60
Figure 18. 10-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 4 mm Body and 0.65 mm Package Height
(CP-10-33)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADPD2212ACPZ-R7
ADPD2212ACPZ-RL
EVALZ-ADPD2212
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
Package Description
10-Lead Lead Frame Chip Scale Package [LFCSP]
10-Lead Lead Frame Chip Scale Package [LFCSP]
Evaluation Board
Z = RoHS Compliant Part.
©2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13721-0-4/16(0)
Rev. 0 | Page 13 of 13
Package Option
CP-10-13
CP-10-13
Ordering Quantity
1500
5000
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