TI1 AMC1300DWV Precision, -250-mv input, reinforced isolated amplifier Datasheet

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AMC1300, AMC1300B
SBAS895 – MAY 2018
AMC1300x Precision, ±250-mV Input, Reinforced Isolated Amplifier
1 Features
3 Description
•
The AMC1300 is a precision, isolated amplifier with
an output separated from the input circuitry by an
isolation barrier that is highly resistant to magnetic
interference. This barrier is certified to provide
reinforced galvanic isolation of up to 5 kVRMS
according to VDE V 0884-11 and UL1577. Used in
conjunction with isolated power supplies, this isolated
amplifier separates parts of the system that operate
on different common-mode voltage levels and
protects lower-voltage parts from damage.
1
•
•
•
•
•
•
•
•
±250-mV Input Voltage Range Optimized for
Current Measurement Using Shunt Resistors
Low Offset Error and Drift:
– AMC1300B: ±0.2 mV (max), ±3 µV/°C (max)
– AMC1300: ±2 mV (max), ±4 µV/°C (max)
Fixed Gain: 8.2
Very Low Gain Error and Drift:
– AMC1300B: ±0.3% (max), ±50 ppm/°C (max)
– AMC1300: ±1% (max), ±50 ppm/°C (typ)
Low Nonlinearity and Drift: 0.03%, 1 ppm/°C (typ)
3.3-V Operation on High-Side (AMC1300B)
System-Level Diagnostic Features
Safety-Related Certifications:
– 7071-VPK Reinforced Isolation per DIN V VDE
V 0884-11: 2017-01
– 5000-VRMS Isolation for 1 Minute per UL1577
High CMTI on AMC1300B: 140 kV/µs (typ)
2 Applications
•
Shunt-Resistor-Based Current Sensing In:
– Motor Drives
– Frequency Inverters
– Uninterruptible Power Supplies
The input of the AMC1300 is optimized for direct
connection to shunt resistors or other low voltagelevel signal sources. The excellent performance of
the device supports accurate current control resulting
in system-level power savings and, especially in
motor control applications, lower torque ripple. The
integrated common-mode overvoltage and missing
high-side supply voltage detection features of the
AMC1300
simplify
system-level
design
and
diagnostics.
The AMC1300 is offered with two performance grade
options: the AMC1300B is specified over the
extended industrial temperature range of –55°C to
+125°C, and the AMC1300 for operation at –40°C to
+125°C.
Device Information(1)
PART NUMBER
AMC1300
PACKAGE
SOIC (8)
BODY SIZE (NOM)
5.85 mm × 7.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
Floating
Power Supply
HV+
AMC1300B
VDD1
GND1
RSHUNT
RFLT
INN
to Load
RFLT
CFLT
INP
VDD2
Reinforced Isolation
3.3 V or 5.0 V
3.3 V, or 5.0 V
GND2
OUTP
OUTN
ADS7263
14-Bit ADC
Diagnostics
HV-
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
AMC1300, AMC1300B
SBAS895 – MAY 2018
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
8
8.2 Functional Block Diagram ....................................... 18
8.3 Feature Description................................................. 18
8.4 Device Functional Modes........................................ 20
1
1
1
2
3
3
4
9
Application and Implementation ........................ 21
9.1 Application Information............................................ 21
9.2 Typical Application .................................................. 21
9.3 Do's and Don'ts ...................................................... 23
10 Power Supply Recommendations ..................... 24
11 Layout................................................................... 25
Absolute Maximum Ratings ...................................... 4
ESD Ratings.............................................................. 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 5
Power Ratings........................................................... 5
Insulation Specifications............................................ 6
Safety-Related Certifications..................................... 7
Safety Limiting Values .............................................. 7
Electrical Characteristics........................................... 7
Switching Characteristics ........................................ 9
Insulation Characteristics Curves ......................... 10
Typical Characteristics .......................................... 11
11.1 Layout Guidelines ................................................. 25
11.2 Layout Example .................................................... 25
12 Device and Documentation Support ................. 26
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Documentation Support .......................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
26
26
26
26
27
27
27
13 Mechanical, Packaging, and Orderable
Information ........................................................... 27
Detailed Description ............................................ 18
8.1 Overview ................................................................. 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
2
DATE
REVISION
NOTES
May 2018
*
Initial release.
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5 Device Comparison Table
PARAMETER
High-side supply voltage, VDD1
Specified ambient temperature, TA
4.5 V ≤ VDD1 ≤ 5.5 V
Input offset voltage, VOS
AMC1300B
AMC1300
3.0 V to 5.5 V
4.5 V to 5.5 V
–55°C to +125°C
–40°C to +125°C
±2 mV
±0.2 mV
3.0 V ≤ VDD1 ≤ 4.5 V
Input offset drift, TCVOS
Gain error, EG
Gain error drift, TCEG
Not applicable
±3 µV/°C (max)
±4 µV/°C (max)
±0.3%
±1%
±15 ppm/°C (typ), ±50 ppm/°C (max)
±50 ppm/°C (typ)
75 kV/µs (min), 140 kV/µs (typ)
15 kV/µs (min), 30 kV/µs (typ)
250 kHz (min), 310 kHz (typ)
170 kHz (min), 230 kHz (typ)
3 µs (max)
3.4 µs (max)
Common-mode transient immunity, CMTI
Output bandwidth, BW
INP, INN to OUTP, OUTN signal delay (50% – 90%)
6 Pin Configuration and Functions
DWV Package
8-Pin SOIC
Top View
VDD1
1
8
VDD2
INP
2
7
OUTP
INN
3
6
OUTN
GND1
4
5
GND2
Not to scale
Pin Functions
PIN
NO.
1
NAME
TYPE
DESCRIPTION
High-side power supply, 3.0 V to 5.5 V for the AMC1300B (4.5 V to 5.5 V for the AMC1300),
relative to GND1. See the Power Supply Recommendations section for power-supply decoupling
recommendations.
VDD1
—
2
INP
I
Noninverting analog input
3
INN
I
Inverting analog input
4
GND1
—
High-side analog ground
5
GND2
—
Low-side analog ground
6
OUTN
O
Inverting analog output
7
OUTP
O
Noninverting analog output
8
VDD2
—
Low-side power supply, 3.0 V to 5.5 V. See the Power Supply Recommendations section for
power-supply decoupling recommendations.
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7 Specifications
7.1 Absolute Maximum Ratings (1)
Power-supply voltage
MIN
MAX
VDD1 to GND1
–0.3
6.5
VDD2 to GND2
–0.3
6.5
GND1 – 6
VDD1 + 0.5
GND2 – 0.5
VDD2 + 0.5
V
–10
10
mA
Input voltage
INP, INN
Output voltage
OUTP, OUTN
Input current
Continuous, any pin except power-supply pins
Temperature
(1)
Junction, TJ
UNIT
V
150
Storage, Tstg
–65
V
°C
150
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating ambient temperature range (unless otherwise noted)
MIN
NOM
MAX
VDD1 to GND1, AMC1300
4.5
5
5.5
VDD1 to GND1, AMC1300B
3.0
5
5.5
VDD2 to GND2
3.0
3.3
5.5
UNIT
POWER SUPPLY
High-side power supply
Low-side power supply
V
V
ANALOG INPUTS
VClipping
Differential input voltage before clipping
output
VIN = VINP – VINN
VFSR
Specified linear differential input full-scale
VIN = VINP – VINN
Absolute common-mode input voltage
VCM
(1)
Operating common-mode input voltage
(VINP + VINN) / 2 to GND1
±320
–250
mV
250
mV
–2
VDD1
V
–0.16
VDD1 –
2.1
V
AMC1300
–40
125
AMC1300B
–55
125
(VINP + VINN) / 2 to GND1
TEMPERATURE RANGE
TA
(1)
4
Specified ambient temperature
°C
Steady-state voltage supported by the device in case of a system failure. See the specified common-mode input voltage VCM for normal
operation. Observe analog input voltage range as specified in the Absolute Maximum Ratings table.
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7.4 Thermal Information
AMC1300x
THERMAL METRIC (1)
DWV (SOIC)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
85.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
26.8
°C/W
RθJB
Junction-to-board thermal resistance
43.5
°C/W
ψJT
Junction-to-top characterization parameter
4.8
°C/W
ψJB
Junction-to-board characterization parameter
41.2
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Power Ratings
PARAMETER
TEST CONDITIONS
PD
Maximum power dissipation (both sides)
PD1
Maximum power dissipation (high-side supply)
PD2
Maximum power dissipation (low-side supply)
VALUE
VDD1 = VDD2 = 5.5 V
98.45
VDD1 = VDD2 = 3.6 V, AMC1300B only
56.52
VDD1 = 5.5 V
53.90
VDD1 = 3.6 V, AMC1300B only
30.60
VDD2 = 5.5 V
44.55
VDD2 = 3.6 V
25.92
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UNIT
mW
mW
mW
5
AMC1300, AMC1300B
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7.6 Insulation Specifications
over operating ambient temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VALUE
UNIT
GENERAL
CLR
External clearance (1)
Shortest pin-to-pin distance through air
≥9
mm
CPG
External creepage (1)
Shortest pin-to-pin distance across the package surface
≥9
mm
DTI
Distance through insulation
Minimum internal gap (internal clearance) of the double insulation
(2 × 0.0105 mm)
≥ 0.021
mm
CTI
Comparative tracking index
DIN EN 60112 (VDE 0303-11); IEC 60112
≥ 600
V
Material group
According to IEC 60664-1
Overvoltage category
per IEC 60664-1
I-IV
Rated mains voltage ≤ 600 VRMS
I-IV
Rated mains voltage ≤ 1000 VRMS
I-III
DIN V VDE V 0884-11 (VDE V 0884-11): 2017-01
VIORM
Maximum repetitive peak
isolation voltage
VIOWM
I
Rated mains voltage ≤ 300 VRMS
(2)
At AC voltage
2121
VPK
Maximum-rated isolation
working voltage
At AC voltage (sine wave); see Figure 4
1500
VRMS
At DC voltage
2121
VDC
VIOTM
Maximum transient isolation
voltage
VTEST = VIOTM, t = 60 s (qualification test)
7071
VTEST = 1.2 × VIOTM, t = 1 s (100% production test)
8485
VIOSM
Maximum surge isolation
voltage (3)
Test method per IEC 60065, 1.2/50-µs waveform,
VTEST = 1.6 × VIOSM = 12800 VPK (qualification)
8000
Apparent charge (4)
qpd
Barrier capacitance,
input to output (5)
CIO
Insulation resistance,
input to output (5)
RIO
Method a, after input/output safety test subgroup 2 / 3,
Vini = VIOTM, tini = 60 s,
Vpd(m) = 1.2 × VIORM = 2545 VPK, tm = 10 s
≤5
Method a, after environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s,
Vpd(m) = 1.6 × VIORM = 3394 VPK, tm = 10 s
≤5
Method b1, at routine test (100% production) and preconditioning (type test),
Vini = VIOTM, tini = 1 s,
Vpd(m) = 1.875 × VIORM = 3977 VPK, tm = 1 s
≤5
VIO = 0.5 VPP at 1 MHz
~1
VPK
VPK
pC
pF
12
VIO = 500 V at TA = 25°C
> 10
VIO = 500 V at 100°C ≤ TA ≤ 125°C
> 1011
VIO = 500 V at TS = 150°C
> 109
Pollution degree
2
Climatic category
55/125/21
Ω
UL1577
VISO
(1)
(2)
(3)
(4)
(5)
6
Withstand isolation voltage
VTEST = VISO = 5000 VRMS or 7000 VDC, t = 60 s (qualification),
VTEST = 1.2 × VISO = 6000 VRMS, t = 1 s (100% production test)
5000
VRMS
Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Care must be
taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed
circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal in certain cases. Techniques such as
inserting grooves, ribs, or both on a PCB are used to help increase these specifications.
This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by
means of suitable protective circuits.
Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
Apparent charge is electrical discharge caused by a partial discharge (pd).
All pins on each side of the barrier are tied together, creating a two-pin device.
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7.7 Safety-Related Certifications
VDE
UL
Certified according to DIN V VDE V 0884-11 (VDE V 0884-11):
2017-01, DIN EN 60950-1 (VDE 0805 Teil 1): 2014-08, and
DIN EN 60065 (VDE 0860): 2005-11
Recognized under 1577 component recognition and
CSA component acceptance NO 5 programs
Reinforced insulation
Single protection
Certificate number: 40040142
File number: E181974
7.8 Safety Limiting Values
Safety limiting intends to minimize potential damage to the isolation barrier upon failure of input or output circuitry.
PARAMETER
TEST CONDITIONS
Safety input, output, or supply
current
IS
PS
Safety input, output, or total
power (1)
TS
Maximum safety temperature
(1)
MIN
TYP
MAX
UNIT
RθJA = 85.4°C/W, TJ = 150°C, TA = 25°C,
VDD1 = VDD2 = 5.5 V, see Figure 2
266
RθJA = 85.4°C/W, TJ = 150°C, TA = 25°C,
VDD1 = VDD2 = 3.6 V, AMC1300B only, see Figure 2
406
RθJA = 85.4°C/W, TJ = 150°C, TA = 25°C, see Figure 3
1463
mW
150
°C
mA
The maximum safety temperature, TS, has the same value as the maximum junction temperature, TJ, specified for the device. The IS
and PS parameters represent the safety current and safety power, respectively. Do not exceed the maximum limits of IS and PS. These
limits vary with the ambient temperature, TA.
The junction-to-air thermal resistance, RθJA, in the Thermal Information table is that of a device installed on a high-K test board for
leaded surface-mount packages. Use these equations to calculate the value for each parameter:
TJ = TA + RθJA × P, where P is the power dissipated in the device.
TJ(max) = TS = TA + RθJA × PS, where TJ(max) is the maximum junction temperature.
PS = IS × LDOINmax, where LDOINVmax is the maximum supply voltage.
7.9 Electrical Characteristics
minimum and maximum specifications of the AMC1300 apply from TA = –40°C to +125°C, VDD1 = 4.5 V to 5.5 V,
VDD2 = 3.0 V to 5.5 V, INP = –250 mV to +250 mV, and INN = GND1 = 0 V; minimum and maximum specifications of the
AMC1300B apply from TA = –55°C to +125°C, VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, INP = –250 mV to +250 mV,
and INN = GND1 = 0 V; typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG INPUT
VCMov
Common-mode overvoltage
detection level
VDD1 – 2
Hysteresis of common-mode
overvoltage detection level
VOS
Input offset voltage
(1)
V
95
AMC1300, initial, at TA = 25°C,
VINP = VINN = GND1
mV
–2
±0.01
2
–0.2
±0.01
0.2
AMC1300
–4
±1.3
4
AMC1300B
–3
±1
3
AMC1300B, initial, at TA = 25°C,
VINP = VINN = GND1
mV
TCVOS
Input offset drift (1)
CMRR
Common-mode rejection ratio
CIN
Single-ended input capacitance INN = GND1, fIN = 275 kHz
2
CIND
Differential input capacitance
fIN = 275 kHz
1
pF
RIN
Single-ended input resistance
INN = GND1
19
kΩ
RIND
Differential input resistance
22
kΩ
IIB
Input bias current
TCIIB
Input bias current drift
±1
nA/°C
IIO
Input offset current
±5
nA
(1)
fIN = 0 Hz, VCM min ≤ VCM ≤ VCM max
–100
fIN = 10 kHz, VCM min ≤ VCM ≤ VCM max
INP = INN = GND1, IIB = (IIBP + IIBN) / 2
µV/°C
dB
–98
–41
–30
pF
–24
µA
The typical value includes one sigma statistical variation.
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Electrical Characteristics (continued)
minimum and maximum specifications of the AMC1300 apply from TA = –40°C to +125°C, VDD1 = 4.5 V to 5.5 V,
VDD2 = 3.0 V to 5.5 V, INP = –250 mV to +250 mV, and INN = GND1 = 0 V; minimum and maximum specifications of the
AMC1300B apply from TA = –55°C to +125°C, VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, INP = –250 mV to +250 mV,
and INN = GND1 = 0 V; typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
–1%
0.4%
1%
–0.3% ±0.05%
0.3%
UNIT
ANALOG OUTPUT
Nominal gain
Gain error (1)
EG
Gain error drift (1)
TCEG
8.2
AMC1300, initial, at TA = 25°C
AMC1300B, initial, at TA = 25°C
AMC1300
AMC1300B
Nonlinearity (1)
±50
–50
±15
50
–0.03% ±0.01%
0.03%
Nonlinearity drift
THD
SNR
Total harmonic distortion
VIN = 0.5 V, fIN = 10 kHz, BW = 100 kHz
Output noise
VINP = VINN = GND1, BW = 100 kHz
Signal-to-noise ratio
VIN = 0.5 V, fIN = 1 kHz, BW = 10 kHz
80
VIN = 0.5 V, fIN = 10 kHz, BW = 100 kHz
Power-supply rejection ratio (2)
Common-mode output voltage
VFAILSAFE
Failsafe differential output
voltage
BW
Output bandwidth
ROUT
Output resistance
PSRR vs VDD1, 100-mV and 10-kHz ripple
Common-mode transient
immunity
dB
230
µVRMS
85
dB
–96
PSRR vs VDD2, at DC
dB
–106
–86
1.39
VCM ≥ VCMov or VDD1 missing
1.44
1.49
V
–2.6
–2.5
V
AMC1300
170
230
AMC1300B
250
310
On OUTP or OUTN
kHz
< 0.2
Output short-circuit current
CMTI
ppm/°C
–85
–103
PSRR vs VDD2, 100-mV and 10-kHz ripple
VCMout
ppm/°C
±1
72
PSRR vs VDD1, at DC
PSRR
V/V
Ω
±13
mA
|GND1 – GND2| = 1 kV, AMC1300
15
30
|GND1 – GND2| = 1 kV, AMC1300B
75
140
1.75
2.53
2.7
AMC1300B only, 3.0 V ≤ VDD1 ≤ 3.6 V
6.3
8.5
4.5 V ≤ VDD1 ≤ 5.5 V
7.2
9.8
3.0 V ≤ VDD2 ≤ 3.6 V
5.3
7.2
4.5 V ≤ VDD2 ≤ 5.5 V
5.9
8.1
kV/µs
POWER SUPPLY
VDD1UV
VDD1 undervoltage detection
threshold voltage
IDD1
High-side supply current
IDD2
Low-side supply current
(2)
8
VDD1 falling
V
mA
mA
This parameter is output referred.
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7.10 Switching Characteristics
over operating ambient temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
tr
Rise time of OUTP, OUTN
See Figure 1
1.3
tf
Fall time of OUTP, OUTN
See Figure 1
1.3
INP, INN to OUTP, OUTN
signal delay (50% – 10%)
AMC1300, unfiltered output, see Figure 1
1.5
2.2
1
1.5
INP, INN to OUTP, OUTN
signal delay (50% – 50%)
AMC1300, unfiltered output, see Figure 1
2
2.7
AMC1300B, unfiltered output, see Figure 1
1.6
2.1
INP, INN to OUTP, OUTN
signal delay (50% – 90%)
AMC1300, unfiltered output, see Figure 1
2.7
3.4
AMC1300B, unfiltered output, see Figure 1
2.5
3
VDD1 step to 3.0 V with VDD2 ≥ 3.0 V,
to OUTP, OUTN valid, 0.1% settling
500
tAS
AMC1300B, unfiltered output, see Figure 1
Analog settling time
UNIT
µs
µs
µs
µs
µs
µs
0.25 V
INP - INN
50%
0V
50% - 50%
50% - 90%
50% - 10%
OUTP
50%
10%
90%
VCMout
OUTN
tr
tf
Figure 1. Rise, Fall, and Delay Time Waveforms
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7.11 Insulation Characteristics Curves
1600
500
VDD1 = VDD2 = 3.6 V
VDD1 = VDD2 = 5.5 V
1400
400
300
PS (mW)
IS (mA)
1200
200
1000
800
600
400
100
200
0
0
0
25
50
75
TA (°C)
100
125
0
150
Figure 2. Thermal Derating Curve for Safety-Limiting
Current per VDE
50
100
125
150
D002
Safety Margin Zone: 1800 VRMS , 254 Years
Operating Zone: 1500 VRMS , 135 Years
TDDB Line (<1 PPM Fail Rate)
1E+10
1E+9
75
TA (°C)
Figure 3. Thermal Derating Curve for Safety-Limiting
Power per VDE
1E+11
Time to Fail (sec)
25
D001
87.5%
1E+8
1E+7
1E+6
1E+5
1E+4
1E+3
20%
1E+2
9000
9500
8500
8000
7500
7000
6500
6000
5500
5000
4500
4000
3500
3000
2500
2000
1500
500
1000
1E+1
Stress Voltage (V RMS)
TA up to 150°C, stress-voltage frequency = 60 Hz,
isolation working voltage = 1500 VRMS, operating lifetime = 135 year
Figure 4. Reinforced Isolation Capacitor Lifetime Projection
10
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7.12 Typical Characteristics
at VDD1 = 5 V, VDD2 = 3.3 V, VINP = –250 mV to 250 mV, VINN = 0 V, and fIN = 10 kHz (unless otherwise noted)
3.8
3.3
3.4
3.25
3.2
VCMov (V)
VCMov (V)
3
2.6
2.2
1.8
3.15
3.1
3.05
3
1.4
2.95
1
3
3.25
3.5
3.75
4
4.25 4.5
VDD1 (V)
4.75
5
5.25
2.9
-55 -40 -25 -10
5.5
5
D003
20 35 50 65
Temperature (qC)
80
95 110 125
D004
–55°C ≤ TA < –40°C for AMC1300B only
Figure 5. Common-Mode Overvoltage Detection Level
vs High-Side Supply Voltage
Figure 6. Common-Mode Overvoltage Detection Level
vs Temperature
50
200
vs VDD1
vs VDD2
150
40
30
VOS (PV)
Devices (%)
100
20
50
0
-50
-100
10
-150
-200
200
175
150
125
75
100
50
0
25
-25
-50
-75
-100
-125
-150
-175
-200
0
3
VOS (PV)
3.75
4
4.25 4.5
VDDx (V)
4.75
5
5.25
5.5
D006
Figure 8. Input Offset Voltage vs Supply Voltage
Figure 7. Input Offset Voltage Histogram
200
200
Device 1
Device 2
Device 3
150
100
100
50
50
0
0
-50
-50
-100
-100
-150
-150
-25
-10
5
20 35 50 65
Temperature (°C)
80
95
Device 1
Device 2
Device 3
150
VOS (PV)
VOS (PV)
3.5
3 V ≤ VDD1 < 4.5 V for AMC1300B only
AMC1300B
-200
-40
3.25
D005
110 125
-200
-55 -40 -25 -10
D007
AMC1300
5
20 35 50 65
Temperature (°C)
80
95 110 125
D008
AMC1300B
Figure 9. Input Offset Voltage vs Temperature
Figure 10. Input Offset Voltage vs Temperature
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Typical Characteristics (continued)
at VDD1 = 5 V, VDD2 = 3.3 V, VINP = –250 mV to 250 mV, VINN = 0 V, and fIN = 10 kHz (unless otherwise noted)
90
0
80
-20
60
-40
CMRR (dB)
Devices (%)
70
50
40
30
-60
-80
20
-100
10
-120
0.001
3
2.5
2
1.5
1
0
0.5
-1
-0.5
-1.5
-2
-2.5
-3
0
0.01
0.1
D009
TCVOS (PV/qC)
1
fIN (kHz)
10
100
1000
D010
AMC1300B
Figure 12. Common-Mode Rejection Ratio
vs Input Frequency
Figure 11. Input Offset Drift Histogram
-70
25
-75
15
5
-85
IIB (PA)
CMRR (dB)
-80
-90
-5
-15
-95
-25
-100
-35
-105
-110
-55 -40 -25 -10
5
20 35 50 65
Temperature (°C)
80
-45
-0.5
95 110 125
0
0.5
1
1.5
VCM (V)
D011
2
2.5
3
D012
–55°C ≤ TA < –40°C for AMC1300B only
Figure 14. Input Bias Current
vs Common-Mode Input Voltage
-23
-23
-25
-25
-27
-27
-29
-29
IIB (PA)
IIB (PA)
Figure 13. Common-Mode Rejection Ratio
vs Temperature
-31
-33
-31
-33
-35
-35
-37
-37
-39
-39
-41
3
3.25
3.5
3.75
4
4.25 4.5
VDD1 (V)
4.75
5
5.25
5.5
-41
-55 -40 -25 -10
D013
5
20 35 50 65
Temperature (°C)
80
95 110 125
D014
–55°C ≤ TA < –40°C for AMC1300B only
Figure 15. Input Bias Current
vs High-Side Supply Voltage
12
Figure 16. Input Bias Current vs Temperature
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Typical Characteristics (continued)
at VDD1 = 5 V, VDD2 = 3.3 V, VINP = –250 mV to 250 mV, VINN = 0 V, and fIN = 10 kHz (unless otherwise noted)
50
0.5
0.4
40
0.3
EG (%)
Devices (%)
0.2
30
20
0.1
0
-0.1
-0.2
10
-0.3
0
-0.5
AMC1300 vs VDD1
AMC1300 vs VDD2
AMC1300B vs VDD1
AMC1300B vs VDD1
EG (%)
0.3
0.25
0.2
0.15
0.1
0
0.05
-0.1
-0.05
-0.15
-0.2
-0.25
-0.3
-0.4
3
3.25
3.5
3.75
D019
4
4.25 4.5
VDDx (V)
4.75
5
5.25
5.5
D015
AMC1300B
Figure 18. Gain Error vs Supply Voltage
Figure 17. Gain Error Histogram
0.3
1
Device 1
Device 2
Device 3
0.8
0.2
0.6
0.1
0.2
EG (%)
EG (%)
0.4
0
-0.2
0
-0.1
-0.4
-0.6
Device 1
Device 2
Device 3
-0.8
-1
-40
-25
-10
5
20 35 50 65
Temperature (°C)
80
95
-0.2
-0.3
-55 -40 -25 -10
110 125
5
D016
AMC1300
80
95 110 125
D017
AMC1300B
Figure 19. Gain Error vs Temperature
Figure 20. Gain Error vs Temperature
35
5
0
Normalized Gain (dB)
30
25
Devices (%)
20 35 50 65
Temperature (°C)
20
15
10
-5
-10
-15
-20
-25
-30
5
AMC1300B
AMC1300
-35
0
45
40
35
30
25
20
15
10
5
-5
-10
-15
-20
-25
-30
-35
-40
-45
-40
1
10
TCEG (ppm/qC)
100
1000
fIN (kHz)
D018
D020
AMC1300B
Figure 21. Gain Error Drift Histogram
Figure 22. Normalized Gain vs Input Frequency
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Typical Characteristics (continued)
at VDD1 = 5 V, VDD2 = 3.3 V, VINP = –250 mV to 250 mV, VINN = 0 V, and fIN = 10 kHz (unless otherwise noted)
0°
5
-45°
4.5
VOUTN
VOUTP
4
-90°
VOUT (V)
Output Phase
3.5
-135°
-180°
-225°
3
2.5
2
1.5
-270°
1
-315°
AMC1300B
AMC1300
0.5
-360°
1
10
100
0
-350
1000
fIN (kHz)
-250
-150
-50
50
150
Differential Input Voltage (mV)
D021
Figure 23. Output Phase vs Input Frequency
250
350
D022
Figure 24. Output Voltage vs Input Voltage
0.03
0.03
vs VDD1
vs VDD2
0.025
0.02
0.02
0.01
Nonlinearity (%)
Nonlinearity (%)
0.015
0.005
0
-0.005
-0.01
0.01
0
-0.01
-0.015
-0.02
-0.02
-0.025
-0.03
-250 -200 -150 -100 -50
0
50 100 150
Differential Input Voltage (mV)
-0.03
200
250
3
3.25
Figure 25. Nonlinearity vs Input Voltage
4
4.25 4.5
VDDx (V)
4.75
5
5.25
5.5
D024
Figure 26. Nonlinearity vs Supply Voltage
Device 1
Device 2
Device 3
0.02
vs VDD1
vs VDD2
-75
-80
0.01
THD (dB)
Nonlinearity (%)
3.75
-70
0.03
0
-85
-0.01
-90
-0.02
-95
-0.03
-55 -40 -25 -10
-100
5
20 35 50 65
Temperature (°C)
80
95 110 125
3
3.25
D025
–55°C ≤ TA < –40°C for AMC1300B only
Figure 27. Nonlinearity vs Temperature
14
3.5
D023
3.5
3.75
4
4.25 4.5
VDDx (V)
4.75
5
5.25
5.5
D026
3 V ≤ VDD1 < 4.5 V for AMC1300B only
Figure 28. Total Harmonic Distortion vs Supply Voltage
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Typical Characteristics (continued)
at VDD1 = 5 V, VDD2 = 3.3 V, VINP = –250 mV to 250 mV, VINN = 0 V, and fIN = 10 kHz (unless otherwise noted)
-70
10000
Noise Density (PV/—Hz)
-75
THD (dB)
-80
-85
-90
1000
100
Device 1
Device 2
Device 3
-95
-100
-55 -40 -25 -10
5
20 35 50 65
Temperature (°C)
80
10
0.1
95 110 125
1
10
Frequency (kHz)
D027
100
1000
D028
–55°C ≤ TA < –40°C for AMC1300B only
Figure 30. Input-Referred Noise Density vs Frequency
80
75
77.5
70
75
65
72.5
SNR (dB)
SNR (dB)
Figure 29. Total Harmonic Distortion vs Temperature
80
60
55
70
67.5
50
65
45
62.5
40
vs VDD1
vs VDD2
60
0
50
100
150
200
|VINP - VINN| (mV)
250
300
3
3.25
3.5
D029
3.75
4
4.25 4.5
VDDx (V)
4.75
5
5.25
5.5
D030
3 V ≤ VDD1 < 4.5 V for AMC1300B only
Figure 31. Signal-to-Noise Ratio vs Input Voltage
Figure 32. Signal-to-Noise Ratio vs Supply Voltage
0
80
77.5
-20
-40
72.5
PSRR (dB)
SNR (dB)
75
70
67.5
-60
-80
65
Device 1
Device 2
Device 3
62.5
60
-55 -40 -25 -10
5
20 35 50 65
Temperature (°C)
80
-100
vs VDD2
vs VDD1
95 110 125
-120
0.001
D031
0.01
0.1
1
10
Ripple Frequency (kHz)
100
1000
D032
–55°C ≤ TA < –40°C for AMC1300B only
Figure 33. Signal-to-Noise Ratio vs Temperature
Figure 34. Power-Supply Rejection Ratio
vs Ripple Frequency
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Typical Characteristics (continued)
1.49
1.49
1.48
1.48
1.47
1.47
1.46
1.46
1.45
1.45
VCMout (V)
VCMout (V)
at VDD1 = 5 V, VDD2 = 3.3 V, VINP = –250 mV to 250 mV, VINN = 0 V, and fIN = 10 kHz (unless otherwise noted)
1.44
1.43
1.44
1.43
1.42
1.42
1.41
1.41
1.4
1.4
1.39
3
3.25
3.5
3.75
4
4.25 4.5
VDD2 (V)
4.75
5
5.25
1.39
-55 -40 -25 -10
5.5
5
D033
20 35 50 65
Temperature (°C)
80
95 110 125
D034
–55°C ≤ TA < –40°C for AMC1300B only
Figure 35. Output Common-Mode Voltage
vs Low-Side Supply Voltage
Figure 36. Output Common-Mode Voltage vs Temperature
340
340
AMC1300B
AMC1300
320
300
BW (kHz)
BW (kHz)
300
280
260
280
260
240
240
220
220
200
3
3.25
3.5
3.75
4
4.25 4.5
VDD2 (V)
4.75
5
5.25
200
-55 -40 -25 -10
5.5
20 35 50 65
Temperature (°C)
80
95 110 125
D036
Figure 38. Output Bandwidth vs Temperature
8.5
8.5
8
8
7.5
7.5
7
IDDx (mA)
7
IDDx (mA)
5
D035
Figure 37. Output Bandwidth vs Low-Side Supply Voltage
6.5
6
5.5
6.5
6
5.5
5
5
4.5
4.5
IDD1 vs VDD1
IDD2 vs VDD2
4
3
3.25
3.5
3.75
4
4.25 4.5
VDDx (V)
4.75
5
5.25
IDD1
IDD2
4
3.5
5.5
3.5
-55 -40 -25 -10
D037
3 V ≤ VDD1 < 4.5 V for AMC1300B only
Figure 39. Supply Current vs Supply Voltage
16
AMC1300B
AMC1300
320
5
20 35 50 65
Temperature (°C)
80
95 110 125
D038
–55°C ≤ TA < –40°C for AMC1300B only
Figure 40. Supply Current vs Temperature
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Typical Characteristics (continued)
4
4
3.5
3.5
3
3
2.5
2.5
tr/tf (Ps)
tr / tf (Ps)
at VDD1 = 5 V, VDD2 = 3.3 V, VINP = –250 mV to 250 mV, VINN = 0 V, and fIN = 10 kHz (unless otherwise noted)
2
2
1.5
1.5
1
1
0.5
0.5
0
3
3.25
3.5
3.75
4
4.25 4.5
VDD2 (V)
4.75
5
5.25
0
-55 -40 -25 -10
5.5
5
D039
20 35 50 65
Temperature (°C)
80
95 110 125
D040
–55°C ≤ TA < –40°C for AMC1300B only
Figure 42. Output Rise and Fall Time vs Temperature
3.8
3.8
3.4
3.4
3
3
Signal Delay (Ps)
Signal Delay (Ps)
Figure 41. Output Rise and Fall Time vs Low-Side Supply
2.6
2.2
1.8
1.4
1
2.6
2.2
1.8
1.4
1
50% - 90%
50% - 50%
50% - 10%
0.6
50% - 90%
50% - 50%
50% - 10%
0.6
0.2
0.2
3
3.25
3.5
3.75
4
4.25 4.5
VDD2 (V)
4.75
5
5.25
3
5.5
3.25
3.5
3.75
4
D041
AMC1300
3.4
3.4
3
3
Signal Delay (Ps)
Signal Delay (Ps)
3.8
2.6
2.2
1.8
1.4
1
5
20 35 50 65
Temperature (°C)
5.25
5.5
D042
80
95
50% - 90%
50% - 50%
50% - 10%
2.6
2.2
1.8
1.4
1
50% - 90%
50% - 50%
50% - 10%
0.6
-10
5
Figure 44. VIN to VOUT Signal Delay
vs Low-Side Supply Voltage
3.8
-25
4.75
AMC1300B
Figure 43. VIN to VOUT Signal Delay
vs Low-Side Supply Voltage
0.2
-40
4.25 4.5
VDD2 (V)
0.6
110 125
0.2
-55 -40 -25 -10
D043
AMC1300
5
20 35 50 65
Temperature (°C)
80
95 110 125
D044
AMC1300B
Figure 45. VIN to VOUT Signal Delay vs Temperature
Figure 46. VIN to VOUT Signal Delay vs Temperature
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8 Detailed Description
8.1 Overview
The AMC1300 is a fully-differential, precision, isolated amplifier. The input stage of the device consists of a fullydifferential amplifier that drives a second-order, delta-sigma (ΔΣ) modulator. The modulator uses the internal
voltage reference and clock generator to convert the analog input signal to a digital bitstream. The drivers (called
TX in the Functional Block Diagram) transfer the output of the modulator across the isolation barrier that
separates the high-side and low-side voltage domains. The received bitstream and clock are synchronized and
processed, as shown in the Functional Block Diagram, by a fourth-order analog filter on the low-side and
presented as a differential output of the device.
The SiO2-based, double-capacitive isolation barrier supports a high level of magnetic field immunity, as described
in ISO72x Digital Isolator Magnetic-Field Immunity. The digital modulation used in the AMC1300 and the isolation
barrier characteristics result in high reliability and common-mode transient immunity.
8.2 Functional Block Diagram
VDD2
VDD1
VDD1
Detection
Reinforced
Isolation
Barrier
Band-Gap
Reference
Band-Gap
Reference
INP
û -Modulator
Data
TX
RX
Retiming and
4th-Order
Active
Low-Pass
Filter
INN
VCM
Diagnostic
CLK
RX
TX
OUTP
OUTN
Oscillator
AMC1300x
GND1
GND2
8.3 Feature Description
8.3.1 Analog Input
The differential amplifier input stage of the AMC1300 feeds a second-order, switched-capacitor, feed-forward ΔΣ
modulator. The gain of the differential amplifier is set by internal precision resistors to a factor of 4 with a
differential input impedance of 22 kΩ. The modulator converts the analog signal into a bitstream that is
transferred over the isolation barrier, as described in the Isolation Channel Signal Transmission section.
There are two restrictions on the analog input signals (VINP and VINN). First, if the input voltage exceeds the
range GND1 – 6 V to VDD1 + 0.5 V, the input current must be limited to 10 mA because the device input
electrostatic discharge (ESD) diodes turn on. In addition, the linearity and noise performance of the device are
ensured only when the analog input voltage remains within the specified linear full-scale range (FSR) and within
the specified common-mode input voltage range.
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Feature Description (continued)
8.3.2 Isolation Channel Signal Transmission
The AMC1300 uses an on-off keying (OOK) modulation scheme to transmit the modulator output bitstream
across the SiO2-based isolation barrier. As shown in Figure 47, the transmitter modulates the bitstream at TX IN
with an internally-generated, high-frequency carrier across the isolation barrier to represent a digital one and
does not send a signal to represent the digital zero. The nominal frequency of the carrier used inside the
AMC1300 is 480 MHz.
The receiver demodulates the signal after advanced signal conditioning and produces the output. The AMC1300
also incorporates advanced circuit techniques to maximize the CMTI performance and minimize the radiated
emissions caused by the high-frequency carrier and IO buffer switching.
Transmitter
Receiver
OOK
Modulation
TX IN
TX Signal
Conditioning
SiO2-Based
Capacitive
Reinforced
Isolation
Barrier
RX Signal
Conditioning
Envelope
Detection
RX OUT
Oscillator
Figure 47. Block Diagram of an Isolation Channel
Figure 48 shows the concept of the OOK scheme.
TX IN
Carrier Signal Across
the Isolation Barrier
RX OUT
Figure 48. OOK-Based Modulation Scheme
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Feature Description (continued)
8.3.3 Fail-Safe Output
The AMC1300 offers a fail-safe output that simplifies diagnostics on a system level. The fail-safe output is active
in two cases:
• When the high-side supply VDD1 of the AMC1300 is missing, or
• When the common-mode input voltage, that is VCM = (VINP + VINN) / 2, exceeds the minimum common-mode
overvoltage detection level VCMov of VDD1 – 2 V.
Figure 49 and Figure 50 show the fail-safe output of the AMC1300 as a negative differential output voltage value
that does not occur under normal device operation. Use the VFAILSAFE voltage specified in the Electrical
Characteristics table as a reference value for the fail-safe detection on a system level.
Figure 49. Typical Negative Clipping Output of the
AMC1300
Figure 50. Typical Fail-Safe Output of the AMC1300
8.4 Device Functional Modes
The AMC1300 is operational when the power supplies VDD1 and VDD2 are applied, as specified in the
Recommended Operating Conditions table.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The low input voltage range, very low nonlinearity, and temperature drift make the AMC1300 a high-performance
solution for industrial applications where shunt-based current sensing with high common-mode voltage levels is
required.
9.2 Typical Application
Isolated amplifiers are widely used in frequency inverters, which are critical parts of industrial motor drives,
photovoltaic inverters, uninterruptible power supplies, and other industrial applications. The input structure of the
AMC1300 is optimized for use with low-value shunt resistors in current sensing applications.
Figure 51 depicts a typical operation of the AMC1300 for current sensing in a frequency inverter application.
Phase current measurement is accomplished through the shunt resistors, RSHUNT (in this case, a two-pin shunt).
The differential input and the high common-mode transient immunity of the AMC1300 ensure reliable and
accurate operation even in high-noise environments (such as the power stage of the motor drive). The highimpedance input and wide input voltage range make the AMC1311 suitable for DC bus voltage sensing.
+VBUS
Motor
RSHUNT
L1
RSHUNT
L2
RSHUNT
L3
3.3 V
RFLT
AMC1300B
VDD1
INP
OUTP
INN
OUTN
GND1
GND2
CFLT
RFLT
3.3 V
VDD2
Analog
Filter
to ADC
-VBUS
3.3 V
RFLT
AMC1300B
VDD1
INP
OUTP
INN
OUTN
GND1
GND2
CFLT
RFLT
3.3 V
RFLT
AMC1300B
VDD1
VDD2
INP
OUTP
INN
OUTN
GND1
GND2
CFLT
RFLT
3.3 V
RFLT
CFLT
AMC1311B
VDD1
Analog
Filter
to ADC
3.3 V
Analog
Filter
to ADC
3.3 V
VDD2
VIN
VOUTP
SHTDN
VOUTN
GND1
3.3 V
VDD2
Analog
Filter
to ADC
GND2
Figure 51. Using the AMC1300B for Current Sensing in Frequency Inverters
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Typical Application (continued)
9.2.1 Design Requirements
Table 1 lists the parameters for this typical application.
Table 1. Design Requirements
PARAMETER
VALUE
High-side supply voltage
3.3 V or 5 V
Low-side supply voltage
3.3 V or 5 V
Voltage drop across the shunt for a linear response
± 250 mV (maximum)
Signal delay (50% VIN to 90% OUTP, OUTN)
3 µs (maximum)
9.2.2 Detailed Design Procedure
The high-side power supply (VDD1) for the AMC1300 is derived from the power supply of the upper gate driver.
Further details are provided in the Power Supply Recommendations section.
The floating ground reference (GND1) is derived from one of the ends of the shunt resistor that is connected to
the negative input of the AMC1300 (INN). If a four-pin shunt is used, the inputs of the AMC1300 device are
connected to the inner leads and GND1 is connected to one of the outer shunt leads.
Use Ohm's Law to calculate the voltage drop across the shunt resistor (VSHUNT) for the desired measured
current: VSHUNT = I × RSHUNT.
Consider the following two restrictions to choose the proper value of the shunt resistor RSHUNT:
• The voltage drop caused by the nominal current range must not exceed the recommended differential input
voltage range: VSHUNT ≤ ± 250 mV
• The voltage drop caused by the maximum allowed overcurrent must not exceed the input voltage that causes
a clipping output: VSHUNT ≤ VClipping
For systems using single-ended input ADCs, Figure 52 shows an example of a TLV6001-based signal
conversion and filter circuit as used on the AMC1311EVM. Tailor the bandwidth of this filter stage to the
bandwidth requirement of the system and use NP0-type capacitors for best performance.
AMC1300
VCMADC
VDD1
VDD2
INP
OUTP
+
INN
OUTN
±
GND1
GND2
TLV6001
To ADC
GND2
Figure 52. Connecting the AMC1300 Output to a Single-Ended Input ADC
For more information on the general procedure to design the filtering and driving stages of SAR ADCs, see 18Bit, 1MSPS Data Acquisition Block (DAQ) Optimized for Lowest Distortion and Noise and 18-Bit Data Acquisition
Block (DAQ) Optimized for Lowest Power, available for download at www.ti.com.
22
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9.2.3 Application Curves
In frequency inverter applications, the power switches must be protected in case of an overcurrent condition. To
allow for fast powering off of the system, a low delay caused by the isolated amplifier is required. Figure 53
shows the typical full-scale step response of the AMC1300. Consider the delay of the required window
comparator and the MCU to calculate the overall response time of the system.
VIN
VOUTP
VOUTN
Figure 53. Step Response of the AMC1300
The high linearity and low temperature drift of offset and gain errors of the AMC1300, as shown in Figure 54,
allow design of motor drives with low torque ripple.
0.03
0.025
0.02
Nonlinearity (%)
0.015
0.01
0.005
0
-0.005
-0.01
-0.015
-0.02
-0.025
-0.03
-250 -200 -150 -100 -50
0
50 100 150
Differential Input Voltage (mV)
200
250
D023
Figure 54. Typical Nonlinearity of the AMC1300
9.3 Do's and Don'ts
Do not leave the inputs of the AMC1300 unconnected (floating) when the device is powered up. If both device
inputs are left floating, the input bias current drives these inputs to the output common-mode of the analog frontend of approximately 2 V. If the high-side supply voltage VDD1 is below 4 V, the internal common-mode
overvoltage detector turns on and the output functions as described in the Fail-Safe Output section, which may
lead to an undesired reaction on the system level.
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10 Power Supply Recommendations
In a typical frequency inverter application, the high-side power supply (VDD1) for the device is directly derived
from the floating power supply of the upper gate driver. For lowest system-level cost, a Zener diode can be used
to limit the voltage to 5 V or 3.3 V (for AMC1300B only) ± 10%. Alternatively, a low-cost low-dropout (LDO)
regulator (for example, the LM317-N) may be used to minimize noise on the power supply. TI recommends a
low-ESR decoupling capacitor of 0.1 µF to filter this power-supply path. Place this capacitor (C2 in Figure 55) as
close as possible to the VDD1 pin of the AMC1300 for best performance. If better filtering is required, an
additional 2.2-µF capacitor may be used. The floating ground reference (GND1) is derived from the end of the
shunt resistor, which is connected to the negative input (INN) of the device. If a four-pin shunt is used, the device
inputs are connected to the inner leads, and GND1 is connected to one of the outer leads of the shunt.
To decouple the low-side power supply on the controller side, use a 0.1-µF capacitor placed as close to the
VDD2 pin of the AMC1300 as possible, followed by an additional capacitor from 1 µF to 10 µF.
R1
800
Gate Driver
Z1
1N751A
C1
2.2 F
AMC1300
5.1 V
GND1
RSHUNT
RFLT
INN
To Load
RFLT
CFLT
INP
3.3 V or
5.0 V
VDD2
VDD1
C2
0.1 F
Reinforced Isolation
HV+
Floating
Power Supply
20 V
C4
0.1 F
C5
2.2 F
GND2
OUTP
OUTN
ADS7054
14-Bit ADC
Gate Driver
HV-
Figure 55. Zener-Diode-Based, High-Side Power Supply
24
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11 Layout
11.1 Layout Guidelines
Figure 56 shows a layout recommendation with the critical placement of the decoupling capacitors (as close as
possible to the AMC1300 supply pins) and placement of the other components required by the device. For best
performance, place the shunt resistor close to the INP and INN inputs of the AMC1300 and keep the layout of
both connections symmetrical.
11.2 Layout Example
Clearance area,
to be kept free of any
conductive materials.
To Floating
Power
Supply
Shunt Resistor
RFLT
SMD 0603
RFLT
SMD 0603
2.2 µF
0.1 µF
0.1 µF
2.2 µF
SMD
0603
SMD
0603
SMD
0603
SMD
0603
VDD1
VDD2
INP
OUTP
CFLT
SMD
0603
To Filter
or ADC
AMC1300
INN
OUTN
GND1
GND2
LEGEND
Copper Pour and Traces
High-Side Area
Low-Side Area
Via to Ground Plane
Via to Supply Plane
Figure 56. Recommended Layout of the AMC1300
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
• Isolation Glossary
• Dual, 1MSPS, 16-/14-/12-Bit, 4×2 or 2×2 Channel, Simultaneous Sampling Analog-to-Digital Converter
• Semiconductor and IC Package Thermal Metrics
• ISO72x Digital Isolator Magnetic-Field Immunity
• AMC1311x High-Impedance, 2-V Input, Reinforced Isolated Amplifier
• TLV600x Low-Power, Rail-to-Rail In/Out, 1-MHz Operational Amplifier for Cost-Sensitive Systems
• AMC1311EVM Users Guide
• 18-Bit, 1-MSPS Data Acquisition Block (DAQ) Optimized for Lowest Distortion and Noise
• 18-Bit, 1-MSPS Data Acquisition Block (DAQ) Optimized for Lowest Power
• LM117, LM317-N Wide Temperature Three-Pin Adjustable Regulator
• SN6501 Transformer Driver for Isolated Power Supplies
• High-Bandwidth Phase Current and DC-Link Voltage Sensing Reference Design for Three-Phase Inverters
• Three-Phase Inverter Reference Design Using Gate Driver With Built-in Dead Time Insertion
• High Accuracy Analog Front End Using 16-Bit SAR ADC with ±10V Measurement Range Reference Design
• 2kW, 48V to 400V, >93% Efficiency, Isolated Bidirectional DC-DC Converter Reference Design for UPS
• Reference Design for Reinforced Isolation 3-Phase Inverter with Current, Voltage and Temp Protection
• Shunt-Based High Current Measurement (200-A) Reference Design with Reinforced Isolation Amplifier
• High Accuracy ±0.5% Current and Isolated Voltage Measurement Ref Design Using 24-Bit Delta-Sigma ADC
• Shunt-Based 200A Peak Current Measurement Reference Design Using Isolation Amplifier
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
Table 2. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
AMC1300
Click here
Click here
Click here
Click here
Click here
AMC1300B
Click here
Click here
Click here
Click here
Click here
12.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
26
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12.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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27
PACKAGE OPTION ADDENDUM
www.ti.com
2-Jun-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
AMC1300BDWV
ACTIVE
SOIC
DWV
8
64
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-55 to 125
AMC1300B
AMC1300BDWVR
ACTIVE
SOIC
DWV
8
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-55 to 125
AMC1300B
AMC1300DWV
ACTIVE
SOIC
DWV
8
64
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 105
AMC1300
AMC1300DWVR
ACTIVE
SOIC
DWV
8
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 105
AMC1300
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
2-Jun-2018
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
27-May-2018
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
AMC1300BDWVR
SOIC
DWV
8
1000
330.0
16.4
12.05
6.15
3.3
16.0
16.0
Q1
AMC1300DWVR
SOIC
DWV
8
1000
330.0
16.4
12.05
6.15
3.3
16.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
27-May-2018
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
AMC1300BDWVR
SOIC
DWV
8
1000
350.0
350.0
43.0
AMC1300DWVR
SOIC
DWV
8
1000
350.0
350.0
43.0
Pack Materials-Page 2
PACKAGE OUTLINE
DWV0008A
SOIC - 2.8 mm max height
SCALE 2.000
SOIC
C
SEATING PLANE
11.5 0.25
TYP
PIN 1 ID
AREA
0.1 C
6X 1.27
8
1
2X
3.81
5.95
5.75
NOTE 3
4
5
0.51
0.31
0.25
C A
8X
A
7.6
7.4
NOTE 4
B
B
2.8 MAX
0.33
TYP
0.13
SEE DETAIL A
(2.286)
0.25
GAGE PLANE
0 -8
0.46
0.36
1.0
0.5
(2)
DETAIL A
TYPICAL
4218796/A 09/2013
NOTES:
1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm, per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side.
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EXAMPLE BOARD LAYOUT
DWV0008A
SOIC - 2.8 mm max height
SOIC
8X (1.8)
SEE DETAILS
SYMM
8X (0.6)
SYMM
6X (1.27)
(10.9)
LAND PATTERN EXAMPLE
9.1 mm NOMINAL CLEARANCE/CREEPAGE
SCALE:6X
METAL
SOLDER MASK
OPENING
SOLDER MASK
OPENING
0.07 MAX
ALL AROUND
METAL
0.07 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4218796/A 09/2013
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DWV0008A
SOIC - 2.8 mm max height
SOIC
8X (1.8)
SYMM
8X (0.6)
SYMM
6X (1.27)
(10.9)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:6X
4218796/A 09/2013
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
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