MP8847 The Future of Analog IC Technology 6A, 2.7V-6V, High-Efficiency, Synchronous, Step-Down Switcher with I2C Interface In 2x3mm QFN DESCRIPTION FEATURES The MP8847 is a highly integrated,highfrequency, synchronous, step-down switcher with an I2C control interface. The MP8847 can support up to 6A of load current over an input supply range from 2.7V to 6V with excellent load and line regulation. Constant-frequency hysteretic mode provides an extremely fast transient response without loop compensation to achieve high efficiency easily under light-load condition. The output voltage level can be controlled onthe-fly through a 3.4Mbps I2C serial interface. The voltage range can be adjusted from 0.6V to 1.235V in 5mV steps. The voltage slew rate, switching frequency, and power-saving mode are also selectable through the I2C interface. Full protection features include internal soft start, over-current protection (OCP), and overtemperature protection (OTP). The MP8847 requires a minimal number of readily available, standard, external components and is available in a compact QFN-14(2mmx3mm) package. I2C-Programmable Output Range from 0.6V to 1.235V in 5mV Steps 2.7V to 6V Input Voltage Range Up to 6A Load Current Internal 35mΩ High-Side and 15mΩ LowSide Power MOSFETs I2C-Compatible Interface up to 3.4Mbps Factory Adjustable Switching Frequency from 0.85MHz to 2.2MHz Power-Saving Mode Selectable via I2C Internal 1ms Soft Start Power Good Indicator Current Overload and Thermal Shutdown Protection Available in 2mmx3mm QFN-14 Package APPLICATIONS Processor Core Supplies Micro Converters All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION 100% 90% PFM 80% 70% 60% PWM 50% 40% 30% 20% 10% 0% 0.01 MP8847 Rev. 1.02 12/28/2017 0.1 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 1 10 1 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN ORDERING INFORMATION Part Number MP8847GD* EVKT-8847 Package QFN-14 (2mmx3mm) 8847 Evaluation Kit Top Marking See Below * For Tape & Reel, add suffix –Z (e.g. MP8847GD–Z) TOP MARKING AVE: Product code of MP8847GD Y: Year code LLL: Lot number EVALUATION KIT EVKT-8847 EVKT-8847 Kit contents: (Items below can be ordered separately). # Part Number Item Quantity 1 EV8847-D-00A MP8847GD Evaluation Board 1 2 EVKT-USBI2C-02 Includes one USB to I2C Dongle, one USB Cable, and one Ribbon Cable 1 Order direct from MonolithicPower.com or our distributors. Figure 1. EVKT-8847 Evaluation Kit Setup MP8847 Rev. 1.02 12/28/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 2 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN PACKAGE REFERENCE TOP VIEW QFN-14 (2mmx3mm) ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance Supply voltage (VIN) ......................... -0.3V to 7V VSW ................................ -0.3V (-5V for <10ns) to 6.5V(8V for <10ns or 10V for <3ns) All other pins .................................. -0.3V to 6.5V Junction temperature ................................150°C Lead temperature .....................................260°C (2)(4) Continuous power dissipation(TA = +25°C) QFN ........................................................... 3.5W Storage temperature .................. -65°C to 150°C QFN 2mmx3mm EV8847-D-00A(4) .................... 35 ........ 8 .... °C/W JESD51-7(5) ........................... 70 ....... 15 ... °C/W Recommended Operating Conditions (3) Supply voltage (VIN) .......................... 2.7V to 6V Output voltage (VOUT) ............... 0.6V to 1.235V Operating junction Temp (TJ) ... -40°C to +125°C MP8847 Rev. 1.02 12/28/2017 (4) θJA θJC NOTES: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on EV8847-D-00A, 4-layer PCB. 5) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 3 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN ELECTRICAL CHARACTERISTICS VIN = 5V, TJ= -40°C to +125°C(6), typical value is tested at TJ= +25°C. The limit over temperature is guaranteed by characterization, unless otherwise noted. Parameter Symbol Input voltage range Condition VIN Quiescent current IQ Shutdown current IS Min Typ Max Units 6 V 2.7 EN=1.8V, no switching, PFM mode EN=GND, TJ=25°C TJ=25°C -40°C<TJ<125°C Register = 00h, TJ=25°C -40°C<TJ<125°C Register = 7Fh, TJ=25°C -40°C<TJ<125°C 300 1 0.609 0.615 0.609 0.615 1.254 1.266 μA V V V V V V mV Internal reference voltage VREF Lowest output voltage VLOW Highest output voltage VHIGH Output voltage step High-side switch on resistance Low-side switch on resistance UVLO rising threshold UVLO hysteretic Switching frequency Frequency variation Minimum on time(7) VSTEP 0.600 0.600 0.600 0.600 1.235 1.235 5 RHSON 35 mΩ RLSON 15 mΩ VUVLOR VUVLOHY FSW FSW TMINON 2.55 150 Switch leakage ISW EN input current EN logic low voltage EN logic high voltage Power good UV threshold rising Power good UV threshold falling Power good OV threshold rising Power good OV threshold falling Power good pull-down voltage Power good deglitch time Power good leakage VOUT OVP threshold MP8847 Rev. 1.02 12/28/2017 0.591 0.585 0.591 0.585 1.216 1.204 μA 0.85 2.7 2.2 25% 60 VEN=0V, VIN=5V, VSW=0V and 5V, TJ=25°C IEN VENH VENL V mV MHz ns 0.1 1 μA 0.4 μA V V 4 1.8 PGVth-Hi Good 0.9 VOUT PGVth-Lo Fault 0.85 VOUT PGVth-Hi Fault 1.1 VOUT PGVth-Lo Good 1.05 VOUT VPGL ISINK=1mA TPGd IPGd 0.4 V 1 μs μA 50 Rising edge +10% www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. VTARGET 4 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN ELECTRICAL CHARACTERISTICS (continued) VIN = 5V, TJ= -40°C to +125°C(6), typical value is tested at TJ= +25°C. The limit over temperature is guaranteed by characterization, unless otherwise noted. Parameter Symbol High-side switch peak current limit (source) High-side switch valley current limit(7) Ipeak DAC resolution 7 9 A 5.8 A 0 A PWM mode -5 A (7) VOUT rises from 10% to 90% Discharge resistor (7) Thermal shutdown Typ PFM mode TSS-ON Thermal warning Min Ivalley Low-side switch current limit (sink) Soft-start time Condition (7) (7) 0.4 1 Max 1.6 Units ms 500 Ω 130 °C 150 °C 7 bits NOTE: 6) Not tested in production, guaranteed by over-temperature correlation . 7) Guaranteed by engineer sample characterization. MP8847 Rev. 1.02 12/28/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 5 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN I/O LEVEL CHARACTERISTICS Parameter Symbol Low-level input voltage High-level input voltage Hysteresis of Schmitt trigger inputs Low-level output voltage(open drain) at 3mA sink current Low-level output current Transfer gate on resistance for currents between SDA and SCAH, or SCL and SCLH Transfer gate on resistance between SDA and SCAH, or SCL and SCLH VHYS VOL VCC>2V VCC<2V -0.5 0.7VCC 0.05VCC 0.1VCC 0.3VCC VCC+0.5 - -0.5 0.7VCC 0.05VCC 0.1VCC 0.3Vcc VCC+0.5 - VCC>2V 0 0.4 0 0.4 VCC<2V 0 0.2VCC 0 0.2Vcc - 3 - 3 mA - 50 - 50 Ω 50 - 50 - kΩ 2 6 2 6 mA 10 40 ns 20 80 ns 10 40 ns 20 80 20 250 ns 10 80 - - ns 20 160 20 250 ns 10 80 - - ns 20 160 20 250 ns RonH Both signals (SDA and SDAH, or SCL and SCLH) at VCC level tfCL Rise time of SDAH signal trDA Fall time of SDAH signal tfDA MP8847 Rev. 1.02 12/28/2017 Max VOL level, IOL=3mA trCL Units Min RonL Rise time of the SCLH or SCL signal LS-Mode Max IOL Ics HS-Mode Min VIL VIH Pull-up current of the SCLH current source Fall time of the SCLH or SCL signal Condition SCLH output levels between 0.3VCC and 0.7VCC Output rise time (current source enabled) with an external pull-up current source of 3mA Capacitive load from 10pF to 100pF Capacitive load of 400pF Output fall time (current source enabled) with an external pull-up current source of 3mA Capacitive load from 10pF to 100pF Capacitive load of 400pF Capacitive load from 10pF to 100pF Capacitive load of 400pF Capacitive load from 10pF to 100pF Capacitive load of 400pF www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. V V V V 6 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN I/O LEVEL CHARACTERISTICS(continued) Parameter Symbol Pulse width of spikes that must be suppressed by the input filter Input current for each I/O pin Capacitance for each I/O pin MP8847 Rev. 1.02 12/28/2017 Condition tSP Ii Ci Input voltage between 0.1VCCand 0.9VCC HS-Mode LS-Mode Units Min Max Min Max 0 10 0 50 ns - 10 -10 +10 μA - 10 - 10 pF www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 7 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN I2C PORT SIGNAL CHARACTERISTICS Parameter Symbol Condition SCLH and SCL clock frequency Set-up time for a repeated START condition Hold time (repeated) START condition Low period of the SCL clock High period of the SCL clock Data set-up time Data hold time Rise time of SCLH signal Rise time of SCLH signal after a repeated START condition and after an acknowledge bit Fall time of SCLH signal Rise time of SDAH signal Fall time of SDAH signal Set-up time for a stop condition Cb=100pF Min Max Cb=400pF Min Max Units fSCHL 0 3.4 0 0.4 MHz TSU;STA 160 - 600 - ns THD;STA 160 - 600 - ns tLOW 160 - 1300 - ns tHIGH 60 - 600 - ns TSU:DAT THD;DAT 10 0 70 100 0 - ns ns trCL 10 40 20*0.1Cb 300 ns tfCL1 10 80 20*0.1Cb 300 ns TfCL tfDA TfDA 10 10 10 40 80 80 20*0.1Cb 20*0.1Cb 20*0.1Cb 300 300 300 ns ns ns TSU;STO 160 - 600 - ns TBUF 160 - 1300 - ns Bus free time between a stop and start condition Data valid time Data valid acknowledge time TVD;DAT - 16 - 90 ns TVD;ACK - 160 - 900 ns Capacitive load for each bus line SDAH and SCLH line SDAH+SDA line and SCLH+SCL line - 100 - 400 pF Cb - 400 - 400 pF Noise margin at the low level VnL For each connected device - 0.1VCC 0.1VCC - V Noise margin at the high level VnH For each connected device - 0.2VCC 0.2VCC - V 2 NOTE: VCC is the I C bus voltage, 1.5V to 3.3V range. MP8847 Rev. 1.02 12/28/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 8 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN TYPICAL CHARACTERISTICS VIN = 5V, VOUT = 0.95V, L = 0.47µH, TA = 25°C, PWM, unless otherwise noted. MP8847 Rev. 1.02 12/28/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 9 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN TYPICAL CHARACTERISTICS(continued) VIN = 5V, VOUT = 0.95V, L = 0.47µH, TA = 25°C, PWM, unless otherwise noted. MP8847 Rev. 1.02 12/28/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 10 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN TYPICAL CHARACTERISTICS(continued) VIN = 5V, VOUT = 0.95V, L = 0.47µH, TA = 25°C, unless otherwise noted. MP8847 Rev. 1.02 12/28/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 11 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN PIN FUNCTIONS Package Pin # Name Description 1 2 3, 10 4, 5, 6 7, 8, 9 11 12 13 14 PG SDA GND VIN SW AGND VOUT SCL EN Power good output. I2C serial data. Power ground. Input supply voltage. Switch note. Analog ground. Output voltage sensing. I2C serial clock. On and off control. MP8847 Rev. 1.02 12/28/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 12 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN REGISTERSAND DESCRIPTION Register Map ADD 00 01 02 NAME Status VSEL SysCntlreg1 R/W R R/W R/W 03 SysCntlreg2 R/W 04 05 ID1 ID2 R R D7 D6 D5 ILIM UVLO OVP EN Switching frequency Reserved Go Vendor ID Reserved D4 D3 D2 D1 VoOV VoUV PGOOD OTW Output reference Transient response Pglohi Vinovp Slew PG Out-dis Gl_filt rate control Die ID Die rev D0 EN stat Mode PG set NOTE: Theburst write cannot be on Reg.03. Default Value of Registers ADD 00 01 02 03 04 05 NAME Status VSEL SysCntlreg1 SysCntlreg2 ID1 ID2 R/W R R/W R/W R/W R R D7 NA 1 1 0 0 0 D6 NA 1 0 0 0 0 D5 NA 0 0 0 0 0 D4 NA 0 0 0 1 0 D3 NA 0 1 0 0 0 D2 NA 1 1 0 0 0 D1 NA 1 0 0 0 0 D0 NA 0 0 1 1 0 Register Description 1. Reg00 Status NAME ILIM UVLO OVP VoOV VoUV BITS D7 D6 D5 D4 D3 PGOOD D2 OTW D1 En stat D0 DESCRIPTION When the bit is high, IC is in the current limit. When the bit is high,VIN is less than the UVLO threshold. When the bit is high,VIN is greater than the OVP threshold. When the bit is high, a voltage higher than 110% of the regulation voltage is presented. When the bit is high, a voltage lower than 90% of the regulation voltage is presented. When the bit is high, the output is in regulation; otherwise, the output voltage is out of the ±10% regulation window. When the junction temperature is higher than 130°C, the bit is high; otherwise, the bit is low. When the bit is high, the SMPS is enabled; when the bit is low, the SMPS is disabled. 2. Reg01 VSEL NAME BITS EN D7 Output Reference D[6:0] MP8847 Rev. 1.02 12/28/2017 DESCRIPTION I2C controlled enable. When EN is low, the converter is off. When EN is high, the EN bit takes over. Sets the output voltage from 0.6V to 1.235V (see Table 1). www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 13 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN D[6:0] 000 0000 000 0001 000 0010 000 0011 000 0100 000 0101 000 0110 000 0111 000 1000 000 1001 000 1010 000 1011 000 1100 000 1101 000 1110 000 1111 001 0000 001 0001 001 0010 001 0011 001 0100 001 0101 001 0110 001 0111 001 1000 001 1001 001 1010 001 1011 001 1100 001 1101 001 1110 001 1111 MP8847 Rev. 1.02 12/28/2017 VOUT 0.600 0.605 0.610 0.615 0.620 0.625 0.630 0.635 0.640 0.645 0.650 0.655 0.660 0.665 0.670 0.675 0.680 0.685 0.690 0.695 0.700 0.705 0.710 0.715 0.720 0.725 0.730 0.735 0.740 0.745 0.750 0.755 D[6:0] 010 0000 010 0001 010 0010 010 0011 010 0100 010 0101 010 0110 010 0111 010 1000 010 1001 010 1010 010 1011 010 1100 010 1101 010 1110 010 1111 011 0000 011 0001 011 0010 011 0011 011 0100 011 0101 011 0110 011 0111 011 1000 011 1001 011 1010 011 1011 011 1100 011 1101 011 1110 011 1111 Table 1: Output Voltage Chart VOUT D[6:0] 0.760 100 0000 0.765 100 0001 0.770 100 0010 0.775 100 0011 0.780 100 0100 0.785 100 0101 0.790 100 0110 0.795 100 0111 0.800 100 1000 0.805 100 1001 0.810 100 1010 0.815 100 1011 0.820 100 1100 0.825 100 1101 0.830 100 1110 0.835 100 1111 0.840 101 0000 0.845 101 0001 0.850 101 0010 0.855 101 0011 0.860 101 0100 0.865 101 0101 0.870 101 0110 0.875 101 0111 0.880 101 1000 0.885 101 1001 0.890 101 1010 0.895 101 1011 0.900 101 1100 0.905 101 1101 0.910 101 1110 0.915 101 1111 VOUT 0.920 0.925 0.930 0.935 0.940 0.945 0.950 0.955 0.960 0.965 0.970 0.975 0.980 0.985 0.990 0.995 1.000 1.005 1.010 1.015 1.020 1.025 1.030 1.035 1.040 1.045 1.050 1.055 1.060 1.065 1.070 1.075 D[6:0] 110 0000 110 0001 110 0010 110 0011 110 0100 110 0101 110 0110 110 0111 110 1000 110 1001 110 1010 110 1011 110 1100 110 1101 110 1110 110 1111 111 0000 111 0001 111 0010 111 0011 111 0100 111 0101 111 0110 111 0111 111 1000 111 1001 111 1010 111 1011 111 1100 111 1101 111 1110 111 1111 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. VOUT 1.080 1.085 1.090 1.095 1.100 1.105 1.110 1.115 1.120 1.125 1.130 1.135 1.140 1.145 1.150 1.155 1.160 1.165 1.170 1.175 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 1.225 1.230 1.235 14 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN 3. Reg02 SysCntlreg1 NAME BITS Switching Frequency D[7:5] Transient Response D[4:3] PG_LOHI D2 VIN_OVP D1 Mode D0 DESCRIPTION D[7:5] Switching Frequency D[7:5] Switching Frequency 000 2.2MHz 100 1.25MHz(default) 001 2MHz 101 1.11MHz 010 1.67MHz 110 0.85MHz 011 -111 -D[4:3] Response Speed D[4:3] Response Speed 00 Ultra-fast 01 Fast(default) 10 Normal 11 Slow A “0” here sets PGOOD to sense only a negative voltage excursion of VO from the reference. A “1” (default) sets PGOOD to detect both a positive and negative excursion of VO from the reference. A “1” disables the VIN OVP function. The converter continues operating. A “0” (default)turns off the converter when VIN reaches VIN MAX. A “0” enables PFM mode; a high disables PFM mode. 4.Reg03 SysCntlreg2 NAME Reserved Go Output Discharge BITS D[7:6] D5 Gl_filt D3 Slew Rate D2 PG Control D1 PG Set D0 D4 DESCRIPTION Reserved. Writing to this bit starts a VOUT transition regardless of its initial value. A “0” disables the output discharge. The output voltage must be discharged by the load. A high enables the internal pull-down. A “0” disables PGOOD delay. D2 Slew rate D2 Slew rate 0 32mV/μs 1 8mV/μs A“0”enable the PG function. A“1” disables the PG function, and then the PG voltage is set by the PG Set bit. When the PG Control bit=1, the PG voltage is pulled high if PG Set=0; otherwise, the PG voltage is pulled low. 5. Reg04 ID1 NAME Vendor ID Die ID BITS D[7:4] D[3:0] DESCRIPTION Vendor ID. IC type. BITS D[7:4] D[3:0] DESCRIPTION Reserved. Die revision. 6.Reg05 ID2 NAME Reserved Die Rev Operation Status CONDITION VIN over-voltage VIN under-voltage Thermal warning Thermal shutdown Current limit Output under-voltage Output over-voltage (>110% of target output) MP8847 Rev. 1.02 12/28/2017 PG Low Low Low Low High Low Low REGULATION Off Off On Off On Off On LATCH-OFF No N/A No Yes No Yes No www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. STATUS BIT OVP UVLO OTW N/A ILIM VoUV VoOV 15 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN BLOCKDIAGRAM VIN PG UVLO & Power Status Control EN Clock PLL SCL SDA I2C IF & Registers Clock DAC + SS + _ VOUT AGND Diff. Amp PWM Driver & Control + SW GND Ramp Figure 2: Functional Block Diagram MP8847 Rev. 1.02 12/28/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 16 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN OPERATION The MP8847 is a low-voltage, 6A, synchronous, step-down converter with a controllable I2C interface. The MP8847 applies MPS’s patented constant-frequency hysteretic control to utilize fast transient response of the hysteretic control and keep the switching frequency constant. No compensation is required, which simplifies the design procedure. The MP8847 integrates an I2C-compatible interface that allows transfers up to 3.4Mbps. This communication interface can be used for dynamic voltage scaling with voltage steps down to 5mV with the output voltage from 0.6V to 1.235V. The voltage transition slew rate can be controlled as well. Light-Load Operation In light-load condition, the MP8847uses a proprietary control scheme to save power and improve efficiency. The MP8847 turns off the low-side switch when the inductor current begins reversing. The MP8847then works in discontinuous conduction mode (DCM) operation. Enable(EN) When the input voltage is greater than the under-voltage lockout (UVLO) threshold (typically 2.55V), the MP8847 can be enabled by pulling EN above 1.8V. Pull EN down to ground to disable the MP8847. The IC can also be disabled by floating EN. There is an internal 1MΩ resistor from EN to ground. MP8847 Rev. 1.02 12/28/2017 Soft Start (SS) The MP8847 has a built-in soft start that ramps up the output voltage at a controlled slew rate, preventing inrush current and output voltage overshoot at start-up. The soft-start time is about 1ms. Power Good (PG) Indictor The MP8847 has an open drain output for power good (PG) indication. When the output voltage is within ±10% of the regulation voltage, PG is pulled up to VIN by the external resistor. Current Limit The MP8847 has a typical 9A current limit for the high-side switch. When the high-side switch reaches the current limit, the MP8847expands the minimum off time until the current drops to 5.8A before the high-side switch is turned on for the next switching cycle. This prevents the inductor current from continuing to build up and damaging the components. Thermal Protection The MP8847employs thermal shutdown by monitoring the junction temperature of the IC internally. If the junction temperature exceeds the thermal warning threshold (around 130°C), OTW is set. If there is no action or response from the system, the junction temperature continues rising until it exceeds the thermal shutdown threshold (typically 150°C). After thermal shutdown, a new power start-up cycle is needed to turn on the MP8847 again. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 17 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN I2C INTERFACE The MP8847 can communicate with the core and the I2C for smart design. MPS has a GUI control interface (see Figure 3). The installation process and usage can be found in the MP884x Family Software Guide. I2C Address The I2C slave address of the MP8847 is 0xC0H / 0xC1H internally (see Table 2). If other slave addresses are needed, please contact the factory. Hex W 0xC0 R 0xC1 Address Table 2: I2C Slave Address A7 A6 A5 A4 A3 A2 1 2 1 0 0 0 0 A1 A0 0 R/W 0x60 I CEnable The MP8847’s EN pin can start up and shutdown the converter, and the I2C Enable pin can control the converter as well. The Reg01 VSEL D7 bit is I2C-controlled enabled. When writing D7=0, the converter is off. When writing D7=1, the converter is on. Both the external EN and I2C EN can control the converter. The converter works only when both EN pins are high. MP8847 Rev. 1.02 12/28/2017 Output Voltage Selection The MP8847 output voltage is I2Cprogrammable. There is no need to set feedback resistors to achieve different output voltages. The default output voltage is 0.95V but can be set from 0.6V to 1.235V in 5mV steps via the I2C. To change the output voltage, write the Go bit (Reg03 Syscntlreg2 [D5]) to 1. This action means that the output voltage can be set to another value that is not the default Vo voltage. Then write the Output reference bit (Reg01 VSEL [D6:D0]). The output voltage can be changed according to Table 1. To guarantee a normal output voltage, the input voltage is suggested to be 1.5V higher than the pre-set output voltage. Switching Frequency The default switching frequency of the MP8847 is 1.25MHz. However, the frequency can be changed based on the application. By writing the switching frequency bits (Reg02 SysCntlreg1 [D7:D5], the switching frequency can be programmed to one of six possible values. Their corresponding data can be found in Reg02 SysCntlreg1. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 18 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN Figure 3: MP884x Family Control Interface PGOOD Configuration The MP8847 has an option to use the PG_LOHI function. This function can be written in the Pglohi bit (Reg02 Syscntlreg1 [D2]). The default value is 1, where PGOOD senses both a positive and negative excursion of Vo from the reference. If writing this bit to 0, PGOOD only senses a negative voltage excursion of Vo from the reference. Input Over-Voltage Protection (OVP) The MP8847 has an option to use the VIN_OVP function. This function can be written in theVIN_OVP bit (Reg02 Syscntlreg1 [D1]). The default value is 0, where the VIN OVP function is enabled. When VIN is higher than 6.3V, the converter is disabled. After VIN recovers to 6.2V, the converter restarts. If the VIN_OVP bit is set to 1, VIN OVP is disable. The converter will not stop, even if VIN exceeds its safe range. Forced Continuous Conduction Mode (CCM) The MP8847 has auto-pulse-frequency modulation (PFM) mode and forced CCM. This function can be written in the Mode bit (Reg02 MP8847 Rev. 1.02 12/28/2017 Syscntlreg1 [D0]). The default value is 0, where auto-PFM mode is selected. Considering a smaller Vo ripple and regulation for a full load range, forced CCM is recommended. Set this bit to 1 to disable PFM mode. Output Discharge The MP8847 has an output discharge function. Writing the Out-dis bit (Reg03 SysCntlreg2 [D4]) can change the output discharge mode. The default value is 0, and Vo can be discharged by its load when EN is low. Writing D4=1 can enable the function, and then the output voltage can be discharged by the internal pull-down resistance. Output Voltage Transition Slew Rate When the output voltage switches from low to high or from high to low, the transition slew rate can be different. There are two possible values for selection. Through writing the Slew Rate bits (Reg02 Syscntlreg1[D4: D3]), the transition slew rate can be set at one possible value based on the application. The internal reference follows the set slew rate, but the output voltage slew rate does not always follow the internal reference. Considering the output capacitor and www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 19 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN inductor, the actual output voltage slew rate should be a little slower. PG Multi-Use The MP8847 PG pin has multi-usage. When the PG Control bit (Reg03 SysCntlreg2 D1) is 0, PG indicates the Vo status, such as Vo overvoltage or under-voltage. When the PG Control bit (Reg03 sysCntlrge2 D1) is 1, the PG voltage is controlled by the PG Set bit (Reg03 sysCntlrge2 D0).The PG voltage is high if D0=0; otherwise, the PG voltage is low (see Table 3). MP8847 Rev. 1.02 12/28/2017 D1 0 0 1 1 Table 3: PG Multi-Use D0 PG 0 PG indicator 1 0 PG forced to 1 1 PG forced to 0 I2C Register Hold On The MP8847 has a special function: the I2C register can hold on after EN changes low. The updated register can be held for later application conditions, even if the external EN pulls low. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 20 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN TYPICAL APPLICATION CIRCUIT Figure 4: Application Circuit MP8847 Rev. 1.02 12/28/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 21 MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS STEP-DOWN SWITCHER WITH I2C INTERFACE IN 2X3MM QFN PACKAGE INFORMATION QFN-14 (2mmx3mm) PIN 1 ID MARKING PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW SIDE VIEW NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETERS MAX. 4) JEDEC REFERENCE IS MO-220. 5) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP8847 Rev. 1.02 12/28/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 22