TI1 LM34919TLX/NOPB Ultra-small 40-v 600-ma constant on-time buck switching regulator Datasheet

LM34919
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Ultra-Small 40-V 600-mA Constant On-Time Buck Switching Regulator
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FEATURES
1
•
•
•
•
•
•
2
•
•
•
•
Integrated N-Channel buck switch
Integrated start-up regulator
Input Voltage Range: 8V to 40V
No loop compensation required
Ultra-Fast transient response
Operating frequency remains constant with
load current and input voltage
Maximum switching frequency: 2.0 MHz
Maximum Duty Cycle Limited During Start-Up
Adjustable output voltage
Valley Current Limit At 0.64A
•
•
•
•
•
Precision internal reference
Low bias current
Highly efficient operation
Thermal shutdown
10-Pin DSBGA Package
APPLICATIONS
•
•
•
High Efficiency Point-Of-Load (POL) Regulator
Non-Isolated Telecommunication Buck
Regulator
Secondary High Voltage Post Regulator
DESCRIPTION
The LM34919 Step Down Switching Regulator features all of the functions needed to implement a low cost,
efficient, buck bias regulator capable of supplying 0.6A to the load. This buck regulator contains an N-Channel
Buck Switch, and is available in a 10-pin DSBGA package. The constant on-time feedback regulation scheme
requires no loop compensation, results in fast load transient response, and simplifies circuit implementation. The
operating frequency remains constant with line and load variations due to the inverse relationship between the
input voltage and the on-time. The valley current limit results in a smooth transition from constant voltage to
constant current mode when current limit is detected, reducing the frequency and output voltage, without the use
of foldback. Additional features include: VCC under-voltage lockout, thermal shutdown, gate drive under-voltage
lockout, and maximum duty cycle limiter.
Basic Step Down Regulator
8V - 40V
Input
VIN
VCC
C3
C1
LM34919
RON
BST
C4
L1
RON/SD
SHUTDOWN
VOUT
SW
D1
SS
R1
R3
ISEN
C2
C6
FB
RTN
SGND
R2
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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LM34919
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Connection Diagram
SW
D3
BST
C1
C3
VCC
C3
C1
SGND
B1
B3
SS
B3
B1
RON/SD
A1
A3
FB
A3
VIN
D1
ISEN
D2
A2
D3
D2
A2
D1
A1
RTN
Figure 1. Bump Side
Figure 2. Top View
PIN DESCRIPTIONS
2
Pin No.
Name
A1
RON/SD
A2
RTN
A3
FB
B1
SGND
B3
SS
C1
Description
Application Information
On-time control and
shutdown
An external resistor from VIN to this pin sets the buck switch on-time.
Grounding this pin shuts down the regulator.
Circuit Ground
Ground for all internal circuitry other than the current limit detection.
Feedback input from the
regulated output
Internally connected to the regulation and over-voltage comparators. The
regulation level is 2.5V.
Sense Ground
Re-circulating current flows into this pin to the current sense resistor.
Softstart
An internal current source charges an external capacitor to 2.5V, providing
the softstart function.
ISEN
Current sense
The re-circulating current flows through the internal sense resistor, and out of
this pin to the free-wheeling diode. Current limit is nominally set at 0.64A.
C3
VCC
Output from the startup
regulator
Nominally regulates at 7.0V. An external voltage (7V-14V) can be applied to
this pin to reduce internal dissipation. An internal diode connects VCC to VIN.
D1
VIN
Input supply voltage
Nominal input range is 8.0V to 40V.
D2
SW
Switching Node
Internally connected to the buck switch source. Connect to the inductor, freewheeling diode, and bootstrap capacitor.
D3
BST
Boost pin for bootstrap
capacitor
Connect a 0.022 µF capacitor from SW to this pin. The capacitor is charged
from VCC via an internal diode during each off-time.
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)
VIN to RTN
44V
BST to RTN
52V
SW to RTN (Steady State)
-1.5V
ESD Rating, Human Body Model (2)
2kV
BST to VCC
44V
VIN to SW
44V
BST to SW
14V
VCC to RTN
14V
SGND to RTN
-0.3V to +0.3V
SS to RTN
-0.3V to 4V
All Other Inputs to RTN
-0.3 to 7V
Storage Temperature Range
-65°C to +150°C
Junction temperature
(1)
(2)
150°C
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Operating Ratings (1)
VIN
8.0V to 40V
−40°C to + 125°C
Junction Temperature
(1)
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
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Electrical Characteristics
Specifications with standard type are for TJ = 25°C only; limits in boldface type apply over the full Operating Junction
Temperature (TJ) range. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical
values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless
otherwise stated the following conditions apply: VIN = 12V, RON = 200kΩ. See (1).
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
7
7.4
V
Start-Up Regulator, VCC
VCCReg
UVLOVCC
VCC regulated output
6.6
VIN-VCC dropout voltage
ICC = 0 mA,
VCC = UVLOVCC + 250 mV
1.2
V
VCC output impedance
0 mA ≤ ICC ≤ 5 mA, VIN = 8V
175
Ω
VCC current limit (2)
VCC = 0V
9.5
mA
VCC under-voltage lockout threshold
VCC increasing
5.7
V
UVLOVCC hysteresis
VCC decreasing
150
mV
UVLOVCC filter delay
100 mV overdrive
IQ
IIN operating current
Non-switching, FB = 3V, SW = Open
0.5
3
0.8
mA
µs
ISD
IIN shutdown current
RON/SD = 0V, SW = Open
75
150
µA
0.5
1.0
Ω
4.4
5.2
Switch Characteristics
Rds(on)
Buck Switch Rds(on)
ITEST = 200 mA
UVLOGD
Gate Drive UVLO
VBST - VSW Increasing
3.0
UVLOGD hysteresis
480
V
mV
Softstart Pin
VSS
Pull-up voltage
Internal current source
VSS = 1V
Threshold
Current out of ISEN
2.5
V
10.5
µA
Current Limit
ILIM
0.52
0.64
0.76
A
Resistance from ISEN to SGND
140
mΩ
Response time
150
ns
On Timer
tON - 1
On-time
VIN = 10V, RON = 200 kΩ
tON - 2
On-time
VIN = 40V, RON = 200 kΩ
Shutdown threshold
Voltage at RON/SD rising
Threshold hysteresis
Voltage at RON/SD
2.1
2.77
3.5
700
0.45
0.8
µs
ns
1.2
V
25
mV
155
ns
Off Timer
tOFF
Minimum Off-time
Regulation and Over-Voltage Comparators (FB Pin)
VREF
FB regulation threshold
SS pin = steady state
FB over-voltage threshold
2.440
2.5
2.550
V
2.9
V
1
nA
Thermal shutdown temperature
175
°C
Thermal shutdown hysteresis
20
°C
61
°C/W
FB bias current
FB = 3V
Thermal Shutdown
TSD
Thermal Resistance
θJA
(1)
(2)
4
Junction to Ambient
0 LFPM Air Flow
Typical specifications represent the most likely parametric norm at 25°C operation.
VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading
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Typical Performance Characteristics
Efficiency at 800 kHz
Efficiency at 2 MHz
Figure 3.
Figure 4.
VCC vs VIN
VCC vs ICC
8
7.5
7
IOUT = 0 mA,
All frequencies
VIN
VIN = 9V
6
8 10V
VIN = 8V
5
6.5
VCC (V)
VCC (V)
7.0
650 kHz,
IOUT = 200 mA
6.0
3
2
1.3 MHz,
5.5
4
IOUT = 200 mA
VCC Externally Loaded
1
FS = 800 kHz
5.0
6.5
0
7.0
7.5
8.0
8.5
9.0
0
2
4
6
8
10
12
ICC (mA)
VIN (V)
Figure 5.
Figure 6.
ICC vs Externally Applied VCC
ON-TIME vs VIN and RON
Figure 7.
Figure 8.
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Typical Performance Characteristics (continued)
Voltage at the RON/SD Pin
Shutdown and Operating Current into VIN
Figure 9.
Figure 10.
TYPICAL APPLICATION CIRCUIT AND BLOCK DIAGRAM
7V SERIES
REGULATOR
8V-40V
Input
LM34919
VIN
VCC
C3
VCC
UVLO
C5
C1
+
RON
RON/SD
ON TIMER
RON
START
COMPLETE
OFF TIMER
0.8V
START
COMPLETE
BST
GATE DRIVE
UVLO
C4
VIN
2.5V
10.5 PA
C6
DRIVER
FB
RTN
6
DRIVER
LOGIC
SS
+
REGULATION
COMPARATOR
+
OVER2.9V VOLTAGE
COMPARATOR
L1
LEVEL
SHIFT
SW
VOUT
THERMAL
SHUTDOWN
D1
CURRENT LIMIT
COMPARATOR
R3
R1
+
64 mV
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+
RSENSE
100 m:
ISEN
SGND R2
C2
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VIN
7.0V
UVLO
VCC
SW Pin
Inductor
Current
2.5V
SS Pin
VOUT
t1
t2
Figure 11. Start Up Sequence
FUNCTIONAL DESCRIPTION
The LM34919 Step Down Switching Regulator features all the functions needed to implement a low cost, efficient
buck bias power converter capable of supplying at least 0.6A to the load. This high voltage regulator contains an
N-Channel buck switch, is easy to implement, and is available in a DSBGA package. The regulator's operation is
based on a constant on-time control scheme, where the on-time is determined by VIN. This feature allows the
operating frequency to remain relatively constant with load and input voltage variations. The feedback control
requires no loop compensation resulting in very fast load transient response. The valley current limit detection
circuit, internally set at 0.64A, holds the buck switch off until the high current level subsides. This scheme
protects against excessively high current if the output is short-circuited when VIN is high.
The LM34919 can be applied in numerous applications to efficiently regulate down higher voltages. Additional
features include: Thermal shutdown, VCC under-voltage lockout, gate drive under-voltage lockout, and maximum
duty cycle limiter.
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Control Circuit Overview
The LM34919 buck DC-DC regulator employs a control scheme based on a comparator and a one-shot on-timer,
with the output voltage feedback (FB) compared to an internal reference (2.5V). If the FB voltage is below the
reference the buck switch is turned on for a time period determined by the input voltage and a programming
resistor (RON). Following the on-time the switch remains off until the FB voltage falls below the reference but not
less than the minimum off-time. The buck switch then turns on for another on-time period. Typically, during startup, or when the load current increases suddenly, the off-times are at the minimum. Once regulation is
established, the off-times are longer.
When in regulation, the LM34919 operates in continuous conduction mode at heavy load currents and
discontinuous conduction mode at light load currents. In continuous conduction mode current always flows
through the inductor, never reaching zero during the off-time. In this mode the operating frequency remains
relatively constant with load and line variations. The minimum load current for continuous conduction mode is
one-half the inductor's ripple current amplitude. The operating frequency is approximately:
FS =
VOUT x (VIN ± 1.5V)
1.13 x 10
-10
x (RON + 1.4 k:) x VIN
(1)
The buck switch duty cycle is approximately equal to:
VOUT
tON
DC =
tON + tOFF
=
VIN
(2)
In discontinuous conduction mode current through the inductor ramps up from zero to a peak during the on-time,
then ramps back to zero before the end of the off-time. The next on-time period starts when the voltage at FB
falls below the reference - until then the inductor current remains zero, and the load current is supplied by the
output capacitor. In this mode the operating frequency is lower than in continuous conduction mode, and varies
with load current. Conversion efficiency is maintained at light loads since the switching losses decrease with the
reduction in load and frequency. The approximate discontinuous operating frequency can be calculated as
follows:
2
FS =
VOUT x L1 x 1.57 x 10
RL x (RON)
20
2
(3)
where RL = the load resistance.
The output voltage is set by two external resistors (R1, R2). The regulated output voltage is calculated as
follows:
VOUT = 2.5 x (R1 + R2) / R2
(4)
Output voltage regulation is based on ripple voltage at the feedback input, normally obtained from the output
voltage ripple through the feedback resistors. The LM34919 requires a minimum of 25 mV of ripple voltage at the
FB pin. In cases where the capacitor's ESR is insufficient additional series resistance may be required (R3).
Start-Up Regulator, VCC
The start-up regulator is integral to the LM34919. The input pin (VIN) can be connected directly to line voltage up
to 40V, with transient capability to 44V. The VCC output regulates at 7.0V, and is current limited at 9.5 mA. Upon
power up, the regulator sources current into the external capacitor at VCC (C3). When the voltage on the VCC
pin reaches the under-voltage lockout threshold of 5.7V, the buck switch is enabled and the Softstart pin is
released to allow the Softstart capacitor (C6) to charge up.
The minimum input voltage is determined by the regulator's dropout voltage, the VCC UVLO falling threshold
(≊5.55V), and the frequency. When VCC falls below the falling threshold the VCC UVLO activates to shut off the
output. If VCC is externally loaded, the minimum input voltage increases.
To reduce power dissipation in the start-up regulator, an auxiliary voltage can be diode connected to the VCC pin.
Setting the auxiliary voltage to between 7V and 14V shuts off the internal regulator, reducing internal power
dissipation. The sum of the auxiliary voltage and the input voltage (VCC + VIN) cannot exceed 52V. Internally, a
diode connects VCC to VIN (see Figure 12).
8
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VCC
C3
BST
C4
L1
LM34919
D2
SW
VOUT
D1
ISEN
R1
R3
SGND
R2
C2
FB
Figure 12. Self Biased Configuration
Regulation Comparator
The feedback voltage at FB is compared to the voltage at the Softstart pin (2.5V). In normal operation (the output
voltage is regulated), an on-time period is initiated when the voltage at FB falls below 2.5V. The buck switch
stays on for the programmed on-time, causing the FB voltage to rise above 2.5V. After the on-time period, the
buck switch stays off until the FB voltage falls below 2.5V. Input bias current at the FB pin is less than 100 nA
over temperature.
Over-Voltage Comparator
The voltage at FB is compared to an internal 2.9V reference. If the voltage at FB rises above 2.9V the on-time
pulse is immediately terminated. This condition can occur if the input voltage or the output load changes
suddenly, or if the inductor (L1) saturates. The buck switch remains off until the voltage at FB falls below 2.5V.
ON-Time Timer, and Shutdown
The on-time is determined by the RON resistor and the input voltage (VIN), and is calculated from:
tON =
1.13 x 10
-10
x (RON + 1.4 k:)
VIN - 1.5V
+ 100 ns
(5)
The inverse relationship with VIN results in a nearly constant frequency as VIN is varied. To set a specific
continuous conduction mode switching frequency (FS), the RON resistor is determined from the following:
RON =
VOUT x (VIN - 1.5V)
FS x 1.13 x 10
-10
- 1.4 k:
x VIN
(6)
In high frequency applications the minimum value for tON is limited by the maximum duty cycle required for
regulation and the minimum off-time of (155 ns, ±15%). The minimum off-time limits the maximum duty cycle
achievable with a low voltage at VIN. At high values of VIN, the minimum on-time is limited to ≊ 120 ns.
The LM34919 can be remotely shut down by taking the RON/SD pin below 0.8V (see Figure 13). In this mode
the SS pin is internally grounded, the on-timer is disabled, and bias currents are reduced. Releasing the RON/SD
pin allows normal operation to resume. The voltage at the RON/SD pin is between 1.4V and 4.0V, depending on
VIN and the RON resistor.
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VIN
Input
Voltage
RON
LM34919
RON/SD
STOP
RUN
Figure 13. Shutdown Implementation
Current Limit
Current limit detection occurs during the off-time by monitoring the recirculating current through the free-wheeling
diode (D1). Referring to the Block Diagram, when the buck switch is turned off the inductor current flows through
the load, into SGND, through the sense resistor, out of ISEN and through D1. If that current exceeds 0.64A the
current limit comparator output switches to delay the start of the next on-time period. The next on-time starts
when the current out of ISEN is below 0.64A and the voltage at FB is below 2.5V. If the overload condition
persists causing the inductor current to exceed 0.64A during each on-time, that is detected at the beginning of
each off-time. The operating frequency is lower due to longer-than-normal off-times.
Figure 14 shows the inductor current waveform. During normal operation the load current is Io, the average of
the ripple waveform. When the load resistance decreases the current ratchets up until the lower peak reaches
0.64A. During the Current Limited portion of Figure 14, the current ramps down to 0.64A during each off-time,
initiating the next on-time (assuming the voltage at FB is <2.5V). During each on-time the current ramps up an
amount equal to:
ΔI = (VIN - VOUT) x tON / L1
(7)
During this time the LM34919 is in a constant current mode, with an average load current (IOCL) equal to 0.64A +
ΔI/2.
Generally, in applications where the switching frequency is higher than ≊300 kHz and uses a small value
inductor, the higher dl/dt of the inductor's ripple current results in an effectively lower valley current limit threshold
due to the response time of the current limit detection circuit. However, since the small value inductor results in a
relatively high ripple current amplitude (ΔI in Figure 14), the load current (IOCL) at current limit is typically in
excess of 640 mA.
IPK
'I
IOCL
Inductor Current
0.64A
IO
Normal Operation
Load Current
Increases
Current Limited
Figure 14. Inductor Current - Current Limit Operation
10
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N-Channel Buck Switch and Driver
The LM34919 integrates an N-Channel buck switch and associated floating high voltage gate driver. The peak
current allowed through the buck switch is 1.5A, and the maximum allowed average current is 1A. The gate
driver circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. A 0.022
µF capacitor (C4) connected between BST and SW provides the voltage to the driver during the on-time. During
each off-time, the SW pin is at approximately -1V, and C4 charges from VCC through the internal diode. The
minimum off-time forced by the LM34919 ensures a minimum time each cycle to recharge the bootstrap
capacitor.
Softstart
The softstart feature allows the converter to gradually reach a steady state operating point, thereby reducing
start-up stresses and current surges. Upon turn-on, after VCC reaches the under-voltage threshold, an internal
10.5 µA current source charges up the external capacitor at the SS pin to 2.5V. The ramping voltage at SS (and
the non-inverting input of the regulation comparator) ramps up the output voltage in a controlled manner.
An internal switch grounds the SS pin if VCC is below the under-voltage lockout threshold, or if the RON/SD pin is
grounded.
Thermal Shutdown
The LM34919 should be operated so the junction temperature does not exceed 125°C. If the junction
temperature increases, an internal Thermal Shutdown circuit, which activates (typically) at 175°C, takes the
controller to a low power reset state by disabling the buck switch. This feature helps prevent catastrophic failures
from accidental device overheating. When the junction temperature reduces below 155°C (typical hysteresis =
20°C) normal operation resumes.
APPLICATIONS INFORMATION
EXTERNAL COMPONENTS
The procedure for calculating the external components is illustrated with the following design example. Referring
to the Block Diagram, the circuit is to be configured for the following specifications:
• VOUT = 5V
• VIN = 8V to 40V
• Minimum load current = 200 mA
• Maximum load current = 600 mA
• Switching Frequency = 800 kHz
• Soft-start time = 5 ms
R1 and R2: These resistors set the output voltage. The ratio of the feedback resistors is calculated from:
R1/R2 = (VOUT/2.5V) - 1
(8)
For this example, R1/R2 = 1. R1 and R2 should be chosen from standard value resistors in the range of 1.0 kΩ
to 10 kΩ which satisfy the above ratio. For this example, 2.49kΩ is chosen for R1 and R2.
RON: This resistor sets the on-time, and (by default) the switching frequency. The switching frequency must be
less than 1.6 MHz to ensure the minimum forced off-time does not interfere with the circuit's proper operation.
The RON resistor is calculated from the following equation, using the minimum input voltage.
VOUT x (VIN(min) - 1.5V)
RON =
FS x 1.13 x 10
-10
-1.4 k: = 43.5 k:
x VIN(min)
(9)
Check that this value resistor does not set an on-time less than 120 ns at maximum VIN.
A standard value 43.2 kΩ resistor is used, resulting in a nominal frequency of 806 kHz. The minimum on-time is
≊231 ns at Vin = 40V, and the maximum on-time is ≊875 ns at Vin = 8V. Alternately, RON can be determined
using Equation 5 if a specific on-time is required.
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L1: The main parameter affected by the inductor is the inductor current ripple amplitude (IOR). The minimum load
current is used to determine the maximum allowable ripple in order to maintain continuous conduction mode,
where the lower peak does not reach 0 mA. This is not a requirement of the LM34919, but serves as a guideline
for selecting L1. For this case the maximum ripple current is:
IOR(MAX) = 2 x IOUT(min) = 400 mA
(10)
If the minimum load current is zero, use 20% of IOUT(max) for IOUT(min) in Equation 10. The ripple calculated in
Equation 10 is then used in the following equation:
L1 =
VOUT x (VIN(max) - VOUT)
IOR(max) x fSW x VIN(max)
= 13.6 PH
(11)
A standard value 15 µH inductor is selected. The maximum ripple amplitude, which occurs at maximum VIN,
calculates to 362 mA p-p, and the peak current is 781 mA at maximum load current. Ensure the selected inductor
is rated for this peak current.
C2 and R3: Since the LM34919 requires a minimum of 25 mVpp ripple at the FB pin for proper operation, the
required ripple at VOUT is increased by R1 and R2. This necessary ripple is created by the inductor ripple current
flowing through R3, and to a lesser extent by C2 and its ESR. The minimum inductor ripple current is calculated
using Equation 11, rearranged to solve for IOR at minimum VIN.
IOR(min) =
VOUT x (VIN(min) ± VOUT)
L1 x fSW x VIN(min)
= 155 mAp-p
(12)
The minimum value for R3 is equal to:
25 mV x (R1 + R2)
= 0.32:
R3(min) =
R2 x IOR (min)
(13)
A standard value 0.39Ω resistor is used for R3 to allow for tolerances. C2 should generally be no smaller than
3.3 µF, although that is dependent on the frequency and the desired output characteristics. C2 should be a low
ESR good quality ceramic capacitor. Experimentation is usually necessary to determine the minimum value for
C2, as the nature of the load may require a larger value. A load which creates significant transients requires a
larger value for C2 than a non-varying load.
C1 and C5: C1's purpose is to supply most of the switch current during the on-time, and limit the voltage ripple at
VIN, on the assumption that the voltage source feeding VIN has an output impedance greater than zero.
At maximum load current, when the buck switch turns on, the current into VIN suddenly increases to the lower
peak of the inductor's ripple current, ramps up to the upper peak, then drops to zero at turn-off. The average
current during the on-time is the load current. For a worst case calculation, C1 must supply this average load
current during the maximum on-time, without letting the voltage at VIN drop below ≊7.5V. The minimum value for
C1 is calculated from:
C1 =
IOUT (max) x tON
'V
= 1 PF
(14)
where tON is the maximum on-time, and ΔV is the allowable ripple voltage (0.5V at VIN = 8V). C5's purpose is to
minimize transients and ringing due to long lead inductance leading to the VIN pin. A low ESR, 0.1 µF ceramic
chip capacitor must be located close to the VIN and RTN pins.
C3: The capacitor at the VCC pin provides noise filtering and stability for the VCC regulator. C3 should be no
smaller than 0.1 µF, and should be a good quality, low ESR, ceramic capacitor. C3's value, and the VCC current
limit, determine a portion of the turn-on-time (t1 in Figure 11).
C4: The recommended value for C4 is 0.022 µF. A high quality ceramic capacitor with low ESR is recommended
as C4 supplies a surge current to charge the buck switch gate at each turn-on. A low ESR also helps ensure a
complete recharge during each off-time.
C6: The capacitor at the SS pin determines the softstart time, i.e. the time for the output voltage, to reach its final
value (t2 in Figure 11). The capacitor value is determined from the following:
12
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C6 =
SNOSAY2E – MAY 2007 – REVISED FEBRUARY 2013
t2 x 10.5 PA
2.5V
= 0.021 PF
(15)
D1: A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed
transitions at the SW pin may inadvertently affect the IC's operation through external or internal EMI. The diode
should be rated for the maximum input voltage, the maximum load current, and the peak current which occurs
when the current limit and maximum ripple current are reached simultaneously. The diode's average power
dissipation is calculated from:
PD1 = VF x IOUT x (1-D)
(16)
where VF is the diode's forward voltage drop, and D is the on-time duty cycle.
FINAL CIRCUIT
The final circuit is shown in Figure 15, and its performance is shown in Figure 16 and Figure 17. Current limit
measured approximately 650 mA at 8V, and 740 mA at 40V.
8V - 40V
Input
VCC
VIN
C1
2.2 PF
C5
0.1 PF
C3
0.1 PF
LM34919
BST
RON
C4
0.022 PF
L1
15 PH
43.2 k:
VOUT
SW
5V
RON/SD
D1
SHUTDOWN
C6
0.022 PF
SS
ISEN
R1
2.49 k:
FB
RTN
SGND
R2
2.49 k:
R3
0.39:
C2
22 PF
Figure 15. Example Circuit
Figure 16. Efficiency vs. Load Current and VIN
(Circuit of Figure 15)
Figure 17. Frequency vs. VIN (Circuit of Figure 15)
LOW OUTPUT RIPPLE CONFIGURATIONS
For applications where lower ripple at VOUT is required, the following options can be used to reduce or nearly
eliminate the ripple.
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a) Reduced ripple configuration: In Figure 18, Cff is added across R1 to AC-couple the ripple at VOUT directly
to the FB pin. This allows the ripple at VOUT to be reduced to a minimum of 25 mVpp by reducing R3, since the
ripple at VOUT is not attenuated by the feedback resistors. The minimum value for Cff is determined from:
tON (max)
Cff =
(R1//R2)
(17)
where tON(max) is the maximum on-time, which occurs at VIN(min). The next larger standard value capacitor should
be used for Cff. R1 and R2 should each be towards the upper end of the 2 kΩ to 10 kΩ range.
L1
SW
VOUT
LM34919
Cff
R1
R3
FB
R2
C2
Figure 18. Reduced Ripple Configuration
b) Minimum ripple configuration: The circuit of Figure 19 provides minimum ripple at VOUT, determined
primarily by C2's characteristics and the inductor's ripple current since R3 is removed. RA and CA are chosen to
generate a sawtooth waveform at their junction, and that voltage is AC-coupled to the FB pin via CB. To
determine the values for RA, CA and CB, use the following procedure:
Calculate VA = VOUT - (VSW x (1 - (VOUT/VIN(min))))
(18)
where VSW is the absolute value of the voltage at the SW pin during the off-time (typically 1V). VA is the DC
voltage at the RA/CA junction, and is used in the next equation.
(VIN(min) - VA) x tON
RA x CA =
'V
(19)
where tON is the maximum on-time (at minimum input voltage), and ΔV is the desired ripple amplitude at the
RA/CA junction, typically 100 mV. RA and CA are then chosen from standard value components to satisfy the
above product. Typically CA is 3000 pF to 5000 pF, and RA is 10 kΩ to 300 kΩ. CB is then chosen large
compared to CA, typically 0.1 µF. R1 and R2 should each be towards the upper end of the 2 kΩ to 10 kΩ range.
L1
SW
VOUT
LM34919
RA
FB
CA
CB
C2
R1
R2
Figure 19. Minimum Output Ripple Using Ripple Injection
c) Alternate minimum ripple configuration: The circuit in Figure 20 is the same as that in Figure 15, except
the output voltage is taken from the junction of R3 and C2. The ripple at VOUT is determined by the inductor's
ripple current and C2's characteristics. However, R3 slightly degrades the load regulation. This circuit may be
suitable if the load current is fairly constant.
14
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SNOSAY2E – MAY 2007 – REVISED FEBRUARY 2013
L1
SW
LM34919
R1
R3
FB
VOUT
R2
C2
Figure 20. Alternate Minimum Output Ripple Configuration
Minimum Load Current
The LM34919 requires a minimum load current of 1 mA. If the load current falls below that level, the bootstrap
capacitor (C4) may discharge during the long off-time, and the circuit will either shutdown, or cycle on and off at
a low frequency. If the load current is expected to drop below 1 mA in the application, R1 and R2 should be
chosen low enough in value so they provide the minimum required current at nominal VOUT.
PC BOARD LAYOUT
Refer to application note AN-1112 for PC board guidelines for the DSBGA package.
The LM34919 regulation, over-voltage, and current limit comparators are very fast, and respond to short duration
noise pulses. Layout considerations are therefore critical for optimum performance. The layout must be as neat
and compact as possible, and all of the components must be as close as possible to their associated pins. The
two major current loops have currents which switch very fast, and so the loops should be as small as possible to
minimize conducted and radiated EMI. The first loop is that formed by C1, through the VIN to SW pins, L1, C2,
and back to C1.The second current loop is formed by D1, L1, C2 and the SGND and ISEN pins.
The power dissipation within the LM34919 can be approximated by determining the total conversion loss (PIN POUT), and then subtracting the power losses in the free-wheeling diode and the inductor. The power loss in the
diode is approximately:
PD1 = Iout x VF x (1-D)
(20)
where Iout is the load current, VF is the diode's forward voltage drop, and D is the on-time duty cycle. The power
loss in the inductor is approximately:
PL1 = Iout2 x RL x 1.1
(21)
where RL is the inductor's DC resistance, and the 1.1 factor is an approximation for the AC losses. If it is
expected that the internal dissipation of the LM34919 will produce excessive junction temperatures during normal
operation, good use of the PC board's ground plane can help to dissipate heat. Additionally the use of wide PC
board traces, where possible, can help conduct heat away from the IC. Judicious positioning of the PC board
within the end product, along with the use of any available air flow (forced or natural convection) can help reduce
the junction temperatures.
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LM34919
SNOSAY2E – MAY 2007 – REVISED FEBRUARY 2013
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REVISION HISTORY
Changes from Revision D (February 2013) to Revision E
•
16
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 15
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM34919TL/NOPB
ACTIVE
DSBGA
YPA
10
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
SRYB
LM34919TLX/NOPB
ACTIVE
DSBGA
YPA
10
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
SRYB
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Apr-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
LM34919TL/NOPB
DSBGA
YPA
10
250
178.0
8.4
LM34919TLX/NOPB
DSBGA
YPA
10
3000
178.0
8.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1.68
2.13
0.76
4.0
8.0
Q1
1.68
2.13
0.76
4.0
8.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Apr-2014
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM34919TL/NOPB
DSBGA
YPA
LM34919TLX/NOPB
DSBGA
YPA
10
250
210.0
185.0
35.0
10
3000
210.0
185.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
YPA0010
0.600
±0.075
D
E
TLP10XXX (Rev D)
D: Max = 1.992 mm, Min =1.931 mm
E: Max = 1.53 mm, Min = 1.469 mm
4215069/A
NOTES:
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
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12/12
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