APRIL 2009 AS6C62256A 32K X 8 BIT LOW POWER CMOS SRAM FEATURES DESCRIPTION The AS6C62256A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6transistor cell. 32768x8 bit static CMOS RAM Access times 70 ns Common data inputs and data outputs Three-state outputs Typ. operating supply current o 70 ns: 50 mA TTL/CMOS-compatible Automatical reduction of power dissipation in long Read Cycles Power supply voltage 5V + 10% Operating temperature ranges o 0 to 70 °C o -40 to 85 °C QS 9000 Quality Standard ESD protection > 2000 V (MIL STD 883C M3015.7) Latch-up immunity >100 mA Packages: PDIP28 (600 mil) SOP28 (330 mil) PIN CONFIGURATION APRIL/2009 The Read cycle is finished by the falling edge of W, or by the rising edge of E, respectively. Data retention is guaranteed down to 2 V. With the exception of E, all inputs consist of NOR gates, so that no pull-up/pull-down resistors are required. The circuit is activated by the falling edge of E. The address and control inputs open simultaneously. According to the information of W and G, the data inputs, or outputs, are active. In a Read cycle, the data outputs are activated by the falling edge of G, afterwards the data word read will be available at the outputs DQ0-DQ7. After the address change, the data outputs go High-Z until the new information read is available. The data outputs have not preferred state. PIN DESCRIPTION ALLIANCE MEMORY PAGE 1 of 10 APRIL 2009 AS6C62256A 32K X 8 BIT LOW POWER CMOS SRAM APRIL/2009 ALLIANCE MEMORY PAGE 2 of 10 APRIL 2009 AS6C62256A 32K X 8 BIT LOW POWER CMOS SRAM APRIL/2009 ALLIANCE MEMORY PAGE 3 of 10 APRIL 2009 AS6C62256A 32K X 8 BIT LOW POWER CMOS SRAM APRIL/2009 ALLIANCE MEMORY PAGE 4 of 10 APRIL 2009 AS6C62256A 32K X 8 BIT LOW POWER CMOS SRAM APRIL/2009 ALLIANCE MEMORY PAGE 5 of 10 APRIL 2009 AS6C62256A 32K X 8 BIT LOW POWER CMOS SRAM APRIL/2009 ALLIANCE MEMORY PAGE 6 of 10 APRIL 2009 AS6C62256A 32K X 8 BIT LOW POWER CMOS SRAM APRIL/2009 ALLIANCE MEMORY PAGE 8 of 10 APRIL 2009 AS6C62256A 32K X 8 BIT LOW POWER CMOS SRAM APRIL/2009 ALLIANCE MEMORY PAGE 9 of 10 APRIL 2009 AS6C62256A 32K X 8 BIT LOW POWER CMOS SRAM Alliance Memory, Inc 511 Taylor Way, San Carlos, CA 94070, USA Phone: 650‐610‐6800 Fax: 650‐620‐9211 www.alliancememory.com Copyright © Alliance Memory All Rights Reserved © Copyright 2009 Alliance Memory, Inc. All rights reserved. Our three‐point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at anytime, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life‐supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life‐supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. APRIL/2009 ALLIANCE MEMORY PAGE 10 of 10