ETC2 ECJDB50J226M Product specification for information Datasheet

No.151S-ECJ-KBD38E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
“12” (EIA 0805 ) VA Type Individual Specification
SUBJECT
1
PAGE
of 1
th
DATE 23 Apr. 2003
1.Scope
This specification applies to MATSUSHITA’S Multilayer Ceramic Chip Capacitor “0805 VA Type”
Temp. Char:X5R Rated voltage DC6.3V Nominal Cap.10µF.
2.Style and Dimensions
W
T
Symbol
Table 1
Dimensions(mm)
L
2.00±0.20
W
1.25±0.20
T
L1,L2
0.85±0.10
L2
L
L1
0.50±0.25
3.Operating Temperature Range
Class2
Table 2
Temperature Characteristics
X5R
Operating Temp. Range.
-55 to +85°C
4.Individual Specification
Table 3
Part Number
Rated
Voltage
Temp. Char.
Nominal
Capacitance
Cap. Tolerance
ECJCV50J106M
D.C. 6.3V
X5R
10 µF
M : ±20%
5.Explanation of Part Numbers
E C J
C
V
Common Code
5
Temp. Char.
0 J
Show in
Table 4
Size Code
Code
Size
C
0805 VA Type
Packaging Styles
Code
Packaging
V
φ180Reel Paper Taping 4000pcs
6.Temperature Characteristics of Class 2 Capacitors
Table 4
Capacitance Change rate from Temperature.
Temp. Char.
Temp. Char.
Without voltage application
Code
5
X5R
+/-15%
1 0 6
Nominal Cap.
Rated Voltage
Code Voltage
0J
DC6.3V
Measurement
Temperature
Range
-55 to +85°C
M
Cap.
Tolerance
Code
Show in
Table 3
Reference
Temperature
+25°C
7.Soldering method
Soldering method of Multilayer ceramic chip capacitor shall be reflow soldering.
Note :
Ceramic Business Unit LCR Device Company
Matsushita Electronic Components Co.,Ltd.
Kadoma, Osaka, Japan
APPROVAL
CHECK
DESIGN
H.Itow
A.Omi
T.Senshu
No.151S-ECJ-KAD39E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
“13” (EIA 1206 ) VA Type Individual Specification
SUBJECT
1
PAGE
of 1
th
DATE 23 Apr. 2003
1.Scope
This specification applies to MATSUSHITA’S Multilayer Ceramic Chip Capacitor “1206 VA Type”
Temp. Char:X5R Rated voltage DC6.3V Nominal Cap.10µF,22µF.
2.Style and Dimensions
W
T
Symbol
Table 1
Dimensions(mm)
L
3.20±0.20
W
1.60±0.20
T
L1,L2
0.85±0.10
L2
L
L1
0.60±0.30
3.Operating Temperature Range
Class2
Table 2
Temperature Characteristics
X5R
Operating Temp. Range.
-55 to +85°C
4.Individual Specification
Table 3
Part Number
Rated
Voltage
Temp. Char.
Nominal
Capacitance
Cap. Tolerance
ECJDV50J106M
D.C. 6.3V
X5R
10 µF
M : ±20%
ECJDV50J226M
D.C. 6.3V
X5R
22 µF
M : ±20%
5.Explanation of Part Numbers
E C J
D
V
Common Code
5
Temp. Char.
0 J
Show in
Table 4
Size Code
Code
Size
D
1206 VA type
Packaging Styles
Code
Packaging
V
φ180Reel Paper Taping 4000pcs
6.Temperature Characteristics of Class 2 Capacitors
Table 4
Capacitance Change rate from Temperature.
Temp. Char.
Temp. Char.
Without voltage application
Code
5
X5R
+/-15%
1 0 6
Nominal Cap.
Rated Voltage
Code Voltage
0J
DC6.3V
Measurement
Temperature
Range
-55 to +85°C
M
Cap.
Tolerance
Code
Show in
Table 3
Reference
Temperature
+25°C
7.Soldering method
Soldering method of Multilayer ceramic chip capacitor shall be reflow soldering.
Note :
Ceramic Business Unit LCR Device Company
Matsushita Electronic Components Co.,Ltd.
Kadoma, Osaka, Japan
APPROVAL
CHECK
DESIGN
H.Itow
A.Omi
T.Senshu
SUBJECT
No. 151S-ECJ-KZD38E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Class2 Large Capacitance)
PAGE
1 of 7
DATE
th
23 . Apr. 2003
1.Scope
This specification applies to MATSUSHITA’S Multilayer Ceramic Chip Capacitor “0805 ,1206 VA Type” Temp.
Char:X5R Rated voltage DC6.3V.
If there is a difference between this common specification and any individual specifications, priority shall be
given to the individual specifications
2.Applications
2.1 This product shall be used for general purpose applications required of consumer-type-electronic(audio
visual, household, office, information & communication) equipment.
However, depending on ways of application there might be possibilities to accelerate the life-end as in
failure modes of performance deterioration or short/open circuits.
Especially for such product design needed a high level of safety, a careful pre-study about how a single
trouble with this product affects end product shall be recommended ;
Ex. ①ensure safety as a system by adding protective devices or circuits.
Ex. ②ensure safety as a system by adding a redundant-design circuits not to become unsafe because of
a single trouble with this product..
Such failsafe-design considerations shall be practiced for a higher level of safety.
2.2 Whenever a doubt about safety arises from this product, please inform us immediately for technical
consultation without fail.
2.3 For the following applications, please consult us for a different specification from this specification.
2.3.1 When it is considered hard to follow the instructions below for safety or handling.
2.3.2 Any applications where a trouble or erroneous operation with this product may cause directly or
indirectly hazardous situations which could result in death or injury ;
Ex. ①Aircraft Equipment, Aerospace Equipment (artificial satellite, rocket, etc.)
②Submarine Equipment (submarine repeating equipment, etc.)
③The defense agency
④Transport Equipment (motor vehicles, airplane, trains, ship, traffic signal controllers)
⑤Power generation control Equipment
(atomic power, hydroelectric power, thermal power plant control system)
⑥Medical Equipment (life-support equipment, a pacemaker for the heart, dialysis controllers)
⑦Information processing Equipment (a large scale computer system)
⑧Electric Heating Appliances, Burning Apparatus
⑨Rotary Motion Equipment
⑩Security Systems
⑪an equivalent equipment above and so forth
3.Part Number Code
E C J
C
V
①
②
③
5
④
0 J
⑤
1 0 6
⑥
M
⑦
3.1 Common Code ①
ECJ : Multilayer Ceramic Chip Capacitors
3.2 Size②, Packaging Styls③. Temperature Characteristic④,
Rated Voltage⑤, Capacitance Tolerance⑦
Shown in Individual Specification.
3.3 Nominal Capacitance⑥
The Nominal Capacitance value is expressed in Pico farads(pF)
and is identified by a three-digit number ; the first two digit
represent significant figures and the last digit specifies the number
of zero to follow.
Symbol (Ex.)
104
105
106
Nominal Cap.
0.1μF
1μF
10μF
Note ;
Ceramic Business Unit LCR Device Company
Matsushita Electronic Components Co.,Ltd.
Kadoma, Osaka, Japan
APPROVAL
CHECK
DESIGN
H.Itow
A.Omi
T.Senshu
CLASSIFICATION
SUBJECT
No. 151S-ECJ-KGD38E
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Common Specifications (Class2 Large Capacitance)
PAGE
2 of 7
DATE 23th. Apr. 2003
4.Operating Temperature Range
Shown in Individual Specification.
5.Performance
The performance of the capacitor and its test condition shall be specified in Table 2.
5.1 Pretreatment
Before test and measurements, the following pretreatment shall be applied when necessary.
5.1.1 Heat Treatment
The capacitors shall be kept in a temperature of 150+0/-10℃ for 1 hour and then shall be stored in a
room temperature for 48±4 hours, before initial measurement.
5.1.2 Voltage Treatment
A D. C. voltage shall be applied for 1 hour in the specified test condition and then shall be stored in a
room temperature for 48±4 hours, before initial measurement.
6.Test
Unless otherwise specified, all test and measurements shall be made at a temperature of 15~35℃ and at a
relative humidity of 45~75%.
If results obtained are doubted a further test should be carried out at a temperature of 20±2℃ and a relative
humidity of 60~70%.
7.Structure
The structure shall be in a monolithic form as shown in Fig. 1.
Fig.1
No.
①
②
③
④
⑤
Table 1
Name
Dielectric
Inner electrode
Substrate electrode
Intermediate electrode
External electrode
8.Product Place
・Hokkaido Matsushita Electric Co., Ltd. / 1037-2, Kamiosatsu, Chitose-shi, Hokkaido, Japan
・Matsushita Electric Devices (M) Sdn. Bhd. / No.1 Jalan Pelga 16/13, 4000 Shah Alam, Selanger, MALAYSIA
・Tianjin Matsushita Electronic Component Co., Ltd. / S9 4TH Sub-street west Xiqing Economic Development
Zone Tianjin
9. Receipt and Effective term of Specifications
(1) Please send back one copy of this specification after you stamp your company stamp in this specification.
If you do not it back even if three months have passed after the issue date mentioned in the cover of this
specification, we assume that the specification would be received.
(2) When either your company or our company has no offer by document until three months before the
termination of the expiry date mentioned in the cover of this specification, the expiry date of this
specification shall be continuously extended one more year every year.
In addition to the above, if revision is performed during effective term and you have confirmed, old
specification shall be invalidity
Note ;
SUBJECT
No. 151S-ECJ-KGD38E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Class2 Large Capacitance)
PAGE
3 of 7
DATE 23th. Apr. 2003
Table 2
No.
Contents
1 Appearance
2
3
4
5
Performance
Test Method
There shall be no defects which affect With a magnifying glass (3 times).
the life and use.
With slide calipers and a micrometer.
Dimensions
Shown in Individual Specification.
Test
voltage :
Dielectric
There shall be no dielectric breakdown
250% of rated voltage
Withstanding voltage or damage.
Apply a D. C. voltage of the above value for 1
to 5 seconds.
Charge/discharge current shall be within 50mA.
Measuring voltage : Rated voltage
Insulation
More than 100/C MΩ.
Measuring voltage time : 60±5s
Resistance(I.R.)
(C : Rated Cap. in µF )
Charge/discharge current shall be within 50mA.
Measuring
Measuring
Capacitance
Shall be within the specified tolerance.
Cap.
6 Dissipation Factor
(tanδ)
C≦10µF
C>10µF
0.15 max.
7 Temperature Without Temp. Char. X5R : Within ±15%
Characteris- Voltage
tics
Application
Frequency
1kHz±10%
120Hz±20%
For the class2 Capacitors, perform the
heat treatment in par. 5. 1. 1.
Our Measurement instrument is shown in the
Table 3.
Measure the capacitance at each stage by
changing the temperature in the order of step 1
to 4 shown in the table below. Calculate the
rate of change regarding the capacitance at
stage 3 as the reference.
Temp. Char.
25±2
Stage2
-55±3
Stage3
25±2
Stage4
85±2
Stage5
25±2
C≦10µF
C>10µF
The terminal electrode shall be free
from peeling or signs of peeling.
X5R
Stage1
Cap.
8 Adhesion
Voltage
1.0±0.2Vr.m.s.
0.5±0.1Vr.m.s.
Measuring
Frequency
1kHz±10%
120Hz±20%
Measuring
Voltage
0.5±0.1Vr.m.s.
0.5±0.1Vr.m.s.
Solder the specimen to the testing jig shown in
the figure., and apply a 5N force in the arrow
direction for 10 seconds.
Material : Alumina board (95% min.) or glass
epoxy board.
Thickness : 1.0mm min.
(continue)
Note ;
SUBJECT
No. 151S-ECJ-KGD38E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Class2 Large Capacitance)
PAGE
4 of 7
DATE 23th. Apr. 2003
Table 2
No.
Contents
Performance
Test Method
9 Bending
Appea- There shall be no cracks and other After soldering capacitor on the substrate 1mm
Strength
rance mechanical damage.
of bending shall be applied for 5 seconds.
Bending speed : 1mm/s
(shown in Fig. 3)
X5R
Within ±12.5%
Capacitance
10 Vibration
Proof
For the class 2 Capacitors, perform the heat
treatment in par. 5.1.1.
Capac- Shall be within the specified tolerance. Solder the specimen to the testing jig shown
in Fig 2. Apply a variable vibration of 1.5mm
itance
total amplitude in the 10~55~10Hz vibration
tanδ Shall meet the specified initial value.
frequency range swept in 1 min. in 3 mutually
perpendicular directions for 2 hours each, a
total of 6 hours.
11 Resistance
to Solder
Heat
Appea- There shall be no cracks and other
rance
Mechanical damage.
Appea- There shall be no cracks and other
rance Mechanical damage.
Capac- Characteristic Change from the value
itance
before test.
X5R
tanδ
I.R.
Within ±12.5%
Shall meet the specified initial value.
Shall meet the specified initial value.
(1)Solder both method
Preconditioning : Heat Temperature
(See 5.1.1)/Class2
Solder temperature : 270±5℃
Dipping period : 3±0.5s
Preheat condition
Order
1
Temp.
(℃)
80 to 100
150 to 200
Period(s)
Type“12”
Type“13”
120 to 180
300 to 360
120 to 180
300 to 360
With- There shall be no dielectric breakdown
2
stand or damage.
Use solder H63A(JIS-Z-3282).For the flux,
voltage
use rosin (JIS-K-5902) ethanol solution of a
concentration of about 25% by weight. Use
tweezers for the holder to dip the specimen.
Recovery : 48±4 hours
(continue)
Note ;
SUBJECT
No. 151S-ECJ-KGD38E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Class2 Large Capacitance)
PAGE
5 of 7
DATE 23th. Apr. 2003
Table 2
No.
Contents
12 Solderability
Performance
More than 75% of the soldered area of
both terminal electrodes shall be
covered with fresh solder.
13 Temperature Appea- There shall be no mechanical damage.
cycle
rance
Capac- Temp. Char. Change from the value
itance
before test.
X5R
Within ±12.5%
tanδ Shall meet the specified initial value.
I.R.
Shall meet the specified initial value.
With- There shall be no dielectric breakdown
stand or damage.
voltage
Test Method
Solder temperature : 230±5℃
Dipping period : 4±1s
Dip the specimen in solder so that both
terminal electrodes are completely submerged.
Use solder H63A(JIS-Z-3282). For the flux use
rosin (JIS-K-5902) of ethanol solution of a
concentration of about 25% by weight.
Use tweezers for the holder to dip the
specimen.
Solder the specimen to the testing jig shown
in Fig.2. Condition the specimen to each
temperature from step 1 to 4 in this order for
the period shown in the table below. Regarding this conditioning as one cycle, perform
5 cycles continuously.
STEP TEMPERATURE (℃) PERIOD (min)
1
Minimum operation
temperature±3
30±3
2
Room temperature
3 max.
3
Maximum operation
temperature±5
30±3
4
Room temperature
3 max.
For the class2 capacitors, perform the heat
treatment in par. 5.1.1.
Before the measurement after test, the
specimen shall be left to stand at room
temperature for the following period :
48±4 h
14 Moisture
Resistance
Note ;
Appea- There shall be no mechanical damage. For the class2 capacitors, perform the heat
rance
treatment in par. 5. 1. 1.
Capac- Characteristic Change from the value Solder the specimen to the testing jig shown
in Fig.2.
itance
before test
X5R
Within ±20%
Test temperature : 40±2℃
tanδ 0.25 max.
Relative humidity : 90 to 95%
Test period : 500+24/0 h
More than 10/C MΩ.
I.R.
(C : Rated Cap. in µF )
Before the measurement after test, the
specimen shall be left to stand at room
temperature for the following period :
48±4 h
(continue)
CLASSIFICATION
SUBJECT
No. 151S-ECJ-KGD38E
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Common Specifications (Class2 Large Capacitance)
PAGE
6 of 7
DATE 23th. Apr. 2003
Table 2
No.
Contents
Perfomance
Test Method
15 Moisture
Appea- There shall be no mechanical damage. For the class2 capacitors, perform the voltage
Resistant
rance
reatment in par. 5. 1. 2.
Loading
Capac- Characteristic Change from the Solder the specimen to the testing jig shown
in Fig 2.
itance
value before test.
X5R
Within ±20%
Test temperature : 40±2℃
tanδ 0.25 max.
Relative humidity : 90 to 95%
More than 5/C MΩ.
I.R.
Applied voltage : Rated Voltage
(C : Rated Cap. in µF )
(D. C. Voltage)
Charge/discharge current shall be within
50mA
Test period : 500+24/0 h
16 High
Temperature
Resistant
Loading
Appea- There shall be no mechanical damage.
rance
CapacCharacteristic Change from the
itance
value before test.
X5R
Within ±20%
tanδ 0.25 max.
More than 10/C MΩ.
I.R.
(C : Rated Cap. in µF )
Before the measurement after test, the
specimen shall be left to stand at room
temperature for the following period :
48±4 h
For the class2 capacitors, perform the voltage
treatment in par. 5.1.2.
Solder the specimen to the testing jig shown
in Fig 2.
Test temperature : Max. Rated temp.±3℃
Applied voltage : Rated Voltage
(D. C. Voltage)
Charge/discharge current shall be
within 50mA.
Test period : 1000+48/0 h
Before the measurement after test, the
specimen shall be left to stand at room
temperature for the following period :
48±4 h
When uncertainty occurs in the weather resistance characteristic tests (temperature cycle, moisture resistance,
moisture resistant loading, high temperature resistant loading), the same tests shall be performed for the capacitor
itself.
Note ;
CLASSIFICATION
SUBJECT
No. 151S-ECJ-KGD38E
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Common Specifications (Class2 Large Capacitance)
PAGE
7 of 7
DATE 23th. Apr. 2003
Table 3
OUR STANDARD MEASURING INSTRUMENT
MEASURING INSTRUMENT
・C≦10µF
4278A 1kHz/1MHz CAPACITANCE METER (Hewlett-Packard Co.)
・C>10µF
4284A PRECISION LCR METER (Hewlett-Packard Co.)
MEASURING MODE
PARALLEL MODE
RECOMMENDED MEASURING JIG (Note) HP 16034E TEST FIXTURE (Hewlett-Packard Co.)
Note : A sample capacitor shall be fitted with a measuring jig terminal center shaft.
Fig. 2
Testing jig
Table 4
SHAPE
[EIA]
Type 13
[1206]
Type 12
[0805]
A
B
C
2.2
5.0
2.0
1.2
4.0
1.65
Unit : mm
Material : Glass epoxy board
Thickness : 1.6mm
:Copper foil (0.035mm thick)
: Solder resist
Fig. 3
Testing jig
Table 5
SHAPE
[EIA]
A
B
C
BOARD
THICKNESS
Type 13
[1206]
2.2
5.0
2.0
1.6
Type 12
[0805]
1.2
4.0
1.65
1.6
Unit : mm
Material : Glass epoxy board
:Copper foil (0.035mm thick)
:Solder resist
Note ;
SUBJECT
No. 151S-ECJ-SS001E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
PAGE
DATE
1 of 12
1st. Apr. 2002
1.Cautions on Operation
If a chip stacked ceramic capacitor ( hereafter referred to as capacitor ) is troubled by its peripheral conditions
Such as use environment, design requirements, and installation requirements, it will be short-circuited at worst.
If it is used in the shorted state, a large current will flow through it when a voltage is applied which will heat
the capacitor body, and possibly burn the circuit board out .
Design and assembly cautions are described below. Confirm them sufficiently before use.
1.1 Design Cautions
1.1.1 Design of Circuit
1.1.1.1 Working temperature
The working temperature must be within the range specified in the delivery specification.
The working temperatures must not exceed the maximum working temperature
1.1.1.2 Working voltage
The voltage across the terminals of the capacitor must be equal to or less than the rated voltage.
Do not use the capacitor in a circuit where an abnormal voltage exceeding the rated voltage
(surge voltage, pulse voltage, electrostatic voltage) may be applied to the capacitor. The capacitor
may be shorted. If a DC voltage is superimposed with an AC voltage, take care that the peak
voltage (Vp - p) is equal to or less than the rated voltage.
Even if the voltage is equal to or less than the rated voltage, when the capacitor is used in a circuit
where a high frequency voltage or a steep pulse voltage is applied continuously to it, closely examine
the reliability of the capacitor.
If such a voltage is applied continuously to the capacitor, the service life of it will be affected.
1.1.1.3 Working current
If the capacitor causes a short-circuit at the secondary side of the power supply circuit, a large
current will flow through it to heat the capacitor body, and the circuit board may be burnt out.
Sufficiently examine the safety of use, and install a protective circuit if required.
1.1.1.4 Self-heating
When self-heating is caused by an AC voltage or a pulse voltage circuit, if the ambient temperature
around the capacitor in use is room temperature (about 25℃), take care so that a temperature rise
(a difference between the surface temperature of the capacitor and the ambient temperature around
it) comes within 20℃ or below.
The surface temperature of the capacitor including an amount increased by the self-heating must be
equal to or less than the maximum working temperature specified in the delivery specification.
For the temperature rise of the capacitor according to the use circuit conditions, check the actual
operating conditions of the equipment in use.
1.1.1.5 Limitation of use places
Do not use the capacitor in the places indicated below. It may cause a short-circuit.
(1) Peripheral environmental (weatherproofness) conditions
(a) Places where water or salt water is applied directly
(b) Places where dewatering state occurs
(c) Places where corrosive gases (hydrogen sulfide, sulfurous acid, chlorine, and ammonia) are
filled out
(2) Places for which the requirements of vibration or impact are so severe as to exceed the range
specified in the delivery specification.
Note ;
Ceramic Business Unit LCR Device Company
Matsushita Electronic Components Co.,Ltd.
Kadoma, Osaka, Japan
APPROVAL
CHECK
DESIGN
H.Itow
Y.Tsutsumi
K.Ohishi
CLASSIFICATION
SUBJECT
No. 151S-ECJ-SS001E
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
PAGE
DATE
2 of 12
1st. Apr. 2002
1.1.1.6 Piezoelectricity
A dielectric used for the capacitor (type 2) causes a piezoelectricity (or an electrostriction).
As a result, the following events may occur.
(1) If a signal with a specified frequency is applied to the capacitor, the natural frequency of the
capacitor determined by the size of the capacitor may cause resonance and generate noise.
To prevent this problem, it is effective to change the size of the capacitor to change its
resonance frequency.
An alternative method is to change the material of the capacitor to a low loss material without
causing (or with small) piezoelectricity or to use a type 1 capacitor.
(2) If vibration or impact is applied to the capacitor, a mechanical force is converted to electric
signals, which may produce noise. (Particularly, care must be taken when the capacitor is used
near an amplifier.)
To prevent this problem, the alternative method of changing the material of the capacitor to a low
loss material without causing (or with small) piezoelectricity or the use of a type 1 capacitor may
be used.
(3) Even if a beating sound occurs, it does not cause any problem with the performance and reliability
of products. However, the equipment manufacturer is worried about the sound. Since it may
lead to the occurrence of noise, check the equipment for operation. To solve the problem, it is
effective to change to a capacitor with a different shape, size, and characteristics of the
capacitors indicated in items (1) and (2) above. It may also be effective to change the direction
of installation of the capacitor to suppress the resonance with the cabinet of a printed circuit
board or fix the capacitor with the cabinet of the printed circuit board with adhesive agent.
1.1.2 Design of Circuit Board
1.1.2.1 Selection of circuit board
When a capacitor is used on an alumina board, it is expected to deteriorate in performance due to
thermal impact (temperature cycle).
Before using the capacitor on a board, sufficiently examine the actual board to check that the
quality of the capacitor is not affected..
1.1.2.2 Setting of land dimensions
(1) As the amount of solder increases, stress applied to the capacitor increases, which may lead to
cracking. To prevent this problem, when designing the land of a circuit board, set the shape and
size thereof so that the amount of solder is of appropriate volume.
(2) When two or more parts are installed on a common land, separate them from each other so that
the land can be used exclusively for both parts at the solder resist.
The recommended land pattern dimensions not causing an excessive amount of solder, cases
that should be avoided, and recommended cases are shown below.
Recommended land dimensions(Ex.)
For General Electronic Equipment , High Value Capacitance
Low Thickness Type , 100V・200V series
SMD
Land
c
b
Note ;
a
Solder resist
SUBJECT
No. 151S-ECJ-SS001E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
PAGE
DATE
Unit: : mm
Size Code
“06” (0201)
“10” (0402)
“11” (0603)
“12” (0805)
“13” (1206)
“23” (1210)
“34” (1812)
Component Dimension
L
W
T
0.6
0.3
0.3
1.0
0.5
0.5
1.6
0.8
0.8
2.0
1.25
0.6~1.25
3.2
1.6
0.6~1.6
3.2
2.5
1.4~2.5
3.2
2.5
2.5~3.2
a
b
c
0.2~0.3
0.4~0.5
0.8~1.0
0.8~1.2
1.8~2.2
1.8~2.2
3.0~3.5
0.25~0.3
0.4~0.5
0.6~0.8
0.8~1.0
1.0~1.2
1.0~1.2
1.2~1.6
0.2~0.3
0.5~0.6
0.6~0.8
0.8~1.0
1.0~1.3
1.8~2.3
2.3~3.0
Wide-Width Type
SMD
Solder resist
c
Land
b
a
Unit: : mm
Size Code
“21” (0508)
“31” (0612)
Component Dimension
L
W
T
1.25
2.0
0.85
1.6
3.2
0.85
a
b
c
0.5~0.7
0.8~1.0
0.5~0.6
0.6~0.7
1.4~1.9
2.5~3.0
Array Type
P/2
c
P
a
b
SMD
Land
Unit: : mm
Size Code
Note ;
Component Dimension
L
W
T
“12” (0805)
2.0
1.25
0.85
“13” (1206)
3.2
1.6
0.85
a
0.55~
0.75
0.9~
1.1
b
0.5~
0.6
0.7~
0.9
c
P
0.2~
0.4~
0.3
0.6
0.35~
0.7~
0.45
0.9
3 of 12
1st. Apr. 2002
No. 151S-ECJ-SS001E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
SUBJECT
PAGE
4 of 12
DATE
1st. Apr. 2002
Cases that should be avoided and recommended cases
Cases that should be avoided
Item
Case of improvement by pattern division
The lead line
of part with lead
Solder resist
mixed mounting together
with parts with lead
Sectional plan
Sectional plan
Chassis
Solder (groung solder)
arrangement near
chassis
Electrode pattern
Solder resist
Soldering iron
lead of retrofitted parts
retrofitting of parts
with lead
Sectional plan
Sectional plan
Solder resist
Sectional plan
Sectional plan
Solder resist
portion excessively
soldered
Land
lateral arrangement
(3) Design the land so that its lengths to the right and left are identical to each other.
If the amount of solder on the land on the right side is different from that on the left side, stress will
act on one side of a part, and a crack may occur since an area with a larger amount of solder will set
later at the time of cooling.
Recommended amount of solder
(a) Too large amount of
solder
(b) Proper amount
of solder
←solder
(c) Too small amount
of solder
←solder
←solder
↑
↑
↑
PC board
PC board
PC board
1.1.2.3 Arrangement of part
If a circuit board is bent in the process or during handling after the capacitor is welded to it, the
capacitor may cause a crack. To prevent this problem, arrange the part so that stress caused by
the deflection of the circuit board can be minimized.
(1) The recommended example of arrangement of the capacitor in which mechanical stress caused by
warpage or deflection of a circuit board can be minimized.
Cases that should be avoided
Warpage of
circuit board
Note ;
Recommended cases
Dispose the part sideways
relative to the stress acting
direction
CLASSIFICATION
SUBJECT
No. 151S-ECJ-SS001E
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
PAGE
DATE
5 of 12
1st. Apr. 2002
(2) Refer to the following drawings since mechanical stress near the split board varies depending on
the installation position of the capacitor.
E
D
Perforation
C
A
B
Slit
Magnitude of stress A>B=C>D>E
(3) The magnitude of the mechanical stress applied to the capacitor when the circuit board is
divided is in the order of those in push back < slit < V-groove < perforation. Consider also the
arrangement of the capacitor and the dividing method into account.
1.1.2.4 Installation density and part intervals
If the parts are arranged too densely, the parts will be affected by bridges and solder balls.
Carefully determine the part intervals.
1.2 Cautions on Assembly
1.2.1 Storage
(1) Avoid storing parts in hot and humid places. Store them in an environment of 5 to 40℃ in
temperature and 20 to 70% RH in humidity.
(2) If parts are stored in a place where moisture, dust, and/or harmful gas (hydrogen sulfide, sulfurous
acid, chlorine, and ammonia) is present, the solderability of external electrodes will deteriorate.
Also, if they are stored in a place subjected to heating or exposed to direct sunshine, the tape of
taped packages may deform or a part may adhere to the tape, which may cause trouble at the time of
installation.
(3) The storage period before use must be within six months. If the products are stored for six months
or longer, check them for solderability before use.
(4) The products (characteristic symbols: B, F) of high dielectric constant system (type 2) cause a
secular change in capacitance depending on the specific characteristics of ceramic dielectric
materials. This secular change returns to the capacitance at the time of shipping from the plant at
the soldering temperature in the soldering process.
change rate of
capacitance (%)
Secular change of capacitance (Ex.)
Class1(Char. C,SL)
5
0
-5
-10
Char. B
Char. F
Time(h)
(5) When measuring the initial capacitance, perform the heat treatment at a temperature of 150+0/-10℃
for one hour, leave it in a normal temperature and humidity environment for 48 ± 4 hours, and
measure the initial value.
Note ;
SUBJECT
No. 151S-ECJ-SS001E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
PAGE
DATE
6 of 12
1st. Apr. 2002
1.2.2 Amount and curing of adhesive agent
(1) To determine the amount of application of adhesive agent, carefully examine the amount and viscosity
so that the adhesive agent does not expand to the land due to a flow at the time of heating
(2) If the amount is too small, the capacitor may fall during flow-soldering.
(3) If the viscosity is too low, the installation position of the capacitor may be displaced.
(4) Heat hardening is made by ultraviolet and far infrared radiation. To prevent the terminal electrode
from being oxidized, perform the heat hardening at a temperature of 160℃ for within two minutes
(5) If the hardening is not sufficient, the capacitor may fall during flow soldering. Also, insulation
resistance between the terminal electrodes may deteriorate due to moisture absorption.
To prevent these problems, sufficiently examine the hardening conditions.
1.2.3 Installation on circuit board
(1) When installing a capacitor on a circuit board, take care so that the pressure and displacement of
absorbing nozzles at the time of installation do not occur on the capacitor body and that an excessive
impact load such as a mechanical impact and stress, at the time of positioning, is not applied to the
capacitor body.
(2) The maintenance and inspections of the mounting machine must be performed regularly.
(3) If the bottom dead center of the adsorbing nozzles is too low, an excessive force will be applied to the
capacitor at the time of installation causing cracking. Use the following cautions for your reference.
1) Set and adjust the bottom dead center of the adsorbing nozzles to the upper surface of the circuit
board after correcting the warpage of the circuit board.
2) Set the nozzle pressure at the time of installation to 1 to 3 N or below in static load.
3) For double surface installation, to minimize the impact of the adsorbing nozzles, apply a support pin
on the rear surface of the circuit board to suppress the deflection of the circuit board. A typical
example is shown in the following.
4) Adjust the adsorbing nozzles so that their bottom dead center at the time of installation is not
lowered excessively.
(4) If the positioning claw becomes worn, at the time of positioning, the mechanical impact applied to the
capacitor will be applied locally, which may cause chipping or cracking on the capacitor. To prevent
these problems, control the closed dimension of the positioning claw, and perform the maintenance,
inspections, and the replacement of the positioning claw at regular intervals.
recommended cases
Cases that should be avoided
One surface
installation
Crack
Support pin
Double surface
installation
Separation
of solder
Note ;
Crack
Support pin
The support pin must not be
necessarily positioned just
beneath the capacitor.
SUBJECT
No. 151S-ECJ-SS001E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
PAGE
7 of 12
DATE
1st. Apr. 2002
1.2.4 Selection of Flux
Flux may seriously affect the performance of the capacitor. Therefore, check the following before use.
(1) Use flux having a halogen based content of 0.1 wt. % (converted to chlorine) or below.
Do not use flux with strong acid.
(2) The coated amount of flux when the capacitor is soldered to the circuit board must be confirmed.
(3) When using soluble flux, wash clean the capacitor sufficiently.
1.2.5 Soldering
1.2.5.1 Flow Soldering
By flow-soldering, stress due to an abrupt temperature change is applied directly to the part body.
Therefore, take sufficient care to control the solder temperature.
Capacitors particularly dislike abrupt heating and cooling. If the capacitor is abruptly heated or
cooled, a strain will be produced inside the capacitor due to a large temperature difference, which
may cause thermal cracking. To prevent this problem, take sufficient care of the temperature
difference.
(1) Coating of flux: Apply a thin coat of flux uniformly. For flow-soldering, the coating of flux using
the foaming method is generally used.
(2) Preheating: Sufficiently preheat the capacitor so that a difference between the solder
temperature and the surface temperature of the capacitor is 150℃ or below (100 to 130℃).
(3) Immersion into solder: Immerse the capacitor in a molten solder bath of 240 to 260℃ for 3 to 5
seconds.
(4) After soldering, gradually cool the capacitor. Avoid cooling it abruptly (forcibly). Failure to do
so may cause thermal cracking.
(5) Cleaning: If the capacitor is immersed into the cleaning solvent immediately after soldering,
confirm that the surface temperature of the capacitor is 100℃ or below beforehand.
(6) The one time of flow-soldering in the conditions shown in the figure below [recommended
profile of flow-soldering (example)] do not cause any problems.
However, take sufficient care with regards to warpage and possible deflection of the circuit
board.
Recommended profile of Flow Soldering [Ex.]
Soldering
240
~260℃
Temp.
Gradual cooling
(Leave undisturbed
at room temperature)
△T
(℃)
Time
60~120s
3~5s
〈Allowable temperature difference △T〉
Size
Temp. Tol.
0603 to 1206
△T≦150℃
0508 , 0612
Note ;
CLASSIFICATION
SUBJECT
No. 151S-ECJ-SS001E
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
PAGE
8 of 12
DATE
1st. Apr. 2002
1.2.5.2 Reflow Soldering
The temperature conditions for reflow soldering are formed of the temperature curves of the preheat
section, temperature rise section, heating section, and gradual cooling section.
If heat is abruptly applied to a capacitor, a strain will be produced inside a capacitor due to the large
temperature difference, which may cause thermal cracking. To prevent this problem, take sufficient
care with the temperature difference.
The preheat section is a critical area for prevention of tombstone (chip standing) and, therefore,
control the temperature with sufficient care.
(1) Preheat: Increase the surface temperature of the circuit board to 140 to 160℃.
(2) Temperature increasing stage : 150 to 220℃ at a rate of 2 to 5℃/sec.
(3) Heating section: 220℃ or above within 20 sec.
(4) Gradual cooling section: Leave undisturbed at room temperature
Avoid cooling the gradual cooling section abruptly (forcibly). Failure to do so may cause
thermal cracking.
230 to 100℃ at a rate of 1 to 4℃/sec.
(5) Cleaning: If the capacitor is immersed into cleaning solvent immediately after soldering, confirm
that the surface temperature of the capacitor is 100℃ or below beforehand.
(6) The two times of flow-soldering in the conditions shown in the figure below [Recommended
profile of reflow-soldering (example)] do not cause any problem.
However, take sufficient care with regards to warpage and the possible deflection of the circuit
board.
240
~260℃
220℃
③Soldering
△T
Temp.
(℃)
④Cooling
②
①Preheating1
Temp.
increasing
stage
Time
60s min.
20s max.
120s max.
(Allowable temperature difference △T〉
Size
Temp. Tol.
0201 to 1206
△T≦150℃
0508 , 0612
1210 to 2220
△T≦130℃
1.2.5.3 Soldering with soldering iron
In soldering with a soldering iron, stress due to an abrupt temperature change is applied directly to the
capacitor body. Accordingly, carefully control the temperature of the soldering iron tip.
Take care that the soldering iron tip does not come directly into contact with the capacitor body and
the terminal electrode.
Note ;
SUBJECT
No. 151S-ECJ-SS001E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
PAGE
9 of 12
DATE
1st. Apr. 2002
Capacitors particularly dislike abrupt heating and cooling. If the capacitor is abruptly heated or cooled, a
strain will be produced inside the capacitor due to the large temperature difference, which may cause
thermal cracking.
To prevent this problem, take sufficient care of the temperature difference.
Solder with the soldering iron taking care so as not to heat or cool abruptly before and after the soldering.
The product once removed with the soldering iron cannot be re-used.
(1) Condition 1 (with preheating)
1) Solder: Use a wire solder requiring a smaller amount of flux chlorine for precision electronic
equipment (wire diameter: 1.0 mm dia. or less).
2) Preheating: Preheat sufficiently so that the difference between the solder temperature and the
surface temperature of the capacitor is 150℃ or below.
3) Iron tip temperature: 300℃ or below
(Fuse the required amount of solder at the tip of the soldering iron beforehand.)
4) Gradual cooling: After soldering, leave the capacitor undisturbed at room temperature to allow it
to cool gradually.
Recommended profile for soldering with a soldering iron[Ex.]
Soldering
Gradual
cooling
△T
Preheating
60 to 120 s
3 s max.
〈Allowable temperature difference △T〉
Size
Temp. Tol.
0201 to 1206
△T≦150℃
0508 , 0612
1210 to 2220
△T≦130℃
(2) Condition 2 (without preheating)
Without preheating, the soldering iron can be corrected within the range specified below.
1) The soldering iron tip must not directly touch the ceramic dielectric of the capacitor.
2) After preheating the land section sufficiently with the soldering iron tip, slide the soldering iron
tip to the terminal electrode of the capacitor for soldering.
Conditions of soldering iron tip without preheating
Condition
Chip size
0201 to 0805 , 0508
1206 to 2220 , 0612
Temperature of soldering iron
270℃ Max.
250℃ Max.
Wattage
20W Max.
Shape of soldering iron tip
φ3mm Max.
Soldering time with soldering iron
3s Max.
Note ;
SUBJECT
No. 151S-ECJ-SS001E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
PAGE
10 of 12
DATE
1st. Apr. 2002
1.2.6 Cleaning
(1) If the cleaning solvent is not appropriate, residue and other foreign matter of the flux may adhere to
the surface of the capacitor and deteriorate the performance (particularly, insulation resistance) of
the capacitor.
(2) If the cleaning conditions are not appropriate (insufficient cleaning, excessive cleaning), the
performance of the capacitor may be impaired.
1) If cleaning is insufficient:
① The metal of the terminal electrode may be corroded by the halogen substance contained in
the residue of the flux.
② The halogen substance contained in the residue of the flux may adhere to the surface of the
capacitor and lower the insulation resistance.
③ The tendencies of items 1) and 2) above may be remarkable for soluble flux more than those
for rosin flux.
2) If cleaning is excessive:
① For ultrasonic cleaning, if output is too large, the circuit board may cause resonance to develop
cracking in the body of the capacitor or solder, which will lower the strength of the terminal
electrode.
To prevent these problems, perform cleaning as follows.
Ultrasonic wave output: 20 W/L or below
Ultrasonic wave frequency: 40 kHz or below
Ultrasonic wave cleaning time: 5 min. or shorter
3) If the cleaning solvent is contaminated, the density of liberated halogen may be increased to
induce the same results as those obtained when the cleaning is insufficient.
1.2.7 Inspections
When inspecting a capacitor on the circuit board after installation, check whether the circuit board is fixed
by a support pin or a dedicated jig.
(1) Take care so that the circuit board is not deflected by the pressure of the check pin.
(2) Take care so that the circuit board is not vibrated by the impact at the time of contact.
When the operational check of the circuit board is performed, the pressing force of the check pin may be
increased to prevent poor contact of the check pin of the board checker.
By the force, the circuit board may be deflected, and the capacitor may be broken or the solder at the
terminal electrode may be separated by the stress due to the deflection. Accordingly, referring to the
following figure, take an appropriate measure against possible deflection of the circuit board.
Cases that should be avoided
Separated
Deflect of
circuit board
Check pin
Recommended cases
Support pin
Check pin
1.2.8 Protective Coat
(1) When resin is coated on the installation surface for moistureproofing and dustproofing after the
capacitor is installed on the circuit board, check the actual equipment that the quality of the capacitor
is not affected by the protective coat.
Note ;
No. 151S-ECJ-SS001E
SPECIFICATIONS
CLASSIFICATION
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
SUBJECT
PAGE
11 of 12
DATE
1st. Apr. 2002
(2) Select those materials which do not generate cracked gas nor reaction gas that may affect the
members forming the capacitor.
(3) If large stress is applied to the capacitor due to thermal expansion or thermal contraction at the time
of curing the resin, cracking may occur in the capacitor.
1.2.9 Division of multiple printed circuit board
(1) During the circuit board dividing operation after the installation of the parts including the capacitor,
take care not to provide deflective or torsional stress to the circuit board.
If stress such as deflection or torsion, shown in the following figure, is applied to the circuit board
when the circuit board is divided, cracking may occur in the capacitor. To prevent this problem,
take care not to apply any stress to it.
Deflective
Torsion
(2) When dividing a circuit board, avoid dividing manually, but use a dedicated jig to prevent mechanical
stress from being applied to the circuit board.
(3) Example of circuit board dividing jig
The outline of the circuit board dividing jig is shown below.
It is recommended that you hold the
circuit board at the portion near the jig so that the board is not deflected and divide the stress caused
so that only compressive stress is applied to the part such as the capacitor.
Avoid holding the circuit board at any position apart from the jig, as the board will be easily deflected,
and divide it so that tensile stress is not applied to the capacitor, which may cause cracking in the
capacitor
Recommended cases
Outline of jig
Circuit board
Load direction
V-groove
Circuit board
V-groove
Parts
Cases that should be avoided
Load direction
Load position
Circuit board
Load position
Parts
V-groove
Circuit board
dividing jig
1.2.10 Mechanical Impact
(1) Take care not to apply any excessive mechanical impact to the capacitor.
Since the capacitor body is made of ceramics, it may become damaged or cracked by a drop impact.
The quality of the dropped capacitor may already be lost, and its failure level of significance may be
increased. Never use it.
Particularly, capacitors of a large size tend to be damaged or cracked more easily.
Crack
Floor
Note ;
CLASSIFICATION
SUBJECT
No. 151S-ECJ-SS001E
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Common Specifications (Precautions for Use)
PAGE
12 of 12
DATE
1st. Apr. 2002
(2) When handling a circuit board with a capacitor, take care that another circuit board does not
collide with the capacitor.
When circuit boards after installation are stored in a stacked state or handled, the corners of
them may collide with a capacitor causing damage or cracking in the capacitor by the impact,
which may lead to a deterioration of the withstand voltage and a reduction in insulation
resistance.
Crack
1.3 Remarks
The above cautions are typical ones.
For special installation conditions, contact us.
.
Cautions of Operations above are from
The Technical Report EIAJ RCR-2333 Caution Guide Line
for Operation of Fixed Multilayer Ceramic Capacitors for
Electronic Equipment by Electronic Industries Association
of Japan. (March 1995 issued)
The Technical Report EIAJ RCR-2335 Caution Guide
Line for Operation of Fixed Multilayer Ceramic Capacitors for Electronic Equipment by Japan Electronics &
Information Technology Industries Association
(New enactment in 2002)
Please refer to above technical report for details.
Note ;
Circuit boards
after installation
CLASSIFICATION
No. 151S-ECJ-SV020E
PAGE
1 of 6
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Taped and Reeled Packaging Specifications
SUBJECT
DATE
1st. Apr. 2002
1.Scope
This specification applies to taped and reeled packing for MATSUSHITA’s multilayer ceramic chip capacitors.
2.Applicable Standards
EIAJ (Electric Industries Association of Japan) Standard EIAJ RC-1009B
JIS (Japanese Industrial Standard) Standard JIS C 0806
3.Packing Specification
3.1 Structure and Dimensions
Paper taping packaging is carried out according the following diagram
(1)Carrier tape : Shown in Fig. 5.
(2)Reel
: Shown in Fig. 6.
(3)Packaging : We shall pack suitably in order prevent damage during transportation or storage.
3.2 Packing Quantity
Carrier-Tape
Type
Thickness of
Capacitor(mm)
Material
Quantity (pcs./reel)
φ180mm Reel φ330mm Reel
Taping Pitch Packaging
Packaging
Quantity
Code
Code
Quantity
“06”(0201)
0.30 ± 0.03
Paper Taping
2mm
E
15000
――
――
“10”(0402)
0.50 ± 0.05
Paper Taping
2mm
E
10000
W
50000
“11”(0603)
0.8
± 0.1
Paper Taping
4mm
V
4000
Z
10000
0.6
± 0.1
Paper Taping
4mm
V
5000
Z
20000
0.85
1.25
1.25
1.25
0.6
±
±
±
±
±
4mm
V
4000
Z
10000
4mm
F
3000
――
――
“12”(0805)
“13”(1206)
“23”(1210)
“34”(1812)
0.10 Paper Taping
0.10
0.15 Embossed Tap.
0.20
0.1
Paper Taping
4mm
V
5000
Z
20000
0.85 ± 0.10
Paper Taping
4mm
V
4000
Z
10000
1.15 ± 0.10
Embossed Tap.
4mm
F
3000
――
――
1.15 ± 0.10
Embossed Tap.
4mm
Y
2000
――
――
1.6
± 0.2
Embossed Tap.
4mm
Y
2000
――
――
2.0
± 0.2
Embossed Tap.
4mm
Y
2000
――
――
2.5 ± 0.3
Embossed Tap.
4mm
Y
1000
――
――
2.5 ± 0.3
Embossed Tap.
8mm
Y
500
――
――
3.2 ± 0.3
Embossed Tap.
8mm
Y
500
――
――
※ Explanation of Part Numbers (Example)
ECJ
1
V
B
Packaging Code
1C
104
K
Note :
Ceramic Business Unit LCR Device Company
Matsushita Electronic Components Co.,Ltd.
Kadoma, Osaka, Japan
APPROVAL
CHECK
DESIGN
H.Itow
A.Omi
T.Shinriki
CLASSIFICATION
SUBJECT
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Taped and Reeled Packaging Specifications
No. 151S-ECJ-SV020E
PAGE
DATE
2 of 6
1st. Apr. 2002
3.3 Marking on the Reel
The following items are described in the side of a reel in English at least.
(1)Part Number
(2)Quantity
(3)Lot Number
(4)Country or origin
3.4 Structure of Taping
(1)The direction of winding of taping on the reel shall be in accordance with the following diagram.
Fig. 1 Paper Taping
Fig. 2 Embossed Taping
Note :
CLASSIFICATION
SUBJECT
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Taped and Reeled Packaging Specifications
No. 151S-ECJ-SV020E
3 of 6
PAGE
DATE
1st. Apr. 2002
(2)The specification of the leader and empty portion shall be in accordance with the following diagram.
Fig. 3 Leader Part and Taped End
4.Efficiency
4.1 Breakage strength of the tape : 10N or more.
4.2 Peel strength of the cover tape (refer to the following figure).
(1)Peel angle : 165 to 180 degree from the tape adhesive face.
(2)Peel velocity : 300mm per min.
(3)Peel strength : 0.1 to 0.7N
Fig. 4 Peel strength of the cover tape
(a)Paper Taping
(b)Embossed Taping
Note :
CLASSIFICATION
No. 151S-ECJ-SV020E
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Taped and Reeled Packaging Specifications
SUBJECT
PAGE
DATE
4 of 6
1st. Apr. 2002
4.3 Barrs on tape
There shall be no barrs preventing suction when products are taken out.
4.4 Missing of products
The missing of products shall be 0.1% or less per reel and there shall be no continuous missing of
products.
4.5 Adherence to the tape
Products shall not be stuck to the cover tape or bottom tape.
Fig. 5 Carrier Tape Dimension
(a)”06” and “10”type : 2mm taping pitch for Paper taping
記号
寸 法
W
8.0 ± 0.2
F
3.50 ± 0.05
E
1.75 ± 0.10
P1
2.00 ± 0.05
P2
2.00 ± 0.05
P0
4.00 ± 0.05
D0
φ1.5
+0.1/-0
“06”
0.5
Type
max.
“10”
0.7
Type
max.
“06”
0.8
Type
max.
“10”
1.0
Type
max.
Unit : mm
t1
Type
“06”
“10”
A
0.37 ± 0.03
0.65 ± 0.05
B
0.67 ± 0.05
1.15 ± 0.05
Code
t2
(b)“11” and “12” and “13” type : 4mm taping pitch for Paper taping.
Code
Dimension
W
8.0 ± 0.2
F
3.50 ± 0.05
E
1.75 ± 0.10
P1
4.0 ± 0.1
P2
2.00 ± 0.05
P0
4.0 ± 0.1
D0
φ1.5
+0.1/-0
t1
1.1 max.
t2
1.4 max.
Unit : mm
Type
“11”(0603)
“12”(0805)
“13”(1206)
A
1.1 ± 0.1
1.65 ± 0.20
2.0 ± 0.2
B
1.9 ± 0.1
2.4 ± 0.2
3.6 ± 0.2
Code
Note :
CLASSIFICATION
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Taped and Reeled Packaging Specifications
SUBJECT
No. 151S-ECJ-SV020E
5 of 6
PAGE
DATE
1st. Apr. 2002
Code
Dimension
W
8.0 ± 0.2
F
3.50 ± 0.05
E
1.75 ± 0.10
P1
4.0 ± 0.1
P2
2.00 ± 0.05
(c)“12” and “13” and “23” type : 4mm chip taping pitch for Embossed taping.
P0
4.0 ± 0.1
D0
φ1.5
+0.1/-0
D1
φ1.1± 0.1
t1
0.6 max.
“12””13”
t2
type
“23”type
2.5
max.
3.5
max.
Unit : mm
Type
“12” (0805)
“13” (1206)
“23” (1210)
A
1.55 ± 0.20
1.95 ± 0.20
2.9 ± 0.2
B
2.35 ± 0.20
3.6 ± 0.2
3.6 ± 0.2
Code
(d)“34”type : 8mm chip taping pitch for Embossed taping.
Type
Code
Note :
“34” (1812)
A
3.6 ± 0.3
B
4.9 ± 0.3
Code
Dimension
W
12.0 ± 0.3
F
5.50 ± 0.05
E
1.75 ± 0.10
P1
8.0 ± 0.1
P2
2.00 ± 0.05
P0
4.0 ± 0.1
D0
φ1.5
+0.1/-0
t1
0.6 max.
4.0max.
t2
Unit:mm
CLASSIFICATION
SUBJECT
SPECIFICATIONS
Multilayer Ceramic Chip Capacitor
Taped and Reeled Packaging Specifications
No. 151S-ECJ-SV020E
6 of 6
PAGE
DATE
1st. Apr. 2002
Code
Dimension
A
φ180+0/-3.0
B
φ60 ± 0.5
C
13.0 ± 0.5
D
21.0 ± 0.8
E
2.0 ± 0.5
W
9.0 ± 0.3
W1
11.4 ± 0.1
Fig. 6 Reel Dimension
(a)φ180mm Reel (Standard Reel)
Unit : mm
(b)φ330mm Reel (Large size Reel)
Code
Dimension
A
φ330 ± 5.0
B
φ50 min.
C
13.0 ± 0.5
D
20 min.
E
2.0 ± 0.5
W
9.5 ± 1.0
W1
2.0 ± 0.5
Unit : mm
Note :
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