Fairchild FDMS3610S Powertrench power stage Datasheet

FDMS3610S
PowerTrench® Power Stage
25V Asymmetric Dual N-Channel MOSFET
General Description
Features
Q1: N-Channel
This device includes two specialized N-Channel MOSFETs in a
„ Max rDS(on) = 5.0 mΩ at VGS = 10 V, ID = 17.5 A
dual PQFN package. The switch node has been internally
„ Max rDS(on) = 5.7 mΩ at VGS = 4.5 V, ID = 16 A
connected to enable easy placement and routing of synchronous
Q2: N-Channel
buck converters. The control MOSFET (Q1) and synchronous
„ Max rDS(on) = 1.8 mΩ at VGS = 10 V, ID = 30 A
SyncFET (Q2) have been designed to provide optimal power
efficiency.
„ Max rDS(on) = 2.2 mΩ at VGS = 4.5 V, ID = 27 A
Applications
„ Low inductance packaging shortens rise/fall times, resulting in
lower switching losses
„ Computing
„ MOSFET integration enables optimum layout for lower circuit
inductance and reduced switch node ringing
„ Communications
„ General Purpose Point of Load
„ RoHS Compliant
„ Notebook VCORE
Pin 1
G1
D1
D1
D1
D1
Pin 1
PHASE
(S1/D2)
G2
S2
S2
Top
S2
Bottom
Power 56
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current
ID
TJ, TSTG
Units
V
V
(Note 4)
±12
±12
TC = 25 °C
30
60
-Continuous
TA = 25 °C
17.51a
301b
70
120
Single Pulse Avalanche Energy
PD
Q2
25
-Continuous (Package limited)
-Pulsed
EAS
Q1
25
(Note 3)
A
29
86
Power Dissipation for Single Operation
TA = 25 °C
2.21a
2.51b
Power Dissipation for Single Operation
TA = 25 °C
1.01c
1.01d
Operating and Storage Junction Temperature Range
mJ
-55 to +150
W
°C
Thermal Characteristics
RθJA
571a
Thermal Resistance, Junction to Ambient
RθJA
Thermal Resistance, Junction to Ambient
RθJC
Thermal Resistance, Junction to Case
1c
125
3.0
501b
1201d
°C/W
2.2
Package Marking and Ordering Information
Device Marking
08OD
07OD
Device
Package
Reel Size
Tape Width
Quantity
FDMS3610S
Power 56
13 ”
12 mm
3000 units
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
1
www.fairchildsemi.com
FDMS3610S PowerTrench® Power Stage
December 2011
Symbol
Parameter
Test Conditions
Type
Min
25
25
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ID = 1 mA, VGS = 0 V
Q1
Q2
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
ID = 10 mA, referenced to 25 °C
Q1
Q2
IDSS
Zero Gate Voltage Drain Current
VDS = 20 V, VGS = 0 V
Q1
Q2
1
500
μA
μA
IGSS
Gate to Source Leakage Current
VGS = 12 V/-8 V, VDS= 0 V
Q1
Q2
±100
±100
nA
nA
2.0
2.2
V
V
12
24
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
VGS = VDS, ID = 1 mA
Q1
Q2
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
ID = 10 mA, referenced to 25 °C
Q1
Q2
-4
-3
VGS = 10 V, ID = 17.5 A
VGS = 4.5 V, ID = 16 A
VGS = 10 V, ID = 17.5 A,TJ =125 °C
Q1
3.8
4.4
5.4
5.0
5.7
7.0
VGS = 10 V, ID = 30 A
VGS = 4.5 V, ID = 27 A
VGS = 10 V, ID =30 A ,TJ =125 °C
Q2
1.5
1.8
2.1
1.8
2.2
2.7
VDS = 5 V, ID = 17.5 A
VDS = 5 V, ID = 30 A
Q1
Q2
100
240
S
Q1:
VDS = 13 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
1570
4045
pF
Q1
Q2
448
946
pF
Q1
Q2
61
117
pF
Q1
Q2
0.4
0.9
Ω
rDS(on)
gFS
Drain to Source On Resistance
Forward Transconductance
0.8
1.1
1.2
1.4
mV/°C
mΩ
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
Q2:
VDS = 13 V, VGS = 0 V, f = 1 MHZ
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
Qg
Total Gate Charge
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
Q1:
VDD = 13 V, ID = 17.5 A, RGEN = 6 Ω
Q2:
VDD = 13 V, ID = 30A, RGEN = 6 Ω
VGS = 0 V to 10 V Q1
VDD = 13 V,
VGS = 0 V to 4.5 V ID = 17.5 A
Q2
VDD = 13 V,
ID = 30 A
2
Q1
Q2
7
11
ns
Q1
Q2
2
5
ns
Q1
Q2
23
39
ns
Q1
Q2
2
4
ns
Q1
Q2
26
59
nC
Q1
Q2
12
27
nC
Q1
Q2
3.3
8.2
nC
Q1
Q2
2.7
7.6
nC
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FDMS3610S PowerTrench® Power Stage
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Q1
Q2
0.8
0.8
1.2
1.2
V
Q1
Q2
23
28
ns
Q1
Q2
9
28
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 17.5 A
VGS = 0 V, IS = 30 A
(Note 2)
(Note 2)
Q1
IF = 17.5 A, di/dt = 100 A/μs
Q2
IF = 30 A, di/dt = 300 A/μs
Notes:
1.RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
b. 50 °C/W when mounted on
a 1 in2 pad of 2 oz copper
a. 57 °C/W when mounted on
a 1 in2 pad of 2 oz copper
SS
SF
DS
DF
G
SS
SF
DS
DF
G
d. 120 °C/W when mounted on a
minimum pad of 2 oz copper
c. 125 °C/W when mounted on a
minimum pad of 2 oz copper
SS
SF
DS
DF
G
SS
SF
DS
DF
G
2 Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Q1 :EAS of 29 mJ is based on starting TJ = 25 oC; N-ch: L = 1.2 mH, IAS = 7 A, VDD = 23 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 16 A.
Q2: EAS of 86 mJ is based on starting TJ = 25 oC; N-ch: L = 0.6 mH, IAS = 17 A, VDD = 23 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 31 A.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
3
www.fairchildsemi.com
FDMS3610S PowerTrench® Power Stage
Electrical Characteristics TJ = 25 °C unless otherwise noted
70
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
60
ID, DRAIN CURRENT (A)
3.0
VGS = 10 V
VGS = 4.5 V
50
VGS = 3.5 V
40
VGS = 3 V
30
VGS = 2.5 V
20
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0
0.3
0.6
0.9
1.2
1.5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
2.5
VGS = 2.5 V
2.0
VGS = 3 V
1.5
1.0
VGS = 3.5 V VGS = 4.5 V VGS = 10 V
0.5
0
10
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
rDS(on), DRAIN TO
1.2
1.0
0.8
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
1.4
-50
IS, REVERSE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
40
TJ = 150 oC
30
TJ = 25 oC
20
TJ = -55 oC
10
1.5
2.0
2.5
8
TJ = 125 oC
4
TJ = 25 oC
2
3
4
5
6
7
8
9
10
VGS = 0 V
10
TJ = 150 oC
1
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0.0
3.0
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
Figure 5. Transfer Characteristics
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
12
70
VDS = 5 V
1.0
16
Figure 4. On-Resistance vs Gate to
Source Voltage
50
0
0.5
70
VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
60
60
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = 17.5 A
0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. Normalized On Resistance
vs Junction Temperature
70
50
20
ID = 17.5 A
VGS = 10 V
0.6
-75
40
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.8
1.6
30
ID, DRAIN CURRENT (A)
4
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FDMS3610S PowerTrench® Power Stage
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
2000
ID = 17.5 A
1000
Ciss
8
VDD = 10 V
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
VDD = 15 V
6
VDD = 13 V
4
Coss
100
Crss
2
f = 1 MHz
VGS = 0 V
10
0.1
0
0
4
8
12
16
20
24
28
1
Figure 7. Gate Charge Characteristics
80
70
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
30
Figure 8. Capacitance vs Drain
to Source Voltage
50
TJ = 25 oC
10
TJ = 100 oC
TJ = 125 oC
60
0.01
0.1
1
10
VGS = 10 V
50
VGS = 4.5 V
40
30
20
10
1
0.001
Limited by Package
o
RθJC = 3.0 C/W
0
25
50
50
100
125
150
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive
Switching Capability
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
100
P(PK), PEAK TRANSIENT POWER (W)
1000
100 μs
10
1 ms
1
0.1
75
o
tAV, TIME IN AVALANCHE (ms)
ID, DRAIN CURRENT (A)
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
THIS AREA IS
LIMITED BY rDS(on)
10 ms
100 ms
SINGLE PULSE
TJ = MAX RATED
1s
10s
DC
RθJA = 125 oC/W
TA = 25 oC
0.01
0.01
0.1
1
10
100200
VDS, DRAIN to SOURCE VOLTAGE (V)
o
RθJA = 125 C/W
100
10
1
0.5
-4
10
-3
10
-2
10
-1
10
1
100
10
1000
t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe
Operating Area
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
SINGLE PULSE
Figure 12. Single Pulse Maximum
Power Dissipation
5
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FDMS3610S PowerTrench® Power Stage
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
SINGLE PULSE
0.01
t2
o
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
RθJA = 125 C/W
(Note 1b)
0.001 -4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
6
www.fairchildsemi.com
FDMS3610S PowerTrench® Power Stage
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
120
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
100
ID, DRAIN CURRENT (A)
4
VGS = 10 V
VGS = 4.5 V
VGS = 3.5 V
80
VGS = 3 V
60
VGS = 2.5 V
40
20
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0
0.3
0.6
0.9
1.2
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 2.5 V
3
2
1
VGS = 4.5 V VGS = 10 V
0
1.5
0
20
Figure 14. On-Region Characteristics
rDS(on), DRAIN TO
1.2
1.0
0.8
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
7
ID = 30 A
VGS = 10 V
-50
IS, REVERSE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
80
60
TJ = 25 oC
40
TJ = -55
oC
20
0
1.0
1.5
2.0
2.5
5
ID = 30 A
4
3
TJ = 125 oC
2
1
TJ = 25 oC
2
200
100
4
6
8
10
VGS = 0 V
10
TJ = 125 oC
1
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0.0
3.0
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 18. Transfer Characteristics
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
120
Figure 17. On-Resistance vs Gate to
Source Voltage
VDS = 5 V
TJ = 125 oC
100
VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
100
80
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
6
0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 16. Normalized On-Resistance
vs Junction Temperature
120
60
Figure 15. Normalized on-Resistance vs Drain
Current and Gate Voltage
1.6
0.6
-75
40
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
1.4
VGS = 3.5 V
VGS = 3 V
Figure 19. Source to Drain Diode
Forward Voltage vs Source Current
7
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FDMS3610S PowerTrench® Power Stage
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted
10000
VGS, GATE TO SOURCE VOLTAGE (V)
10
ID = 30 A
Ciss
CAPACITANCE (pF)
8
VDD = 10 V
6
VDD = 13 V
4
VDD = 15 V
1000
Coss
100
Crss
2
f = 1 MHz
VGS = 0 V
10
0.1
0
0
10
20
30
40
50
60
1
150
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
100
TJ = 25 oC
TJ = 100 oC
10
TJ = 125 oC
1
0.001
0.01
0.1
1
10
100
120
VGS = 10 V
90
VGS = 4.5 V
60
Limited by Package
30
o
RθJC = 2.2 C/W
0
25
1000
50
P(PK), PEAK TRANSIENT POWER (W)
ID, DRAIN CURRENT (A)
1 ms
10 ms
100 ms
1s
10s
o
RθJA = 120 C/W
DC
TA = 25 oC
0.01
0.01
0.1
1
10
100
VDS, DRAIN to SOURCE VOLTAGE (V)
SINGLE PULSE
1000
o
RθJA = 120 C/W
100
10
1
0.5
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 24. Forward Bias Safe
Operating Area
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
150
3000
10
SINGLE PULSE
TJ = MAX RATED
125
Figure 23. Maximum Continuous Drain
Current vs Case Temperature
100 μs
THIS AREA IS
LIMITED BY rDS(on)
100
o
Figure 22. Unclamped Inductive
Switching Capability
200
100
75
TC, CASE TEMPERATURE ( C)
tAV, TIME IN AVALANCHE (ms)
0.1
30
Figure 21. Capacitance vs Drain
to Source Voltage
Figure 20. Gate Charge Characteristics
1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 25. Single Pulse Maximum Power
Dissipation
8
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FDMS3610S PowerTrench® Power Stage
Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted
NORMALIZED THERMAL
IMPEDANCE, ZθJA
2
1
0.1
0.01
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
SINGLE PULSE
o
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
RθJA = 120 C/W
0.001
(Note 1b)
0.0001 -4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 26. Junction-to-Ambient Transient Thermal Response Curve
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
9
www.fairchildsemi.com
FDMS3610S PowerTrench® Power Stage
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted
SyncFET Schottky body diode
Characteristics
Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power
in the device.
Fairchild’s SyncFET process embeds a Schottky diode in parallel
with PowerTrench MOSFET. This diode exhibits similar
characteristics to a discrete external Schottky diode in parallel
with a MOSFET. Figure 27 shows the reverse recovery
characteristic of the FDMS3610S.
35
IDSS, REVERSE LEAKAGE CURRENT (A)
-2
30
CURRENT (A)
25
20
di/dt = 300 A/μs
15
10
5
0
-5
0
40
80
120 160 200 240 280 320 360
TIME (ns)
TJ = 125 oC
-3
10
TJ = 100 oC
-4
10
TJ = 25 oC
-5
10
-6
10
0
5
10
15
20
25
VDS, REVERSE VOLTAGE (V)
Figure 27. FDMS3610S SyncFET body
diode reverse recovery characteristic
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
10
Figure 28. SyncFET body diode reverse
leakage versus drain-source voltage
10
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FDMS3610S PowerTrench® Power Stage
Typical Characteristics (continued)
FDMS3610S PowerTrench® Power Stage
2X
A
PKG
CL
8
B
5
1.27 TYP
0.65 TYP
0.63
8
PKG
5.10
4.00
C
L
0.00
5.10
4.90
0.10 C
2.00
Dimensional Outline and Pad Layout
6
5
2.52
1.60
6.10
5.90
CL
7
2.15
0.00
4.16
PIN #1
IDENT MAY
A PPEAR AS
OPTIONAL
1
2.13
0.10 C
4
2X
TO P VIEW
0.63
1
1.18
SEE
DETAIL A
CL
1.21
2
3
4
KEEP
2.31 OUT
3.15 AREA
0.59
3.18
RECOM MENDE D LAND PATTERN
SIDE VIEW
3.00
2.80
0.58
0.38
0.35
6X
1
2
0.10
0.05
0.70
0.50
3
C A B
C
1.32
1.12
0.71
0.61
4
NOTES: UNLESS OTHERWIS E SPECIFIED
2.25
2.05
3.90
3.70
0.58
0.38
8
0.44
0.24
7
6
1.10
0.90
1.02
0.82
1.27
3.81
BOTTO M VIEW
0.51
0.31
0.10 C
0.08 C
5
0.30
0.20
DETAIL A
0.05
0.00
C
A) DOES NOT FULLY CONFORM TO
JEDEC REGISTRA TION, M O-240,
ISSUE B DA TED 10/2009.
B) ALL DIMENSIONS ARE IN
M ILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE
B URRS OR MO LD FLASH. MOLD
FLASH OR BURRS DO ES NO T
EX CE ED 0.10MM.
D) DIMENSIONING AND TOLERANCING
PE R ASME Y14.5M-1994.
E) IT IS RECOMM ENDED TO HAVE NO
TRACES OR VIAS WITHIN THE KEEP
OUT AREA.
F) DRAWING FILE NA ME: PQN08E REV 4.
SEA TING
PLANE
(SCALE: 2X)
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
11
www.fairchildsemi.com
tm
tm
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2.
A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
ANTI-COUNTERFEITING POLICY
Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,
www.Fairchildsemi.com, under Sales Support.
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their
parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed
application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the
proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild
Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild
Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of
up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and
warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is
committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I60
©2011 Fairchild Semiconductor Corporation
FDMS3610S Rev.C1
12
www.fairchildsemi.com
FDMS3610S PowerTrench® Power Stage
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
2Cool™
FPS™
The Power Franchise®
®
AccuPower™
F-PFS™
®
PowerTrench®
Auto-SPM™
FRFET®
SM
Global Power Resource
PowerXS™
AX-CAP™*
TinyBoost™
GreenBridge™
Programmable Active Droop™
BitSiC®
TinyBuck™
Build it Now™
Green FPS™
QFET®
TinyCalc™
CorePLUS™
QS™
Green FPS™ e-Series™
TinyLogic®
CorePOWER™
Quiet Series™
Gmax™
TINYOPTO™
CROSSVOLT™
RapidConfigure™
GTO™
TinyPower™
CTL™
IntelliMAX™
™
TinyPWM™
Current Transfer Logic™
ISOPLANAR™
TinyWire™
DEUXPEED®
Marking Small Speakers Sound Louder Saving our world, 1mW/W/kW at a time™
TranSiC®
Dual Cool™
SignalWise™
and Better™
TriFault Detect™
®
EcoSPARK
SmartMax™
MegaBuck™
TRUECURRENT®*
EfficentMax™
SMART START™
MICROCOUPLER™
μSerDes™
ESBC™
Solutions for Your Success™
MicroFET™
®
SPM
MicroPak™
®
STEALTH™
MicroPak2™
UHC®
SuperFET®
MillerDrive™
Fairchild®
Ultra FRFET™
®
SuperSOT™-3
MotionMax™
Fairchild Semiconductor
UniFET™
SuperSOT™-6
Motion-SPM™
FACT Quiet Series™
VCX™
SuperSOT™-8
mWSaver™
FACT®
®
VisualMax™
SupreMOS
OptoHiT™
FAST®
VoltagePlus™
SyncFET™
OPTOLOGIC®
FastvCore™
®
XS™
OPTOPLANAR
Sync-Lock™
FETBench™
®*
FlashWriter® *
Mouser Electronics
Authorized Distributor
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