4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE IDT7M1014 Integrated Device Technology, Inc. FEATURES DESCRIPTION • High-density 4K x 36 BiCMOS Dual-Port Static RAM module • Fast access times — Commercial: 15, 20ns — Military: 25, 30ns • Fully asynchronous read/write operation from either port • Surface mounted LCC packages allow through-hole module to fit on a ceramic PGA footprint • Single 5V (±10%) power supply • Multiple GND pins and decoupling capacitors for maximum noise immunity • Inputs/outputs directly TTL-compatible The IDT7M1014 is a 4K x 36 asynchronous high-speed BiCMOS Dual-Port static RAM module constructed on a cofired ceramic substrate using 4 IDT7014 (4K x 9) asynchronous Dual-Port RAMs. The IDT7M1014 module is designed to be used as stand-alone 36-bit dual-port RAM. This module provides two independent ports with separate control, address, and I/O pins that permit independent and asynchronous access for reads or writes to any location in memory. The IDT7M1014 module is packaged in a 142-lead ceramic PGA (Pin Grid Array). Maximum access times as fast as 15ns and 25ns are available over the commercial and military temperature ranges respectively. All IDT military modules are constructed with semiconductor components manufactured in compliance with the latest revision of MIL-STD-883, Class B making them ideally suited to applications demanding the highest level of performance and reliability. FUNCTIONAL BLOCK DIAGRAM L_A0 – 11 R_A0 – 11 L_I/O0 – 8 R_I/O0 – 8 L_OEL IDT7014 4K x 9 L_R/W0 R_OEL R_R/W0 L_I/O9 – 17 R_I/O9 – 17 IDT7014 4K x 9 L_R/W1 R_R/W1 L_I/O18 – 26 L_OEH R_I/O18 – 26 IDT7014 4K x 9 L_R/W2 R_OEH R_R/W2 L_I/O27 – 35 R_I/O27 – 35 IDT7014 4K x 9 L_R/W3 R_R/W3 2819 drw 01 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES ©1996 Integrated Device Technology, Inc. DECEMBER 1995 DSC-2819/4 7.03 1 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATION 1 2 3 4 5 6 7 8 GND L_I/O 1 L_I/O 0 GND R_I/O0 L_A 1 L_A 0 N.C. N.C. N.C. N.C. 9 10 11 12 13 R_I/O1 GND R_I/O2 R_I/O3 GND R_A 0 R_A 1 R_A 2 R_I/O6 R_I/O5 R_I/O4 N.C. N.C. GND R_I/O7 V CC R_I/O8 GND R_A 3 R_A 4 R_I/O11 R_I/O10 R_I/O9 A GND L_I/O 3 L_I/O 2 B L_I/O 4 L_I/O 5 L_I/O 6 C L_I/O 8 V CC L_I/O 7 D L_I/O 9 L_I/O 10 L_I/O 11 L_A 3 E L_I/O 12 N.C. N.C. L_A 4 R_A 5 N.C. N.C. R_I/O12 F L_I/O 13 L_ OE L L_ OE H L_A5 R_A 6 R_OE H R_OE L R_I/O13 G GND L_R/ W0 L_R/ W1 GND R_R/W1 R_R/W0 GND H L_I/O 14 L_R/ W2 L_R/ W3 L_A 6 R_A 7 R_R/W3 R_R/W2 R_I/O14 J L_I/O 15 L_I/O 16 L_I/O 17 L_A 7 R_A 8 R_I/O17 R_I/O16 R_I/O15 K L_I/O 20 L_I/O 19 L_I/O 18 L L_I/O 21 V CC L_I/O 22 M L_I/O 23 L_I/O 24 N GND L_I/O 26 L_A 2 GND GND GND GND L_A 10 L_A 11 GND R_A 11 R_A 10 GND R_I/O18 R_I/O19 R_I/O20 L_A 8 L_A 9 L_I/O 31 R_I/O35 R_I/O34 R_I/O30 R_A 9 R_I/O22 V CC R_I/O21 L_I/O 25 L_I/O 29 L_I/O 30 L_I/O 32 L_I/O 35 R_I/O33 R_I/O31 R_I/O29 R_I/O25 R_I/O24 R_I/O23 L_I/O 27 L_I/O 28 GND L_I/O 33 L_I/O 34 R_I/O32 GND R_I/O28 R_I/O27 R_I/O26 GND 2819 drw 02 2809 drw 02 PIN NAMES Left Port Right Port L_R/W 0-3 R_R/W 0-3 Byte Read/Write Enables Names L_OE L, H R_OE L, H Word Output Enables L_A 0-11 R_A 0-11 Address Inputs L_I/O 0-35 R_I/O 0-35 Data Input/Outputs VCC Power GND Ground 2819 tbl 01 7.03 2 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS(1) Symbol (2) VTERM VTERM(3) TA TBIAS TSTG IOUT Rating Commercial Military Unit Terminal Voltage with Respect to GND Terminal Voltage Operating Temperature Temperature Under Bias Storage Temperature DC Output Current –0.5 to +7.0 –0.5 to +7.0 V –0.5 to +7.0 0 to +70 –0.5 to +7.0 –55 to +125 V °C –10 to +85 –65 to +135 °C –55 to +125 –65 to +150 °C 50 50 mA RECOMMENDED DC OPERATING CONDITIONS Symbol Parameter Min. Typ. Max. Unit VCC Supply Voltage 4.5 5.0 5.5 V GND Supply Voltage 0 0 0 V VIH Input HIGH Voltage — 6.0 V — 0.8 V VIL Input LOW Voltage 2.2 (1) –0.5 NOTE: 1. VIL ≥ –3.0V for pulse width less than 20ns. NOTES: 2819 tbl 02 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Inputs and VCC terminals only. 3. I/O terminals only. 2819 tbl 03 RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE Grade Ambient Temperature GND VCC Military –55°C to +125°C 0V 5.0V ± 10% 0°C to +70°C 0V 5.0V ± 10% Commercial 2819 tbl 04 CAPACITANCE TABLE (TA = +25°C, f = 1.0MHz) Symbol Parameter Conditions Max. Unit V_IN = 0V 50 pF C_IN(1) Input Capacitance (Address) C_IN(2) Input Capacitance (Data, R/W) V_IN = 0V 15 pF C_IN(3) Input Capacitance (OE) V_IN = 0V 25 pF V_OUT = 0V 15 pF COUT Output Capacitance (Data) NOTE: 1. This parameter is guaranteed by design but not tested. 2819 tbl 05 7.03 3 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS (VCC = 5V ± 10%, TA = –55°C to +125°C or 0°C to +70°C) Symbol |ILI| |ILO| Test Conditions Min. Max. Unit Input Leakage VIN = GND to VCC Parameter VCC = Max. — 40 µA Output Leakage ≥ VIH, VOUT = GND to VCC VCC = Max. — 10 µA OE VOL Output LOW Voltage VCC = Min. IOL = 4mA — 0.4 V VOH Output HIGH Voltage VCC = Min. IOH = -4mA 2.4 — V 2819 ttbl 06 DC ELECTRICAL CHARACTERISTICS (VCC = 5V ± 10%, TA = –55°C to +125°C or 0°C to +70°C) Symbol ICC Parameter Test Conditions Operating Current Min. Max. Unit — 1040 mA VCC = Max., Outputs Open, f = fMAX (1) NOTE: 2819 tbl 07 1. At f=fMAX, address and data inputs (except OE) are cycling at the maximum frequency of read cycle of 1/tRC, and using “AC TEST CONDITIONS” of input levels of GND to 3V. AC TEST CONDITIONS Input Pulse Levels GND to 3.0V Input Rise/Fall Times 3ns Input Timing Reference Levels 1.5V Output Reference Levels 1.5V Output Load See Figures 1-3 2819 tbl 08 +5 V 8 480 Ω 7 DATAOUT 6 255Ω 5 pF* ∆TAA (Typical, ns) 5 4 3 2 1 2819 drw 03 *Including scope and jig. Figure 1. Output Load (For tCHZ, tCLZ, tOHZ, tOLZ, tWHZ, tOW) 20 40 60 80 100 120 140 160 180 200 CAPACITANCE (pF) 2819 drw 04b DATA OUT Zo = 50Ω Figure 3. Alternate Lumped Capacitive Load, Typical Derating 50Ω 1.5V 2819 drw 04a Figure 2. Alternate Output Load 7.03 4 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES AC ELECTRICAL CHARACTERISTICS (VCC = 5V ± 10%, TA = –55°C to +125°C or 0°C to +70°C) 7M1014SxxG -15 Symbol Parameter Min. 7M1014SxxGB -20 -25 Max. Min. Max. Min. -30 Max. Min. Max. Unit Read Cycle tRC Read Cycle Time 15 — 20 — 25 — 30 — ns tAA Address Access Time — 15 — 20 — 25 — 30 ns tOE Output Enable Access Time — 8 — 10 — 12 — 15 ns tOH Output Hold from Address Change 3 — 3 — 3 — 3 — ns (1) tOLZ Output Enable to Output in Low-Z 0 — 0 — 0 — 0 — ns tOHZ(1) Output Disable to Output in Hi-Z — 7 — 9 — 11 — 13 ns Write Cycle tWC Write Cycle Time 15 — 20 — 25 — 30 — ns tAW Address Valid to End of Write 14 — 15 — 20 — 25 — ns tAS Address Set-Up Time 0 — 0 — 0 — 0 — ns tWP Write Pulse Width 12 — 15 — 20 — 25 — ns tWR Write Recovery Time 1 — 2 — 2 — 2 — ns tDW Data Valid to End of Write 10 — 12 — 15 — 20 — ns Data Hold Time 0 — 0 — 0 — 0 — ns tWHZ Write Enable to Output in Hi-Z — 7 — 9 — 11 — 13 ns tOW(1) Output Active from End of Write 0 — 0 — 0 — 0 — ns tWDD Write Pulse to Data Delay — 30 — 40 — 45 — 50 ns tDDD(1) Write Data Valid to Read Data Delay — 25 — 30 — 35 — 40 ns tDH (1) NOTES: 1. This parameter is guaranteed by design but not tested. 2. Port-to-Port delay through the RAM cells from the writing port to the reading port. TIMING WAVEFORM OF READ CYCLE NO. 1 (EITHER SIDE) 2819 tbl 09 (1,2) tRC ADDRESS tAA tOH DATAOUT tOH 2819 drw 05 NOTES: 1. R/W is HIGH for Read Cycles. 2. OE ≤ VIL. 7.03 5 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES TIMING WAVEFORM OF READ CYCLE NO. 2 (EITHER SIDE) (1, 2) tOE OE tOLZ (3) tOHZ (3) DATA VALID DATAOUT 2819 drw 06 TIMING WAVEFORM OF READ WITH PORT-TO-PORT DELAY tWC ADDRR MATCH tWP R/WR (1) tDW DATAIN R VALID ADDRL MATCH tWDD VALID DATAOUT L tDDD NOTES: 1. R/W is HIGH for Read Cycles. 2. Adress valid prior to OE transition LOW. 3. This parameter is guaranteed by design but not tested. 2819 drw 07 7.03 6 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES TIMING WAVEFORM OF WRITE CYCLE (EITHER SIDE) (1,2) tWC ADDRESS tOHZ (3) OE tAW tAS R/ tWR tWP W tWHZ DATAOUT tOW (4) (4) tDW DATAIN tDH DATA VALID NOTES: 1. R/W is HIGH during all address transitions. 2. If OE is LOW during the write cycle, the write pulse width must be the larger of tWP or (tWZ + tDW) to allow the I/O drivers to turn off and data to be placed on the bus for the required tDW. If OE is HIGH, this requirement does not apply, and the write pulse can be as short as the specified tWP. 3. This parameter is guaranteed by design but not tested. 4. During this period, the I/O pins are in the output state and input signals must not be applied. 7.03 2819 drw 08 7 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES PACKAGE DIMENSIONS TOP VIEW SIDE VIEW 1.327 1.353 0.045 0.055 0.015 0.021 1.327 1.353 0.100 TYP 0.195 MAX 0.125 0.135 0.050 TYP PIN A1 BOTTOM VIEW 2819 drw 10 ORDERING INFORMATION IDT XXXX A 999 A A Device Type Power Speed Package Process/ Temperature Range BLANK Commercial (0°C to +70°C) B Military (–55°C to +125°C) Semiconductor Components compliant to MIL-STD883, Class B G Ceramic PGA (Pin Grid Array) 15 20 25 30 (Commercial Only) (Commercial Only) (Military Only) (Military Only) S Standard Power 7M1014 4K x 36 BiCMOS Dual-Port static RAM Module Speed in Nanoseconds 2819 drw 10 7.03 8