LM747QML www.ti.com SNOSAR6A – DECEMBER 2010 – REVISED MARCH 2013 LM747QML Dual Operational Amplifier Check for Samples: LM747QML FEATURES DESCRIPTION • • • The LM747 is a general purpose dual operational amplifier. The two amplifiers share a common bias network and power supply leads. Otherwise, their operation is completely independent. 1 2 • • No Frequency Compensation Required Short-Circuit Protection Wide Common-Mode and Differential Voltage Ranges Low Power Consumption No Latch-Up Additional features of the LM747 are: no latch-up when input common mode range is exceeded, freedom from oscillations, and package flexibility. Connection Diagrams IN- A 1 14 OFFSET NULL A IN+ A 2 13 V A OFFSET NULL A 3 12 OUTPUT A V- 4 11 N/C OFFSET NULL B 5 10 OUTPUT B IN+ B 6 9 V B IN- B 7 8 OFFSET NULL B + + Figure 1. CDIP Top View See Package Number J (R-GDIP-T14) N/C 10 OUTPUT A + 9 1 OUTPUT B + V A 2 8 V B IN- A 3 7 IN- B IN+ A 6 4 IN+ B 5 V- Figure 2. TO-100 See Package Number LME (O-MBCY-W10) 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010–2013, Texas Instruments Incorporated LM747QML SNOSAR6A – DECEMBER 2010 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) Supply voltage ±22V Power Dissipation (2) 800mW Differential Input Voltage Input Voltage ±30V (3) ±15V Output Short-Circuit Duration Indefinite Maximum Junction Temperature (TJmax) 150°C Operating Temperature Range −55°C ≤ TA ≤ +125°C Storage Temperature Range −65°C ≤ TA ≤ +150°C Lead Temperature (Soldering, 10 seconds) (1) (2) (3) +300°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower. For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage. Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A 2 Subgroup Description 1 Static tests at Temp (°C) +25 2 Static tests at +125 3 Static tests at -55 4 Dynamic tests at +25 5 Dynamic tests at +125 6 Dynamic tests at -55 7 Functional tests at +25 8A Functional tests at +125 8B Functional tests at -55 9 Switching tests at +25 10 Switching tests at +125 11 Switching tests at -55 12 Settling time at +25 13 Settling time at +125 14 Settling time at -55 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: LM747QML LM747QML www.ti.com SNOSAR6A – DECEMBER 2010 – REVISED MARCH 2013 LM747 Electrical Characteristics DC Parameters The following conditions apply, unless otherwise specified. Symbol Parameter VCC = ±15V, VCM = 0V Conditions Notes RS = 50Ω, VCM = -12V RS = 50Ω, VCM = 12V VIO Input Offset Voltage RS = 50Ω RS = 50Ω, VCC = ±5V VCM = -12V VCM = 12V IIO Input Offset Current VCC = ±5V VCM = -12V VCM = 12V IIB+ Input Bias Current VCC = ±5V VCM = -12V VCM = 12V IIB- Input Bias Current VCC = ±5V VIO Adj + VIO Adj- Input Offset Voltage Adjustment Range Min Max Units Sub- groups -5.0 5.0 mV 1 -6.0 6.0 mV 2, 3 -5.0 5.0 mV 1 -6.0 6.0 mV 2, 3 -5.0 5.0 mV 1 -6.0 6.0 mV 2, 3 -5.0 5.0 mV 1 2, 3 -6.0 6.0 mV -200 200 nA 1 -500 500 nA 2, 3 -200 200 nA 1 -500 500 nA 2, 3 -200 200 nA 1 -500 500 nA 2, 3 -200 200 nA 1 -500 500 nA 2, 3 0.0 500 nA 1 0.0 1500 nA 2, 3 0.0 500 nA 1 0.0 1500 nA 2, 3 0.0 500 nA 1 0.0 1500 nA 2, 3 0.0 500 nA 1 0.0 1500 nA 2, 3 0.0 500 nA 1 0.0 1500 nA 2, 3 0.0 500 nA 1 0.0 1500 nA 2, 3 0.0 500 nA 1 0.0 1500 nA 2, 3 0.0 500 nA 1 0.0 1500 nA 2, 3 mV 1, 2, 3 mV 1, 2, 3 6.0 See (1) Input Offset Voltage Adjustment Range -6.0 + Power Supply Rejection Ratio RS = 50Ω, VCC = ±15V to ±5V 77 dB 1, 2, 3 - PSRR Power Supply Rejection Ratio RS = 50Ω, VCC = ±15V to ±5V 77 dB 1, 2, 3 CMRR Common Mode Rejection Ratio RS = 50Ω, VCM = ±12V 70 dB 1, 2, 3 PSRR IOS+ Output Short Circuit Current IOS- Output Short Circuit Current ICC (1) Supply Current -45 -9.0 mA 1, 2 -50 -9.0 mA 3 9.0 45 mA 1, 2 9.0 50 mA 3 5.6 mA 1 5.0 mA 2 6.6 mA 3 Tested for CDIP only. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: LM747QML 3 LM747QML SNOSAR6A – DECEMBER 2010 – REVISED MARCH 2013 www.ti.com LM747 Electrical Characteristics DC Parameters (continued) The following conditions apply, unless otherwise specified. Symbol VOP+ Parameter Output Voltage Swing VOP- Output Voltage Swing VCC = ±15V, VCM = 0V Conditions Notes Min Units Sub- groups RL = 10KΩ 12 V 1, 2, 3 RL = 2KΩ 10 V 1, 2, 3 VCC = ±20V, RL = 10KΩ 16 V 1, 2, 3 VCC = ±20V, RL = 2KΩ 15 V 1, 2, 3 RL = 10KΩ -12 V 1, 2, 3 RL = 2KΩ -10 V 1, 2, 3 VCC = ±20V, RL = 10KΩ -16 V 1, 2, 3 V 1, 2, 3 VCC = ±20V, RL = 2KΩ -15 AVS+ Open Loop Voltage Gain VO = 0 to +10V, RL = 2K See (2) AVS- Open Loop Voltage Gain VO = 0 to -10V, RL = 2K See (2) VI Input Voltage Range VOP Output Voltage Swing (2) (3) (4) Max VCC = ±5V 50 V/mV 1 25 V/mV 2, 3 50 V/mV 1 25 V/mV 2, 3 See (3) 12 −12 V 1, 2, 3 See (4) 2 −2 V 1, 2, 3 Datalog reading in K = V/mV Parameter tested go-no-go only, specified by CMRR test. Specified parameter, not tested. LM747 Electrical Characteristics AC Parameters The following conditions apply, unless otherwise specified. AC: VCC = ±15V, VCM = 0V Units Sub- groups SR+ Symbol Slew Rate AV = 1, VI = -5V to +5V 0.2 V/µS 9 SR- Slew Rate AV = 1, VI = +5V to -5V 0.2 V/µS 9 Gain Bandwidth VI = 50mV, ƒ = 20KHz, RL = 2KΩ 0.25 Mhz 9 GBW 4 Parameter Conditions Notes Submit Documentation Feedback Min Max Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: LM747QML LM747QML www.ti.com SNOSAR6A – DECEMBER 2010 – REVISED MARCH 2013 Table 1. Revision History Released Revision Section Changes 12/16/2010 A New Release, Corporate format 1 MDS data sheet converted into one Corp. data sheet format. The drift table was eliminated from the 883 section since it did not apply; MNLM747-X Rev 0BL will be archived. 03/25/2013 A All Sections Changed layout of National Data Sheet to TI format Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: LM747QML 5 PACKAGE OPTION ADDENDUM www.ti.com 10-Aug-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty 456 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 TBD Call TI Call TI -55 to 125 Device Marking (4/5) LM747 MD8 ACTIVE DIESALE Y 0 LM747 MW8 ACTIVE WAFERSALE YS 0 LM747H/883 ACTIVE TO-100 LME 10 20 TBD Call TI Call TI -55 to 125 LM747H/883 Q ACO LM747H/883 Q >T LM747J/883 ACTIVE CDIP J 14 25 TBD Call TI Call TI -55 to 125 LM747J/883 Q (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Aug-2016 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MMBC006 – MARCH 2001 LME (O–MBCY–W10) METAL CYLINDRICAL PACKAGE ø 0.370 (9,40) 0.335 (8,51) ø 0.335 (8,51) 0.305 (7,75) 0.040 (1,02) 0.010 (0,25) 0.185 (4,70) 0.165 (4,19) 0.040 (1,02) 0.010 (0,25) 0.500 (12,70) MIN Seating Plane ø ø 0.021 (0,53) 0.016 (0,41) 0.160 (4,06) 0.120 (3,05) 0.120 (3,05) 0.110 (2,79) 4 3 0.034 (0,86) 0.028 (0,71) 36° 5 2 6 1 10 7 9 8 0.230 (5,84) 0.045 (1,14) 0.029 (0,74) 4202488/A 03/01 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Leads in true position within 0.010 (0,25) R @ MMC at seating plane. Pin numbers shown for reference only. Numbers may not be marked on package. Falls within JEDEC MO–006/TO-100. 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