FEDL22321-01
Issue Date:Mar 23, 2015
ML22Q321/321
ADPCM Speech Synthesis LSI
GENERAL DESCRIPTION
The ML22321/ML22Q321, which include mask ROM and Flash memory for storing speech data, respectively, are speech
synthesis LSIs which can control speech playback utilizing a serial interface.
It includes speaker amplifier and 16bit DA Converter, so it is possible to have high quality sound and solution for playback with
1chip.
• Playback Time
Product Name
Capasitance
of ROM(bit)
ML22Q321/321
920K
• Speech sysnthesis system:
• Speech ROM capacity
• Sampling frequency:
• Volume control function:
• Analog output:
• Interface:
•
•
•
•
•
•
•
Maximum event count:
Source oscillation frequency:
Power supply voltage:
Flash memory rewrite cycles
Operating temperature range:
Package:
Product name:
(*1)
Maximum Playback time(s) （Fsam=8.0kHz）
HQ-ADPCM
4bitADPCM2
16bitPCM
36.8
29.4
7.3
4-bit ADPCM2
8-bit/16-bit straight PCM system
8-bit nonlinear PCM system
HQ-ADPCM(*1)
(can be specified for each phrase)
ML22321:
920-Kbit Mask ROM
ML22Q321: 920-Kbit Flash
8.0/16.0 /32.0kHz, 6.4/12.8/25.6 kHz/, 10.7/21.3 kHz
(fsam can be specified in units of phrase)
32 steps by an analog value input and ADC (OFF is included)
Built-in 16-bit DA converter
Synchronous serial interface
MSB first, LSB first, or default level of synchronous clock is selectable based on ROM data
62 events
4.096 MHz (Typ.)
2.3V to 5.5V
80 times (ML22Q321)
−40°C to +85°C
30-pin plastic SSOP (SSOP30-56-0.65-Z6K9-MC)
ML22321-xxxMB (xxx: ROM code number)
ML22Q321-NNNMB/ML22Q321-xxxMB(xxx: ROM code number)
HQ-ADPCM is audio compression technology featuring high-quality sound. It was developed by “Ky’s”.
“Ky’s” is a registered trademark of Kyushu Institute of Technology, one of the national universities in Japan.
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BLOCK DIAGRAM
ML22Q321-NNN/ML22Q321-xxx
VDD
GND
Regulator
Controller
VDDL
CSB
SCK
SIN
Address
SPI
Phrase
Address Latch
16bit
Multiplexer
920Kbit
Flash
16bit
Address Counter
ADPCM/PCM
Synthesizer
Interface
TEST
TESTI0
TESTI1
BUSYB
SCKEN
ERR
TESTO
VPP
LPF
VREF
Timing
Controller
I/O
16bit DAC
Interface
OSC
SP
SPVDD
AMP
SPGND
SPM
SPP
RESET_N
OSC0
OSC1 AOUT
SG
SPOFF
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ML22Q321/321
ML22321-xxx
VDD
GND
Controller
VDDL
CSB
SCK
SIN
Address
Regulator
SPI
Phrase
Address Latch
16bit
Multiplexer
920Kbit
ROM
16bit
Address Counter
ADPCM/PCM
Synthesizer
Interface
TEST
TESTI0
TESTI1
BUSYB
SCKEN
ERR
TESTO
LPF
VREF
Timing
Controller
I/O
16bit DAC
Interface
OSC
SP
SPVDD
AMP
SPGND
SPM
SPP
RESET_N
OSC0
OSC1 AOUT
SG SPOFF
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PIN CONFIGURATION (TOP VIEW)
ML22Q321-NNNMB/ML22Q321-xxxMB
VDD
OSC0
OSC1
VDDL
VPP
ERR
TESTO
SCK
SIN
GND
RESET_N
TEST
SPOFF
TESTI1
TESTI0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
SPP
SPM
(NC)
SPGND
SPVDD
SPIN
AOUT
SG
GND
SCKEN
BUSYB
CSB
VDD
GND
VREF
NC：unused pin
30-pin Plastic SSOP
ML22321-xxxMB
V DD
OSC0
OSC1
VDDL
(NC)
ERR
TESTO
SCK
SIN
GND
RESET_N
TEST
SPOFF
TESTI1
TESTI0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
SPP
SPM
(NC)
SPGND
SPV DD
SPIN
AOUT
SG
GND
SCKEN
BUSYB
CSB
VDD
GND
VREF
NC：unused pin
30-pin Plastic SSOP
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PIN DESCRIPTIONS
Pin No.
symbol
I/O
11
RESET_N
I
19
CSB
I
8
9
SCK
SIN
I
I
13
SPOFF
I
16
VREF
I
12
15
14
TEST
TESTI0
TESTI1
I
I
I
Input pin for testing. Fix this pin at a “L” level (GND level).
Input pin for testing. Fix this pin at a “L” level (GND level).
Input pin for testing. Fix this pin at a “L” level (GND level).
2
OSC0
I
Pin for connecting a crystal or a ceramic vibrator.
A feed back resistor (about 1 MΩ) is included between OSC0 and OSC1 pins.
When a vibrator is used, place it as close to the LSI as possible.
3
OSC1
O
20
BUSYB
O
21
SCKEN
O
6
ERR
O
24
AOUT
O
7
TESTO
VPP
*Note 1
O
5
—
1,18
VDD
—
4
VDDL
—
10,17,22
27
26
25
GND
SPGND
SPVDD
SPIN
—
—
—
I
23
SG
O
30
29
SPP
SPM
O
O
Description
Place this pin at a “L” level when powered on. After the supply voltage is settled,
place this pin at a “H” level.
Chip select pin.
At the “L” level, SCK0 pin and SIN0 pin are available.
Synchronous clock input pin for serial interface.
Input pin of synchronous serial data.
Control pin of internal speaker amplifier. In “H” level input, internal
speaker amplifier is turned off.
Volume control pin. Input the voltage of the range from VDD to GND.
Volume is the maximum when input voltage is VDD.
Pin for connecting a crystal or a ceramic vibrator.
When a vibrator is used, place it as close to the LSI as possible.
Playback status signal output pin.
"L" is outputted when an event is fixed. After playback is completed, “H” is
outputted after WS3. Then, when the POP noise measure is completed, it turns
standby state.
Output pin showing the permission state of SCK input of a serial interface
The input of SCK and SIN is permitted during H" level output, and it is disregarded
during H" level output
Error output pin for thermal detection and disconnection detection.
If disconnection detection or a higher temperature than the judgment
temperature is detected, this pin output “H”. Setting event 1 , operate the
disconnection detection.
And the 100ms “H” pulse is output right after the event start.
Playback signal output pin.
When you use built-in speaker amplifier, connect with the SPIN pin.
Output pin for test.
Power supply pin for rewriting Flash memory.
Fix this pin to GND except when rewriting Flash memory.
Digital power supply pin.
Connect a capacitor of 0.1 µF or more between this pin and GND.
Output pin of the regulator for the internal logic power supply.
Connect a electrolytic capacitor of 10 uF or more and a ceramic capacitor of 0.1
µF or more between the VDDL and GND pins.
Digital ground pin.
Speaker amplifier ground pin.
Speaker amplifier power supply pin.
Analog input pin of internal speaker amplifier.
Built-in speaker amplifier’s reference voltage output pin.
Connect a capacitor of 0.1 µF or more between this pin and GND.
Positive output pin of the built-in speaker amplifier.
Negative output pin of the built-in speaker amplifier.
Notes: 1. Applies to ML22Q321-NNN
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ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
(GND = SPGND = 0 V)
Unit
Digital power supply voltage
Internal logic power supply
voltage
Speaker power supply
voltage
Flash power supply voltage
(Note 1)
VDD
−0.3 to +7.0
V
VDDL
−0.3 to +3.6
V
−0.3 to +7.0
V
−0.3 to +9.5
V
Condition
Ta = 25 °C
SPVDD
VPP
Input voltage
VIN
Ta = 25 °C
When JEDEC 2-layer board is
mounted
−0.3 to VDD+0.3
V
Power dissipation
PD
Ta = 25 °C
861
mW
−12 to +11
mA
ISC2
except LED drive pin,
Ta = 25 °C
LED drive pin, Ta = 25 °C
−12 to +20
mA
TSTG
—
−55 to +150
°C
(GND = SPGND = 0 V)
Unit
Output short current
Storage temperature
ISC1
Note 1: Applies to the ML22Q321-NNN
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Condition
Range
—
2.3 to 5.5
Digital power supply voltage
VDD
ML22Q321 read
2.3 to 5.5
ML22Q321 write
3.0 to 5.5
SPVDD
—
2.3 to 5.5
V
Flash power supply voltage
VPP
ML22Q321 write
7.7 to 8.3
V
Flash memory rewrite cycles
N
ML22Q321
80
times
TOP1
ML22321
−40 to +85
TOP2
ML22Q321 read
-40 to +85
TOP3
ML22Q321 write
0 to +40
fOSC
—
Speaker power supply
voltage
Operating temperature
Source oscillation frequency
V
°C
Min.
Typ.
Max.
3.5
4.096
4.5
MHz
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ELECTRICAL CHARACTERISTICS
DC Characteristics
Parameter
“H” input voltage
VDD = SPVDD = 2.3 to 5.5 V, GND = SPGND = 0 V, Ta = −40 to +85°C
Condition
Min.
Typ.
Max.
Unit
—
0.7×VDD
—
VDD
V
Symbol
VIH
“L” voltage
“H” output voltage 1
VIL
VOH1
“H” output voltage 2
VOH2
“L” output voltage 1
VOL1
“L” output voltage 2
VOL2
“H” input current 1
IIH1
“H” input current 2
IIH2
“L” input current 1
IIL1
“L” input current 2
IIL2
Supply current during
operate
Supply current during
power down
—
IOH = −0.5 mA
IOH = 100µA
OSC1 pin
IOL = 0.5 mA
IOL = 100µA
OSC1 pin
VIH = VDD
VIH = VDD
TEST, TESTI0, TESTI1 pin
VIL = GND
VIL = GND
RESET_N pin
Non-loaded output
VDD = SPVDD = 3.0V
Non-loaded output
VDD = SPVDD = 5.0V
0
VDD−0.5
—
—
0.3×VDD
—
V
V
VDD−0.5
—
—
V
—
—
0.5
V
—
—
0.5
V
—
—
1
µA
0.02
0.3
1.5
mA
−1
—
—
µA
−1.5
−0.3
−0.02
mA
—
2.5
12
—
8
12
IDDS1
Ta ≦40°C
—
0.5
2.0
IDDS2
Ta ≦ 85°C
—
0.5
8.0
IDD1
IDD2
mA
µA
Analog Characteristics
Parameter
Symbol
VDD = SPVDD = 2.3 to 5.5 V, GND = SPGND = 0 V, Ta = −40 to +85°C
Condition
Min.
Typ.
Max.
Unit
AOUT output load resistance
RLA
During 1/2 VDD output
10
—
—
kΩ
AOUT output voltage range
SG output voltage
SG output resistance
SPM, SPP output load resistance
VAO
VSG
RSG
RLSP
1/6×VDD
0.95xVDD/2
57
8
—
VDD/2
96
⎯
5/6×VDD
1.05xVDD/2
135
⎯
V
V
kΩ
Ω
Speaker amplifier output power
PSPO
⎯
1
⎯
W
Output offset voltage between SPM
and SPP with no signal present
VOF
No output load
⎯
⎯
⎯
SPVDD=5.0V，f=1kHz ,
RSPO=8Ω，THD≧10%
SPIN-SPM gain=0dB
8Ω load
-50
⎯
50
mV
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AC Characteristics
Parameter
Duty cycle of source oscillation
RESET_N input pulse width
Voltage startup time
Initialize time
VDD = SPVDD = 2.3 to 5.5 V, GND = SPGND = 0 V, Ta = −40 to +85°C
Symbol
Condition
Min.
Typ.
Max.
Unit
—
40
50
60
%
fduty
—
100
—
—
µs
tRST
—
—
—
10
ms
tPWR
fOSC=4.096MHz
20
—
22
ms
tINIT
Oscillation stabilizing time
tOSC
—
—
SCK input cycle
tSCYC
—
500
2
—
20
—
ms
ns
SCK input pulse width
tSW
—
200
—
—
ns
Setup time of SIN to the rising of SCK
tSS
—
50
—
—
ns
Hold time of SIN to the rising of SCK
tSH
—
50
—
—
ns
Setup time of CSB to the rising of SCK
tCSS
—
—
2
20
ms
Hold time of CSB to the rising of SCK
tCSH
—
At the time of release of a
standby state
At the time of the
continuous input of an
event
100
—
—
ns
—
—
20
ms
—
—
10
µs
Output delay time1 of SCKEN to falling of CSB
tDSEN1
Output delay time2 of SCKEN to falling of CSB
tDSEN2
Output delay time of BUSYB to falling of SCK
tDBSY
—
—
—
400
µs
SG pin voltage stabilization time(Rising)
SG pin voltage stabilization time(Falling)
tSGR
tSGF
tPOPR
tPOPF
fOSC=4.096MHz
fOSC=4.096MHz
32
64
—
—
34
66
ms
ms
fOSC=4.096MHz
40
—
42
ms
—
100
—
—
ms
Pop noise elimination time
Disconnection judging time
by the DISCONNECT event
tDCD
Load capacitance of the output pins = 55 pF (max.)
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TIMING DIAGRAMS
Power On
VDD
VDD
tPWR
RESET_N
tRST
VIH
VIL
OSC0/OSC1
Oscillation stopped
tOSC
tINIT
Oscillation
stabilized
Oscillation
Oscillation stopped
Initializing
Power down
State
Serial Interface
・When the default value of SCK is “H”
CSB
tCSS
tCSH
tSCYC
SCK
tSW tSW
SIN
tSS
State
tSH
Oscillation
stabilized
Oscillation
・When the default value of SCK is “L”
CSB
tCSS
tCSH
tSCYC
SCK
tSW tSW
SIN
tSS
State
Oscillation
stabilized
tSH
Oscillation
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Event Control example 1 (Only one playback in Play once mode)
CSB
invalid command
Event activation
Stop play
SCK
SIN
Event state
Event n
Event m
tDSEN2
tDSEN1
SCKEN
tDBSY
BUSYB
tOSC
AOUT
WS1 tSGR
tPOPR
WS2
WS3
tPOPF
tSGF WS4
GND
Eliminating
noise
Eliminating
pop noise
State
Power Oscillation Wait time after
down stabilized fixing event
OSC0 Oscillation
OSC1 stopped
Eliminating
pop noise
Executing event n
（Play once mode）
Wait time
Wait time
after play
before play
Oscillation
Power down
Wait time before
power down
Oscillation
stopped
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Event Control example 2 (Only one playback in Scheduled play mode)
CSB
Event activation
Fixed event “00”
SCK
SIN
Event state
Stop play
Event n
tDSEN1
”00”
tDSEN2
SCKEN
tDBSY
BUSYB
tOSC
AOUT
WS1 tSGR
tPOPR
WS2
WS3
tPOPF
tSGF WS4
GND
Eliminating
noise
Eliminating
pop noise
State
Power Oscillation Wait time after
fixing event
down stabilized
OSC0 Oscillation
stopped
OSC1
Eliminating
pop noise
Executing event n
（Scheduled play mode）
Wait time
Wait time
after play
before play
Oscillation
Power down
Wait time
before power down
Oscillation
stopped
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Event Control example 3 (Repetitive playback in Scheduled play mode)
CSB
Fixed event “00”
Event activation
SCK
SIN
Event state
Stop play
Event n
tDSEN1
”00”
tDSEN2
SCKEN
tDBSY
Play event n
continuously
BUSYB
tOSC
AOUT
WS3 tPOPF tSGF WS4
WS1 tSGR tPOPR WS2
GND
Inputting
event
ポップノイズ
対策中
Eliminating
pop noise
State
Power down
Power OscillationWait time after
down stabilized fixing event
OSC0 Oscillation
OSC1 stopped
Wait time
before play
Oscillation
Executing event n
（Scheduled play mode）
Wait time
Wait time
after play before power down
Oscillation
stopped
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Event Control example 4 (Change in playback phrase in Scheduled play mode)
CSB
Fixed event “00”
Event activation
Fixed event m
SCK
SIN
Event m
Event state
Stop play
Event n
tDSEN1
”00”
tDSEN2
tDSEN2
SCKEN
tDBSY
Play event n
continuously
BUSYB
tOSC
AOUT
Play
event m
WS3 tPOPF tSGF WS4
WS1 tSGR tPOPR WS2
GND
Inputting Eliminating pop
noise
event
Executing event m
(Scheduled play mode)
Eliminating
pop noise
State
Power down
Executing event n
Power Oscillation Wait time after Wait time
down stabilized fixing event before play (Scheduled play mode)
OSC0
OSC1
Oscillation
stopped
Oscillation
Wait time
after play
Wait time before
power down
Oscillation
stopped
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Event Control example 5 (Repetitive playback in Change immediately mode)
CSB
Event activation
Stop event n
immediately
SCK
SIN
Event state
Event n
”00”
tDSEN1
tDSEN2
SCKEN
tDBSY
Play event n
continuously
BUSYB
tOSC
AOUT
WS3 tPOPF tSGF WS4
WS1 tSGR tPOPR WS2
GND
Eliminating
noise
Eliminating
pop noise
Executing event n
（Change immediately mode）
State
Power down
Power OscillationWait time after
down stabilized fixing event
OSC0
OSC1
Eliminating
pop noise
Oscillation
stopped
Wait time
before play
Oscillation
Wait time Wait time before
after play
power down
Oscillation stopped
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Event Control example 6 (Different consecutive event execution timing diagram in Change immediately mode)
CSB
Event activation
Change event n
immediately
Stop event m
immediately
SCK
SIN
Event m
Event state
Event n
”00”
tDSEN1
tDSEN2
tDSEN2
SCKEN
tDBSY
Play event n
continuously
BUSYB
tOSC
AOUT
WS1 tSGR tPOPR WS2
Event m Play
WS3 tPOPF tSGF WS4
GND
Eliminating
noise
Eliminating
pop noise
State
Executing event m
Eliminating
（Scheduled play mode） pop noise
Power down
Executing event n
Wait time Wait time before
Power OscillationWait time after Wait time
power down
down stabilized fixing event before play （Change immediately mode） after play
OSC0
OSC1
Oscillation
stopped
Oscillation
Oscillation
stopped
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FUNCTIONAL DESCRIPTION
The "Speech LSI Utility” is used for the setting of an each function and the creating of ROM data.
The Speech LSI Utility is dedicated software.
Serial interface input flow chart
The timing to which the input of serial interface is permitted can be judged by monitoring the output of SCKEN.
The flow chart is shown below.
Start
CSB ”L”input
SCKEN ”H”
N
Y
Event input(SCK,SIN input)
Event fix
（8bit input）
N
Y
CSB ”H”input
End
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Synchronous Serial Command Interface
The CSB, SCK, SIN pins are used to input the command data. Driving the CSB pin to “L” level enables the serial CPU interface.
After the CSB pin is driven to “L” level, the command data are input through the SIN pin from the MSB or LSB synchronized with
the SCK clock. The command data shifts in through the SIN pin at the rising edge of the SCK clock pulse. Then, a command is
executed at the rising edge of the eighth pulse of the SCK clock.
The initial value of the SCK pin can be chosen by the mask option of Speech Utility. When setting the initial value of the SCK pin
as "H" level, please choose “Nomal ("H" Level)” as a mask option. When setting the initial value of the SCK pin as "L" level,
please choose “Reversal("L" Level)” as a mask option.
After a command input should return the CSB pin to "H" level.
Data input timing
• Nomal(“H” Level)
CSB
SCK
SIN
D7
D6
D5
D4
D3
D2
D1
(MSB)
D0
(LSB)
• Reversal(“L” Level)
CSB
SCK
SIN
D7
(MSB)
D6
D5
D4
D3
D2
D1
D0
(LSB)
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Playback mode setup
Playback mode can be set up for every phrase.
Playback mode is set into the ROM data.
The ROM data is created using a Speech LSI Utility.
The Speech LSI Utility is dedicated software.
Playback mode
Operation
This mode is playback once. All the commands become
invalid during playback.
The playback continues until the following command will be
inputted, if playback starts. When the following command is
inputted into playback, after playback of the present phrase is
completed, the following command is executed.
The playback continues until the following command will be
inputted, if playback starts. When the following phrase is
inputted into playback, playback of the present phrase is
ended on the way, and playback of the following phrase
starts.
Play Once
Scheduled Play
Change Immediately
Event List
Each event is configured by the unit of byte (8-bit).
Event
D7
D6
D5
D4
D3
D2
D1
D0
Stop
0
0
0
0
0
0
0
0
Disconnection
Detection
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
1
1
1
1
:
Play
:
Description
Stop event.
The Stop event becomes
effective except the phrase in Play
Once mode.
Disconnection Detection event.
Please input the Stop event, after you use the
Disconnection Detection event.
PHRASE02
PHRASE03
:
PHRASE09
PHRASE0A
:
PHRASE3F
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Description of Command Functions
1. Stop event
0
0
0
0
0
0
0
0
The Stop event is used to stop the repetitive playback. The Stop event becomes effective except the phrase in Play Once mode.
When you use Play Once mode, the Stop event is ignored.
When you use Scheduled Play mode, a phrase is played back to the last and the playback is stopped, after the Stop event is inputted.
Furthermore, when you use Change Immediately mode, a phrase is not played back to the last and the playback is stopped
forcibly, after the Stop event is inputted.
x Stop event operation in the case of Scheduled Play mode
Phrase
STOP event
SCK
AOUT
GND
Status
Playing (playback to the last)
Standby
Event processing
Standby
Awaiting event
x Stop event operation in the case of Change Immediately mode
Phrase
STOP event
SCK
AOUT
GND
Status
Playing
Standby
Standby
Event processing
Awaiting event
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2. Disconnection Detection event
0
0
0
0
0
0
0
1
The Disconnection Detection event is used to diagnose whether the speaker is disconnected or not. When the speaker is
disconnected, ERR pin outputs "L". Please input the STOP event, after you use the Disconnection Detection event.
DISCONNECT event
STOP event
SCK
ERR
Disconnection judgment
（L: disconnect , H: Connect）
tDCD
Status
Under speaker disconnection detection
Standby
Standby
Event processing
Awaiting event
3. Play n (n = Phrase 02 to 3F) event
0
0
F5
F4
F3
F2
F1
F0
The Play n (n = Phrase 02 to 3F) event is used to start playback phrase.
After inputting a Play n (n = Phrase 02 to 3F) event, temperature detection is carried out.
Phrase
SIN
0
0 F5 F4 F3 F2 F1 F0
SCK
ERR
Thermal detection (H: More than the set value,
L: Less than the set value)
AOUT
Status
GND
Standby
Awaiting command
Playing
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{ Event Control example 1 (Only one playback in Play once mode)
Operation:
The specified event is performed once after event starting. Other event inputs are disregarded during event
execution.
Control method: Input the event number to be executed to the serial interface pins.
CSB
SCK
SIN
Event n
“Good morning”
{ Event Control example 2 (Only one playback in Scheduled play mode)
Operation:
The specified event is performed once.
Control method: Input the event number to be executed to the serial interface pins. In this mode, the event fixed at the time of
the end of phrase playback is performed repeatedly. Therefore, after event activation, input stop event"00"
into the serial interface pins before the event is completed.
CSB
SCK
SIN
Event n
00h
“Good morning”
{ Event Control example 3 (Repetitive playback in Scheduled play mode)
Operation:
After an event starts, unless a stop command is inputted, the event is performed repetitively.
When a stop event is inputted, the event under execution is performed to the last and stops.
Control method: Input the event number to be executed to the serial interface pins. In this mode, the event fixed at the time of
the end of phrase playback is performed repeatedly. After an event starts, unless a stop command is inputted,
the event is performed repetitively. When desired to stop event execution, input stop command to the serial
interface pins.
CSB
SCK
SIN
Event n
00h
“Good morning”
“Good morning”
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{ Event Control example 4 (Change in playback phrase in Scheduled play mode)
Operation:
The event execution specified first is ended and newly specified event execution is started.
Control method: Input the event number to be executed to the serial interface pins. In this mode, the event fixd at the time of
the end of phrase playback is performed repeatedly. Therefore, after event activation, input a new event into
the serial interface pins before the event is completed.
CSB
SCK
SIN
Event n
Event m
“Good morning”
00h
“Good afternoon”
{ Event Control example 5 (Repetitive playback in Change immediately mode)
Operation:
After an event starts, unless a stop command is inputted, the event is performed repetitively.
When a stop event is inputted, the event stops immediately.
Control method: Input the event number to be executed to the serial interface pins. When desired to stop event execution,
input stop command to the serial interface pins. the event stops immediately.
CSB
SCK
SIN
Event n
00h
“Good morning”
“Good mor
{ Event Control example 6 (Change in playback phrase in Change immediately mode)
Operation:
The event under execution is immediately changed into a new event.
Control method: Input the event number to be executed to the serial interface pins. After an event starts, input the next event
number to the serial interface pins. The event under execution is immediately changed into a new event.
CSB
SCK
SIN
Event m
Event n
“Good morning”
“Good mor
00h
“Good after
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Wait time setting before and after playback (WS1, WS2, WS3, WS4)
Each phrase can set up the wait time before and after playback.
It is set into the ROM. The ROM data is created using a Speech LSI Utility.
The Speech LSI Utility is dedicated software.
Phrase
SCK
WS1
AOUT
WS2
WS3
WS4
GND
Status
Playing
Standby
Standby
Event processing
Awaiting event
WS1: Time after inputting a phrase address, until SPP/SPM pins are enabled.
WS2: Time after SPP/SPM pins are enabled, until playback is started.
WS3: Time after playback is completed, until SPP/SPM pins are disabled.
WS4: Time after SPP/SPM pins are disabled, until it will be in a standby state.
WS1-WS4 can be arbitrarily set up between 0 to1020ms (4ms unit).
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Wait time setting before and after playback (WS1, WS2, WS3, WS4)
Setting
value
wait time
[ms]
Setting
value
wait time
[ms]
Setting
value
wait time
[ms]
Setting
value
wait time
[ms]
Setting
value
wait time
[ms]
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
27h
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
30h
31h
32h
33h
0
4
8
12
16
20
24
28
32
36
40
44
48
52
56
60
64
68
72
76
80
84
88
92
96
100
104
108
112
116
120
124
128
132
136
140
144
148
152
156
160
164
168
172
176
180
184
188
192
196
200
204
34h
35h
36h
37h
38h
39h
3Ah
3Bh
3Ch
3Dh
3Eh
3Fh
40h
41h
42h
43h
44h
45h
46h
47h
48h
49h
4Ah
4Bh
4Ch
4Dh
4Eh
4Fh
50h
51h
52h
53h
54h
55h
56h
57h
58h
59h
5Ah
5Bh
5Ch
5Dh
5Eh
5Fh
60h
61h
62h
63h
64h
65h
66h
208
212
216
220
224
228
232
236
240
244
248
252
256
260
264
268
272
276
280
284
288
292
296
300
304
308
312
316
320
324
328
332
336
340
344
348
352
356
360
364
368
372
376
380
384
388
392
396
400
404
408
67h
68h
69h
6Ah
6Bh
6Ch
6Dh
6Eh
6Fh
70h
71h
72h
73h
74h
75h
76h
77h
78h
79h
7Ah
7Bh
7Ch
7Dh
7Eh
7Fh
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
412
416
420
424
428
432
436
440
444
448
452
456
460
464
468
472
476
480
484
488
492
496
500
504
508
512
516
520
524
528
532
536
540
544
548
552
556
560
564
568
572
576
580
584
588
592
596
600
604
608
612
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
A1h
A2h
A3h
A4h
A5h
A6h
A7h
A8h
A9h
AAh
ABh
ACh
ADh
AEh
AFh
B0h
B1h
B2h
B3h
B4h
B5h
B6h
B7h
B8h
B9h
BAh
BBh
BCh
BDh
BEh
BFh
C0h
C1h
C2h
C3h
C4h
C5h
C6h
C7h
C8h
C9h
CAh
CBh
CCh
616
620
624
628
632
636
640
644
648
652
656
660
664
668
672
676
680
684
688
692
696
700
704
708
712
716
720
724
728
732
736
740
744
748
752
756
760
764
768
772
776
780
784
788
792
796
800
804
808
812
816
CDh
CEh
CFh
D0h
D1h
D2h
D3h
D4h
D5h
D6h
D7h
D8h
D9h
DAh
DBh
DCh
DDh
DEh
DFh
E0h
E1h
E2h
E3h
E4h
E5h
E6h
E7h
E8h
E9h
EAh
EBh
ECh
EDh
EEh
EFh
F0h
F1h
F2h
F3h
F4h
F5h
F6h
F7h
F8h
F9h
FAh
FBh
FCh
FDh
FEh
FFh
820
824
828
832
836
840
844
848
852
856
860
864
868
872
876
880
884
888
892
896
900
904
908
912
916
920
924
928
932
936
940
944
948
952
956
960
964
968
972
976
980
984
988
992
996
1000
1004
1008
1012
1016
1020
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Volume control (Volume)
Use or unuse of volume control setting by the external VREF input is selectable.
When not using the external VREF input function, the VREF input value becomes null, and it comes to be able to setup volume by
ROM data in each phrase.
When using an external VREF input function, the analog value inputted from VREF is changed into 32 steps of volume preset
values by ADC. Taking in of a VREF value is carried out every about 10ms.
In this case, the volume setup by ROM data becomes null.
And volume setting is as follows.
Setting value
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
Volume [dB]
+2.98
+2.70
+2.40
+2.10
+1.78
+1.45
+1.11
+0.76
+0.39
+0.00
Setting value
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
Volume [dB]
-0.41
-0.83
-1.28
-1.75
-2.25
-2.77
-3.34
-3.94
-4.58
-5.28
-6.04
Setting value
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Volume [dB]
-6.87
-7.79
-8.82
-9.99
-11.34
-12.94
-14.90
-17.44
-21.04
-27.31
OFF
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Mask Option Setting
The following table shows the items which can be set by using the Mask option (ROM data):
During initialization processing after power on, mask option data are transferd automatically to each setting.
The ROM data is created using a Speech LSI Utility.
The Speech LSI Utility is dedicated software.
Function
Setting of the internal
speaker amplifier
Setting of the internal
speaker Gain
Description
Use or unuse of the internal speaker amplifier selectable
SPOFF pin setting
High-impedance input, pull-up input, or pull-down input
selectable
Setting of thermal
detection
Setting of judgement
temperature
Use or unuse of thermal detection selectable
SCK pin setting
“H” input or “L” input of default selectable
SIN pin setting
LSB first or MSB first selectable
Volume control setting
VREF volume function use / unused selectable
+6dB or +12dB selectable
150°C or 125°C or 100°C selectable
Parameter
Speaker Amp control
Use of Speaker Amp
Speaker Amp control
Gain
+6dB
+12dB
Speaker Amp control
SPOFF Pin
Hi-Z
Pull Down
Pull Up
Speaker AMP control
Thermal check ON
Speaker AMP control
Judgement Temperature
150C
125C
100C
SPI setting
Clock polarity
Normal (H Level)
Reversal (L Level)
SPI setting
Data transfer type
LSB first
MSB first
Volume Control
Sets Volume by VREF-pin
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Voice Synthesis Algorithm
Five types of voice synthesis algorithm are supported. They are 4-bit ADPCM2, 8-bit non-linear PCM, 8-bit straight PCM and
16-bit straight PCM. Select the best one according to the characteristics of voice.
The following table shows key features of each algorithm.
Voice synthesis
algorithm
Feature
Algorithm that enables high sound quality and high compression,
which have been achieved by the improved 4-bit ADPCM that
uses variable bit-length coding.
Up version of LAPIS Semiconductor’s specific voice synthesis
algorithm (: 4-bit ADPCM).
Voice quality is improved.
HQ- ADPCM
4-bit ADPCM2
8-bit Nonlinear PCM
Algorithm, which plays back mid-range of waveform as 10-bit
equivalent voice quality.
8-bit PCM
Normal 8-bit PCM algorithm
16-bit PCM
Normal 16-bit PCM algorithm
Memory Allocation and Creating Voice Data
The ROM is partitioned into four data areas: voice (i.e., phrase) control area, test area, voice area, and edit ROM area.
The voice control area manages the voice data in the ROM. It contains data for controlling the start/stop addresses of voice data
for 62 phrases, use/non-use of the edit ROM function and so on.
The test area contains data for testing.
The voice area contains actual waveform data.
The edit ROM area contains data for effective use of voice data. For the details, refer to the section of “Edit ROM Function.”
The edit ROM area is not available if the edit ROM is not used.
The ROM data is created using a dedicated tool.
Configuration of ROM data
0x00000
0x01FFF
0x02000
Prohibition of use area
(Fixed 64 Kbits)
Voice area 2
max.0x0EFFF
max.0x0EFFF
0x0F000
0x0FFFF
0x10000
0x103FF
0x10400
Edit ROM area
Depends on creation
of ROM data.
Test area
Voice control area
(Fixed 8 Kbits)
Voice area 1
0x1FFFF
The one phrase must make 50ms or more length.
Since the data which exceeds 64 K bytes in one phrage cannot be played, please devide the voice phrase to be set to
each below 64 K bytes, and join those data by the edit phrase function.
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Playback Time and Memory Capacity
The playback time depends on the memory capacity, sampling frequency, and the playback method.
The equation to know the playback time is shown below. But this is not applied if the edit ROM function is used.
Playback time [sec] =
1.024 × (Voice area 1 + Voice area 2) [Kbits]
Sampling frequency [kHz] × Bit length
(Bit length is 4 at the 4-bit ADPCM2 and 8/16 at the PCM.)
Example) In the case that the sampling frequency is 8 kHz, algorithm is 4-bit ADPCM2, the playback time is approx. 29.4
seconds, as shown below.
Playback time =
1.024×920 [Kbits]
8 [kHz] × 4 [bits]
≅ 29.4 [sec]
Edit ROM Function
The edit ROM function makes it possible to play back multiple phrases in succession. The following functions are set using the
edit ROM function:
x Continuous playback:
There is no limit to set the number of times of the continuous playback. It depends on the
memory capacity only.
x Silence insertion function:
20ms to 1,024 ms (4ms unit)
Note: Silent insertion time varies for ±1ms by the sampling frequency
It is possible to use voice ROM effectively to use the edit ROM function.
Below is an example of the ROM structure, case of using the edit ROM function.
Example 1) Phrases using the Edit ROM Function
Phrase 2
A
B
D
Phrase 3
A
C
D
Phrase 4
E
B
D
Phrase 5
E
C
D
Phrase 6
A
B
D
Silence
E
C
D
Example 2) Structure of the ROM that contents of Example 1 are stored
Address control area
A
B
C
D
E
Editing area
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Notice of silence insertion function
If it is only silence phrase registered, please put in order three or more silence phrase.
The phrase which is constituted from one or two of silence phrase does not playback.
Example 3) Phrase composition in the case of using silence insertion function
The phrase to playback (The phrase 2 is playbacked twice on both sides of 1 sec silence.)
A
B
D
Phrase 2
A
Silence
B
D
Phrase 2
Phrase 8
1sec silence
Silence
Silence
Silence
336ms
Silence
insertion
336ms
Silence
insertion
328ms
Silence
insertion
1 sec which is constituted by the three silences is registered as the phrase 8.
The ROM consumption when using the edit ROM function
When playing more than one phrases continuously, the ROM consumption is used 64 bits per 1 phrase.
The silence insertion function is used 16 bits every once.
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TERMINATION OF THE VDDL PIN
The VDDL pin is the regulator output that is power supply pin for the internal logic circuits. Connect a capacitor between this pin
and the ground in order to prevent noise generation and power fluctuation.
The recommended capacitance value is shown below. However, it is important to evaluate and decide using the own board.
Also, start the next operation after each output voltage is stabilized.
Pin
Recommended
capacitance value
VDDL
10 µF ±20%
Remarks
The larger the connection capacitance, the longer the settling
time.
POWER SUPPLY WIRING
The power supply of this LSI is divided into the following sections:
• Digital power supply (VDD)
• Analog power supply (SPVDD)
As shown below, supply the same power supply to VDD and SPVDD and separate the analog and digital power supplies by wiring.
Power supply voltage = 3 V
ML22321-xxx
VDD
GND
3V
SPVDD
SPGND
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APPLICATION CIRCUIT
RESET_N
SPOFF
MCU
CSB
SCK
SIN
SCKEN
BUSYB
ERR
SPP
SPM
SPIN
AOUT
SG
0.1uF
TEST
VREF
24pF
4.096MHz
24pF
OSC0
VDD
OSC1
SPVDD
GND
3V
SPGND
VDDL
10uF 0.1uF
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PACKAGE DIMENSIONS
Notes for Mounting the Surface Mount Type Package
The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore,
before you perform reflow mounting, contact ROHM's responsible sales person for the product name, package name, pin number,
package code and desired mounting conditions (reflow method, temperature and times).
The heat resistance (example) of this LSI is shown below. Heat resistance (θJa) changes with the size and the number of layers of
a substrate.
Die pad on the back of a package
partial ground contact area
100%
PCB Layer
JEDEC
（W/L/t＝76.2/114.5/1.6（mm））
4L
Air cooling conditions
Calm（0m/sec）
Heat resistance（θJa）
Power consumption of Chip PMax
at OutputPower 1W (5V)
Power consumption of Chip PMax
at OutputPower 0.5W (3.3V)
45[℃/W]
PCB
0.818[W]
0.283[W]
TjMax of this LSI is 125℃. TjMax is expressed with the following formulas.
TjMax = TaMax + θJa × PMax
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Mounting area for package lead soldering to PCB (reference data) is shown below.
Die pad on the back of a package should connect with the substrate of opening or a GND for heat dissipation.
Mounting area for package lead soldering to PC boards
[unit：mm]
When laying out PC boards, it is important to design the foot pattern so as to give consideration to ease of mounting, bonding,
positioning of parts, reliability, writing, and elimination of solder bridges.
The optimum design for the foot pattern varies with the materials of the substrate, the sort and thickness of used soldering
paste,and the way of soldering. Therefore when laying out the foot pattern on the PC boards, refer to this figure which mean
themounting area that the package leads are allowable for soldering to PC boards.
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REVISION HISTORY
Document
No.
FEDL22321-01
Date
Mar. 23,2015
Page
Previous Current
Edition
Edition
–
–
Description
Final edition 1
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NOTES
1) The information contained herein is subject to change without notice.
2) Although LAPIS Semiconductor is continuously working to improve product reliability and quality, semiconductors can
break down and malfunction due to various factors. Therefore, in order to prevent personal injury or fire arising from failure,
please take safety measures such as complying with the derating characteristics, implementing redundant and fire prevention
designs, and utilizing backups and fail-safe procedures. LAPIS Semiconductor shall have no responsibility for any damages
arising out of the use of our Products beyond the rating specified by LAPIS Semiconductor.
3) Examples of application circuits, circuit constants and any other information contained herein are provided only to illustrate
the standard usage and operations of the Products.The peripheral conditions must be taken into account when designing
circuits for mass production.
4) The technical information specified herein is intended only to show the typical functions of the Products and examples of
application circuits for the Products. No license, expressly or implied, is granted hereby under any intellectual property rights
or other rights of LAPIS Semiconductor or any third party with respect to the information contained in this document;
therefore LAPIS Semiconductor shall have no responsibility whatsoever for any dispute, concerning such rights owned by
third parties, arising out of the use of such technical information.
5) The Products are intended for use in general electronic equipment (i.e. AV/OA devices, communication, consumer systems,
gaming/entertainment sets) as well as the applications indicated in this document.
6) The Products specified in this document are not designed to be radiation tolerant.
7) For use of our Products in applications requiring a high degree of reliability (as exemplified below), please contact and
consult with a LAPIS Semiconductor representative: transportation equipment (i.e. cars, ships, trains), primary
communication equipment, traffic lights, fire/crime prevention, safety equipment, medical systems, servers, solar cells, and
power transmission systems.
8) Do not use our Products in applications requiring extremely high reliability, such as aerospace equipment, nuclear power
control systems, and submarine repeaters.
9) LAPIS Semiconductor shall have no responsibility for any damages or injury arising from non-compliance with the
recommended usage conditions and specifications contained herein.
10) LAPIS Semiconductor has used reasonable care to ensure the accuracy of the information contained in this document.
However, LAPIS Semiconductor does not warrant that such information is error-free and LAPIS Semiconductor shall have no
responsibility for any damages arising from any inaccuracy or misprint of such information.
11) Please use the Products in accordance with any applicable environmental laws and regulations, such as the RoHS Directive.
For more details, including RoHS compatibility, please contact a ROHM sales office. LAPIS Semiconductor shall have no
responsibility for any damages or losses resulting non-compliance with any applicable laws or regulations.
12) When providing our Products and technologies contained in this document to other countries, you must abide by the
procedures and provisions stipulated in all applicable export laws and regulations, including without limitation the US
Export Administration Regulations and the Foreign Exchange and Foreign Trade Act.
13) This document, in part or in whole, may not be reprinted or reproduced without prior consent of LAPIS Semiconductor.
Copyright 2015 LAPIS Semiconductor Co., Ltd.
2-4-8 Shinyokohama, Kouhoku-ku,
Yokohama 222-8575, Japan
http://www.lapis-semi.com/en/
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