PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO General Description Features The AAT2782 provides three independently regulated DC outputs: two step-down (Buck) regulators and a single low input voltage, low drop-out (LDO) regulator. The input voltage range for the step-down regulators is 2.7V to 5.5V, while the LDO regulator allows inputs from 1.5V to 5.5V. The low input voltage LDO regulator allows high efficiency, step-down, low noise outputs. In addition, the LDO input may be connected to step-down outputs 1 or 2. • • • • • • The Channel 1 and 2 step-down regulators can deliver up to 1200mA and 600mA output current, respectively. Step-down output voltages are set with external resistors. Switching frequency is set at 1.3MHz to ensure small external filtering components. Current mode control assures fast transient response and stable operation across the operating range. The Channel 3 LDO regulator can deliver up to 400mA with -80dB power supply rejection ratio (PSRR) and 65µVRMS output noise with an optional bypass capacitor. The LDO output voltage is factory set with a default voltage of 1.20V. Independent enable and input pins are provided. The device consumes low quiescent current and provides high efficiency across the load range for maximum life in battery systems. • • • • • • • • The AAT2782 is available in the Pb-free, 16-pin TDFN34 package and is rated over the -40°C to 85°C operating temperature range. VIN Range Step-Down (Buck): 2.7V to 5.5V VIN Range Low Drop-Out (LDO): 1.5V to 5.5V Output Voltage Range: 0.6V to VIN Step-Down Output Current: ▪ Channel 1: 1200mA ▪ Channel 2: 600mA LDO Output Current: ▪ Channel 3: 400mA High Efficiency with Low RDS(ON) Switches ▪ Step-Down up to 97% ▪ LDO Regulator up to 80% Total Quiescient Current 170µA Shutdown Current: 1µA Step-Down Converters ▪ 1.3MHz Switching Frequency ▪ Current Mode Control ▪ Cycle-by-Cycle Current Limit ▪ High Efficiency Light-Load Mode Operation LDO Converter ▪ Ultra Low Noise with Bypass Capacitor ▪ Over-Current Protection 200µs Internal Soft Start Over-Temperature Protection TDFN34-16 Low Profile Package -40°C to 85°C Temperature Range Applications • • • • • Cellular and SmartPhones Microprocessor / DSP Core / IO Power PDAs and Handheld Computers Portable Media Players Wireless Data Systems Typical Application VIN 2.7V –5.5V L1 1.5µH AAT2782 VOUT1 1.2V, 1.2A LX1 VP1 R5 59.0k EN1 VIN C1 10µF FB1 C4 0.1µF R4 59.0k AGND C8 10µF GND1 VOUT2 1.7V, 0.6A L2 2.2µH LX2 VP2 R3 107k EN2 FB2 R2 59.0k GND2 GND2 VIN3 OUT3 EN3 BYP C5 4.7µF VOUT3 1.2V, 400mA VIN = VOUT2 C7 0.01µF C3 2.2µF AGND C2 10µF EP 2782.2008.05.1.0 www.analogictech.com 1 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Pin Descriptions Pin # Symbol 1 FB2 2 EN3 3 4 5 6 7 VIN AGND BYP EN2 EN1 8 FB1 9 LX1 10 GND1 11 VP1 12 VP2 13 GND2 14 LX2 15 VIN3 16 OUT3 EP Function Feedback input pin for Channel 2. Connect an external resistor divider to this pin to program the output voltage to the desired value. Enable Channel 3 input. Pull logic high to enable LDO Channel 3 converter. Pull logic low to disable. Channel 3 will turn on when EN3 is high and Channel 2 is in regulation. Input voltage pin. Connect this pin to input voltage source. Analog ground pin. Connect to ground plane. LDO bypass pin. Connect a 10nF ceramic capacitor from this pin to ground plane for low output noise. Enable Channel 2 input. Pull logic high to enable step-down Channel 2 converter. Pull logic low to disable. Enable Channel 1 input. Pull logic high to enable step-down Channel 1 converter. Pull logic low to disable. Channel 1 feedback pin internally set to 0.6V. Connect resistor divider and optional feed-forward capacitor to this pin to set the Channel 1 voltage and adjust transient load response (see Table 1). Channel 1 converter switching pin. Connect Channel 1 inductor to this pin. Inductor value is determined by output voltage (see Table 2). Power return pin for output 1 step-down converter. Connect returns of Channel 1 input and output capacitors close to this pin for best noise performance. Input supply voltage pin for Channel 1 step-down converter. Connect the input capacitor close to this pin for best noise performance. Input supply voltage pin for Channel 2 step-down converter. Connect the input capacitor close to this pin for best noise performance. Power return pin for Channel 2 step-down converter. Connect returns of Channel 2 input and output capacitors close to this pin for best noise performance. Channel 2 converter switching pin. Connect output 2 inductor to this pin. Inductor value is determined by output voltage (see Table 2). Input supply voltage pin for output 3 low-noise LDO converter. Connect the input capacitor close to this pin for best noise performance. Channel 3 LDO step-down converter output pin. Connect this pin to a 10µF ceramic capacitor. Exposed pad. Connect to ground as close as possible to the device. Use properly sized vias for thermal coupling to the ground plane. See section on PCB layout guidelines. Pin Configuration TDFN34-16 (Top View) 2 FB2 1 16 OUT3 EN3 2 15 VIN3 VIN 3 14 LX2 AGND 4 13 GND2 BYP 5 12 VP2 EN2 6 11 VP1 EN1 7 10 GND1 FB1 8 9 www.analogictech.com LX1 2782.2008.05.1.0 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Absolute Maximum Ratings1 Symbol VIN VIN3 VOUT3 VLX VFB VEN TJ TLEAD Description VP1, VP2, VIN to GND1, GND2, AGND VIN3 to GND1, GND2, AGND OUT3 to GND1, GND2, AGND LX1, LX2 to GND1, GND2, AGND FB1, FB2, BYP to GND1, GND2, AGND EN1, EN2, EN3 to GND1, GND2, AGND Operating Junction Temperature Range Maximum Soldering Temperature (at leads, 10 sec) Value Units -0.3 to 6.0 -0.3 to VIN -0.3 to VIN3 + 0.3 -0.3 to VIN + 0.3 -0.3 to VIN + 0.3 -0.3 to 6.0 -40 to 150 300 V V V V V V °C °C Value Units 2.0 50 W °C/W Thermal Information Symbol PD ΘJA Description Maximum Power Dissipation Thermal Resistance3 2 1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time. 2. Derate 20mW/°C above 25°C ambient temperature. 3. Mounted on an FR4 board with exposed paddle connected to ground plane. 2782.2008.05.1.0 www.analogictech.com 3 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Electrical Characteristics1 VP1 = VP2 = VIN = VIN3 = 3.3V; VIN3 = 1.8V, TA = -40°C to 85°C, unless noted otherwise. Typical values are at TA = 25°C. Symbol General VIN VUVLO IQ ISHDN Description Input Voltage UVLO Threshold VIL Quiescent Current Shutdown Current Over Temperature Shutdown Threshold Over Temperature Shutdown Hysteresis Enable Threshold Low VIH Enable Threshold High TSD THYS Conditions Min Typ 2.7 VP1 Rising VP1 Hysteresis VP1 Falling No load; EN1 = EN2 = EN3 = VIN EN1 = EN2 =EN3 = GND For EN1, EN2, and EN3 Units 5.5 2.7 V V mV V µA µA 140 2.1 300 1.0 130 °C 20 °C For EN1, EN2, and EN3 IEN Enable Input Current VIN = VP1 = VP2 = VEN1 = VEN2 = VEN3 = 5.5V Channel 1: 1200mA Step-down (Buck) Converter VP1 Input Voltage VOUT1 Output Voltage Range VOUT1(TOL) Output Voltage Tolerance IOUT1 = 0 to 1200mA; VP1 = 2.7 to 5.5V VFB1 Feedback Pin Voltage ΔVLOADREG1 Load Regulation IOUT1 = 0 to 1200mA ΔVLINEREG1 Line Regulation VP1 = 2.7 to 5.5V IQ1 Quiescent Current No load; EN1 = VIN; EN2 = EN3 = GND P-Channel Current Limit ILIM1 RDS(ON)H1 High Side Switch On-Resistance RDS(ON)L1 Low Side Switch On-Resistance FOSC1 Oscillator Frequency TS1 Start-Up Time From Enable to Output Regulation Max 0.6 V -1.0 1.0 μA 2.7 0.6 -3.0 0.591 5.5 VP1 3.0 0.609 V V % V % % µA A mΩ mΩ MHz µs 1.4 V 0.6 0.2 0.3 75 1.7 250 190 1.3 200 1. The AAT2782 is guaranteed to meet performance specifications over the –40°C to +85°C operating temperature range and is assured by design, characterization and correlation with statistical process controls. 4 www.analogictech.com 2782.2008.05.1.0 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Electrical Characteristics1 VP1 = VP2 = VIN = VIN3 = 3.3V; VIN3 = 1.8V, TA = -40°C to 85°C, unless noted otherwise. Typical values are at TA = 25°C. Symbol Description Channel 2: VP2 VOUT2 VOUT2(TOL) VFB2 ΔVLOADREG2 ΔVLINEREG2 IQ2 ILIM2 RDS(ON)H2 RDS(ON)L2 FOSC2 TS2 Channel 3: VIN3 600mA Step-down (Buck) Converter Input Voltage Output Voltage Range Output Voltage Tolerance IOUT2= 0 to 600mA; VP1 = 2.7 to 5.5V Feedback Pin Voltage Load Regulation IOUT2 = 0 to 600mA Line Regulation VP2 = 2.7 to 5.5V Quiescent Current No Load; EN2 = VIN; EN1 = EN3 = GND P-Channel Current Limit High Side Switch On-Resistance Low Side Switch On-Resistance Oscillator Frequency Start-Up Time From Enable to Output Regulation 400mA Low Dropout (LDO) Converter Input Voltage IOUT3 = 150mA; VOUT3 > 1.20V Dropout Voltage IOUT3 = 400mA; VOUT3 > 1.20V LDO Output Voltage Tolerance VIN3 = VOUT3 + VDO3 to 5.5V; IOUT3 = 0mA to 400mA Max Output Current VOUT3 = 1.2V Short-Circuit Current VOUT3 < 0.4V Quiescent Current No Load; EN1 = EN2 = GND; EN3 = VIN Start-Up Time From Enable to Output Regulation 10Hz, IOUT3 = 10mA 3kHz, IOUT3 = 10mA Power Supply Rejection Ratio 30kHz, IOUT3 = 10mA 300kHz, IOUT3 = 10mA Output Noise BW = 100Hz to 300kHz, CBYP = 10nF, IOUT3 = 10mA VDO3 VOUT3 IOUT3 ISC IQ TS PSRR eN Conditions Min 2.7 0.6 -3.0 0.591 Typ 0.6 0.5 0.3 75 1.7 250 190 1.3 200 1.7 1.164 400 140 300 1.200 1.1 85 200 85 80 60 55 65 Max Units 5.5 VP2 3.0 0.609 V V % V % % µA A mΩ mΩ MHz µs VIN V mV 1.236 V mA A µA µs dB dB dB dB µVRMS 1. The AAT2782 is guaranteed to meet performance specifications over the –40°C to +85°C operating temperature range and is assured by design, characterization and correlation with statistical process controls. 2782.2008.05.1.0 www.analogictech.com 5 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Typical Characteristics Step-Down Converters and LDO Input Current vs. Input Voltage Step-Down Converter Switching Frequency vs. Temperature Switching Frequency (MHz) (VEN1 = VEN2 = VEN3 = VIN) Input Current (µA) 220 210 200 190 180 170 85°C 25°C -40°C 160 150 140 2.5 3 3.5 4 4.5 5 5.5 (VIN = 3.3V; IOUT1 = 1.2A; IOUT2 = 0.6A) 1.31 1.30 1.29 1.28 1.27 VOUT2 = 1.7V VOUT1 = 1.2V 1.26 1.25 6 Input Voltage (V) -40 -20 0 20 40 60 80 100 Temperature (°C) Step-Down Converter Switching Frequency vs. Input Voltage Frequency Variation (%) (IOUT1 = 1.2A; IOUT2 = 0.6A) 3 2 1 0 -1 VOUT2 = 1.7V VOUT1 = 1.2V -2 -3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 Input Voltage (V) 6 www.analogictech.com 2782.2008.05.1.0 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Typical Characteristics—Buck Converter 1 Step-Down Converter 1 Efficiency vs. Load Step-Down Converter 1 DC Regulation (VOUT1 = 1.2V; VIN = 2.7V to 5.5V; L = 1.7µH) (VOUT1 = 1.2V; VIN = 2.7 to 5.5V; L = 1.7µH) 0.5 100 VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5.0V VIN = 5.5V 80 Output Error (%) Efficiency (%) 90 70 60 VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5.0V VIN = 5.5V 50 40 30 20 1 10 100 1000 0.0 -0.3 10 0.1 0.3 10000 -0.5 0.1 1 10 Output Current (mA) 10000 (VEN1 = VIN; VEN2 = VEN3 = 0V) (VEN1 = VIN; VEN2 = 0V; VEN3 = 0V) 110 Input Current (µA) 1.0 VIH and VIL (V) 1000 Step-Down Converter 1 Input Current vs. Input Voltage Step-Down Converter 1 VIH and VIL vs. Input Voltage VIH 0.9 VIL 0.8 0.7 0.6 2.5 3.0 3.5 4.0 4.5 5.0 5.5 100 90 80 60 2.5 6.0 85°C 25°C -40°C 70 3 3.5 Step-Down Converter 1 Line Regulation (VOUT1 = 1.2V; IOUT1 = 0.1mA to 1A; L = 1.7µH) 4.5 5 5.5 6 Step-Down Converter Output 1 Voltage Error vs. Temperature (VIN = 3.3V; VOUT1 = 1.2V; IOUT1 = 1.2A) 0.5 0.3 0.2 Output Voltage Error (%) IOUT1 = 0.10mA IOUT1 = 10mA IOUT1 = 100mA IOUT1 = 1200mA 0.4 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 2.5 4 Input Voltage (V) Input Voltage (V) Accuracy (%) 100 Output Current (mA) 3.0 3.5 4.0 4.5 5.0 5.5 1.00 0.75 0.50 0.25 0.00 -0.25 -0.50 -0.75 -1.00 -50 Input Voltage (V) 2782.2008.05.1.0 -25 0 25 50 75 100 Temperature (°C) www.analogictech.com 7 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Step-Down Converter 1 Output Ripple (VIN = 3.3V; VOUT1 = 1.2V; IOUT1 = 1.2A) (VIN = 3.3V; VOUT1 = 1.2V; IOUT1 = 1mA) 1.22 1.18 1.4 1.2 1.0 0.8 1.22 1.20 1.18 0.2 Inductor Current (bottom) (A) 1.20 Output Voltage (AC coupled) (top) (V) Step-Down Converter 1 Output Ripple Inductor Current (bottom) (A) Output Voltage (AC coupled) (top) (V) Typical Characteristics—Buck Converter 1 0.0 Time (500ns/div) Time (10µs/div) (IOUT1 = 0.9A to 1.2A; VIN = 3.3V; VOUT1 = 1.2V; COUT1 = 10µF; CFF = 100pF) 5 3 2 1.4 1.3 1.2 Output Voltage (bottom) (V) Input Voltage (top) (V) 4 1.1 1.0 Output Voltage (AC coupled) (bottom) (V) Step-Down Converter 1 Load Transient Response (VIN = 3V to 4V; VOUT1 = 1.2V; IOUT1 = 1.2A; COUT = 10µF) Time (100µs/div) 1.2A 1.5 0.9A 1.2A 0.9A 1.0 0.5 1.25 1.20 1.15 Inductor Current (top) (A) Output Current (middle) (A) Step-Down Converter 1 Line Transient Response Time (100µs/div) Step-Down Converter 1 Soft Start 4 3 2 1 0 1.0 0.5 0.0 Inductor Current (bottom) (A) Enable Voltage (top) (V) Output Voltage (middle) (V) (VIN = 3.3V; VOUT1 = 1.2V; IOUT1 = 1.2A; CFF = 100pF) Time (50µs/div) 8 www.analogictech.com 2782.2008.05.1.0 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Typical Characteristics—Buck Converter 2 Step-Down Converter 2 Efficiency vs. Load Step-Down Converter 2 DC Regulation (VOUT2 = 1.7V; VIN = 2.7V to 5.5V; L = 2.2µH) (VOUT2 = 1.7V; VIN = 2.7V to 5.5V; L = 2.2µH) 100 0.5 VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5.0V VIN = 5.5V 80 Output Error (%) Efficiency (%) 90 70 60 VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5.0V VIN = 5.5V 50 40 30 20 1 10 100 1000 0.0 -0.3 -0.5 0.1 10 0.1 0.3 10000 1 10 Output Current (mA) 10000 (VEN1 = 0V; VEN2 = VIN; VEN3 = 0V) (VEN1 = 0V; VEN2 = VIN; VEN3 = 0V) 110 Input Current (µA) 1.0 VIH and VIL (V) 1000 Step-Down Converter 2 Input Current vs. Input Voltage Step-Down Converter 2 VIH and VIL vs. Input Voltage VIH 0.9 0.8 VIL 0.7 2.5 3.0 3.5 4.0 4.5 5.0 5.5 100 90 80 85°C 25°C -40°C 70 60 2.5 0.6 6.0 3 3.5 4 4.5 5 5.5 6 Input Voltage (V) Input Voltage (V) Step-Down Converter Output 2 Voltage Error vs. Temperature Step-Down Converter 2 Line Regulation (VOUT2 = 1.7V; IOUT2 = 0.1mA to 600mA; L = 2.2µH) (VIN = 3.3V; VOUT2 = 1.7V; IOUT2 = 600mA) 0.5 1.00 IOUT2 = 0.10mA IOUT2 = 10mA IOUT2 = 100mA IOUT2 = 600mA 0.4 0.75 0.3 Accuracy (%) Output Voltage Error (%) 100 Output Current (mA) 0.50 0.25 0.00 -0.25 -0.50 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.75 -0.4 -1.00 -50 -25 0 25 50 75 100 -0.5 2.5 Temperature (°C) 2782.2008.05.1.0 3.0 3.5 4.0 4.5 5.0 5.5 Input Voltage (V) www.analogictech.com 9 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Step-Down Converter 2 Output Ripple (VIN = 3.3V; VOUT2 = 1.7V; IOUT2 = 600mA) (VIN = 3.3V; VOUT2 = 1.7V; IOUT2 = 1mA) 1.70 1.69 0.8 0.6 0.4 1.71 1.70 1.69 0.2 Inductor Current (bottom) (A) 1.71 Output Voltage (AC coupled) (top) (V) Step-Down Converter 2 Output Ripple Inductor Current (bottom) (A) Output Voltage (AC coupled) (top) (V) Typical Characteristics—Buck Converter 2 0.0 Time (500ns/div) Time (10µs/div) (IOUT2 = 0.45A to 0.6A; VIN = 3.3V; VOUT2 = 1.7V; COUT2 = 4.7µF; CFF = 100pF) 5 3 2 1.9 1.8 1.7 Output Voltage (bottom) (A) Input Voltage (top) (V) 4 1.6 Output Voltage (AC coupled) (bottom) (V) Step-Down Converter 2 Load Transient Response (VIN = 3V to 4V; VOUT2 = 1.7V; IOUT2 = 0.6A; COUT2 = 10µF) 0.6A 0.45A 0.8 0.6A 0.6 0.4 0.45A 1.75 1.70 1.65 Time (100µs/div) Inductor Current (top) (A) Output Current (middle) (A) Step-Down Converter 2 Line Transient Response Time (100µs/div) Step-Down Converter 2 Soft Start 4 3 2 1 0 1.0 0.5 0.0 Inductor Current (bottom) (A) Enable Voltage (top) (V) Output Voltage (middle) (V) (VIN = 3.3V; VOUT2 = 1.7V; IOUT2 = 600mA; CFF = 100pF) Time (50µs/div) 10 www.analogictech.com 2782.2008.05.1.0 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Typical Characteristics—LDO LDO Line Regulation LDO VIH and VIL vs. Input Voltage (VIN3 = VOUT2 = 1.7V; VOUT3 = 1.2V; Vary VIN) (VEN1 = 0V; VEN2 = VEN3 = VIN) 0.5 1.0 0.4 Accuracy (%) VIH and VIL (V) IOUT = 0.1mA to 400mA 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 VIH 0.9 VIL 0.8 0.7 -0.4 -0.5 2.5 3.0 3.5 4.0 4.5 5.0 0.6 5.5 2.5 3.0 3.5 4.5 5.0 5.5 6.0 LDO Dropout Characteristics LDO Dropout Characteristics (VIN = 3.3V; Vary VIN3 from 3.3V to 1V; VOUT3 = 1.2V; IOUT3 = 0.1mA to 400mA; -40°C) (VIN = 3.3V; VIN3 = 3.3V to 1V; VOUT3 = 1.2V; IOUT3 = 0.1mA to 400mA; 85°C) 1.210 1.205 1.200 IOUT3 = 1mA IOUT3 = 10mA IOUT3 = 50mA IOUT3 = 100mA IOUT3 = 150mA IOUT3 = 300mA IOUT3 = 400mA 1.195 1.190 1.185 1.180 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 1.210 1.205 1.200 1.190 1.185 1.180 1.0 3.4 IOUT3 = 0.1mA IOUT3 = 10mA IOUT3 = 50mA IOUT3 = 100mA IOUT3 = 150mA IOUT3 = 300mA IOUT3 = 400mA 1.195 1.2 1.4 Input Voltage (V) 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 LDO Load Transient Response (200mA to 400A; VIN = 3.3V; VIN3 = VOUT2 = 1.7V) LDO Output Voltage (top) (V) LDO Dropout Characteristics (VIN = 3.3V; VIN3 = 3.3V to 1V; VOUT3 = 1.2V; IOUT3 = 0.1mA to 400mA; 25°C) 1.210 1.205 1.200 IOUT3 = 0.1mA IOUT3 = 10mA IOUT3 = 50mA IOUT3 = 100mA IOUT3 = 150mA IOUT3 = 300mA IOUT3 = 400mA 1.195 1.190 1.185 1.180 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 1.25 1.20 1.15 400mA 200mA 0.6 0.4 0.2 0.0 3.4 Time (50µs/div) Input Voltage (V) 2782.2008.05.1.0 3.4 Input Voltage (V) LDO Output Current (bottom) (A) LDO Output Voltage (V) 4.0 Input Voltage (V) LDO Output Voltage (V) LDO Output Voltage (V) Input Voltage (V) www.analogictech.com 11 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Typical Characteristics—LDO LDO Output Voltage Noise LDO Power Supply Rejection Ratio, PSRR (IOUT3 = 10mA; Power BW: 100~300KHz) (IOUT3 = 10mA; BW: 100~300KHz) 80 4.9 70 Magnitude (dB) Noise (µV) 90 5.6 4.2 3.5 2.8 2.1 1.4 0.7 0.0 100 60 50 40 30 20 1000 10000 100000 1000000 0 10 100 1000 10000 100000 Frequency (Hz) Frequency (Hz) 12 VIN3 = 3.3V VIN3 = 1.7V 10 www.analogictech.com 2782.2008.05.1.0 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Functional Block Diagram VP1 VIN Comp. FB1 Error Amp Logic LX1 Control Logic EN1 GND1 OT OSC VP2 Comp. FB2 Error Amp Logic LX2 Control Logic EN2 GND2 Voltage Ref VIN3 OUT3 OCP Error Amp OUT3 Logic BYP Voltage Ref AGND EN3 2782.2008.05.1.0 Control Logic www.analogictech.com 13 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Functional Description The AAT2782 is a 3-channel high performance power management IC. Channel 1 is a 1200mA step-down converter. Channel 2 is a 600mA step-down converter. Channel 3 is a 400mA LDO regulator with low-input voltage capability and low output noise for sensitive analog applications. The low input voltage capability of the LDO regulator allows the step-down converter to be tied directly to the LDO input. This configuration provides the efficiency benefits of a switching converter plus the low noise benefits of a LDO (low drop-out) regulator. Channel 1 and 2: 1200/600mA Step-Down (Buck) Converters The AAT2782 Channel 1 and 2 step-down converters are peak current mode PWM converters operating at 1.3MHz frequency. The input voltage range is 2.7V to 5.5V. The output voltage range is 0.6V to VIN and is adjustable with an external resistor divider. The converters provide internal compensation. Power devices are sized for 1A output current while maintaining over 85% efficiency at full load. Peak efficiency is above 95%. Light load efficiency is maintained at greater than 80% down to 85% of full load current. Channel 2 has excellent transient response and load and line regulation. Transient response time is typically less than 20µs. The enable inputs, when pulled low, force the converter into a low power non-switching state consuming less than 1µA of current. For overload conditions, the peak input current is limited. Also, thermal protection completely disables switching if internal dissipation becomes excessive, thus protecting the device from damage. The junction overtemperature threshold is 130°C with 20°C of hysteresis. Under-voltage lockout (UVLO) guarantees sufficient VIN bias and proper operation of all internal circuits prior to activation. Control Loop The AAT2782 is a peak current mode step-down converter. The current through the P-channel MOSFET (high side) is sensed for current loop control, as well as shortcircuit and overload protection. A fixed slope compensa- 14 tion signal is added to the sensed current to maintain stability for duty cycles greater than 50%. The peak current mode loop appears as a voltage-programmed current source in parallel with the output capacitor. The output of the voltage error amplifier programs the current mode loop for the necessary peak switch current to force a constant output voltage for all load and line conditions. Internal loop compensation terminates the transconductance voltage error amplifier output. The reference voltage is internally set to program the converter output voltage greater than or equal to 0.6V. Soft Start/Enable Soft start limits the current surge seen at the input and eliminates output voltage overshoot. When pulled low, the enable input forces the AAT2782 into a low-power, non-switching state. The total input current during shutdown is less than 1µA. Low Dropout Operation For conditions where the input voltage drops to the output voltage level, the converter duty cycle increases to 100%. As the converter approaches the 100% duty cycle, the minimum off-time initially forces the high side on-time to exceed the 1.3MHz clock cycle and reduces the effective switching frequency. Once the input drops below the level where the converter can regulate the output, the high side P-channel MOSFET is enabled continuously for 100% duty cycle. At 100% duty cycle the output voltage tracks the input voltage minus the I*R drop of the high side P-channel MOSFET. Current Limit and Over-Temperature Protection For overload conditions, the peak input current is limited. To minimize power dissipation and stresses under current limit and short-circuit conditions, switching is terminated after entering current limit for a series of pulses. Switching is terminated for seven consecutive clock cycles after a current limit has been sensed for a series of four consecutive clock cycles. Thermal protection completely disables switching when internal dissipation becomes excessive. The junction over-temperature threshold is 130°C with 20°C of hysteresis. Once an over-temperature or over-current fault conditions is removed, the output voltage automatically recovers. www.analogictech.com 2782.2008.05.1.0 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Under-Voltage Lockout L= Internal bias of all circuits is controlled via the VIN input. Under-voltage lockout (UVLO) guarantees sufficient VIN bias and proper operation of all internal circuitry prior to activation. Component Selection Inductor Selection—Channel 1 The step-down converter uses peak current mode control with slope compensation to maintain stability for duty cycles greater than 50%. The output inductor value must be selected so the inductor current down slope meets the internal slope compensation requirements. The inductor should be set equal to the output voltage numeric value in µH. This guarantees that there is sufficient internal slope compensation. Manufacturer’s specifications list both the inductor DC current rating, which is a thermal limitation, and the peak current rating, which is determined by the saturation characteristics. The inductor should not show any appreciable saturation under normal load conditions. Some inductors may meet the peak and average current ratings yet result in excessive losses due to a high DCR. Always consider the losses associated with the DCR and its effect on the total converter efficiency when selecting an inductor. For Channel 1, the 1.5µH LQH32PN1R5NN0L series Murata inductor has a 57mΩ worst case DCR and a 1.75A DC current rating. At full 1.2A load, the inductor DC loss is 128mW which gives 9% loss in efficiency for a 1.2A, 1.2V output. 0.75 · VO 0.75 · VO = m A 0.6 µs = 1.2 µs · VO A µs 1.7V = 2.0µH A In this case a standard 2.2µH value is selected. Manufacturer’s specifications list both the inductor DC current rating, which is a thermal limitation, and the peak current rating, which is determined by the inductor’s saturation characteristics. The inductor should not show any appreciable saturation under all normal load conditions. Some inductors may meet the peak and average current ratings yet result in excessive losses due to a high DCR. Always consider the losses associated with the DCR and its effect on the total converter efficiency when selecting an inductor. For Channel 2, the 2.2µH NLCV32T-2R2M series TDK inductor has a 130mΩ worst case DCR and a 770mA DC current rating. At full 600mA load, the inductor DC loss is 47mW which gives less than 3% loss in efficiency for a 600mA, 3.3V output. Input Capacitor Select a 10µF to 22µF X7R or X5R ceramic capacitor for the VP1 and VP2 inputs. To estimate the required input capacitor size, determine the acceptable input ripple level (VPP) and solve for C. The calculated value varies with input voltage and is a maximum when VIN is double the output voltage. Inductor Selection—Channel 2 The step-down converter uses peak current mode control with slope compensation to maintain stability for duty cycles greater than 50%. The output inductor value must be selected so the inductor current down slope meets the internal slope compensation requirements. The internal slope compensation for the adjustable and low voltage fixed versions of the AAT2782 is 0.6A/µs. This equates to a slope compensation that is 75% of the inductor current down slope for a 1.8V output and 2.2µH inductor. m= 1.2 CIN = V VO · 1- O VIN VIN VPP - ESR · FOSC IO VO ⎛ V ⎞ 1 · 1 - O = for VIN = 2 · VO VIN ⎝ VIN ⎠ 4 CIN(MIN) = 1 VPP - ESR · 4 · FOSC IO 0.75 ⋅ VO 0.75 ⋅ 1.8V A = = 0.6 L 2.2µH µs 2782.2008.05.1.0 www.analogictech.com 15 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Always examine the ceramic capacitor DC voltage coefficient characteristics when selecting the proper value. For example, the capacitance of a 10µF, 6.3V, X5R ceramic capacitor with 5.0V DC applied is actually about 6µF. The maximum input capacitor RMS current is: IRMS = IO · VO ⎛ V ⎞ · 1- O VIN ⎝ VIN ⎠ The input capacitor RMS ripple current varies with the input and output voltage and will always be less than or equal to half of the total DC load current. VO ⎛ V ⎞ · 1- O = VIN ⎝ VIN ⎠ D · (1 - D) = 0.52 = 1 2 for VIN = 2 · VO IRMS(MAX) = IO 2 not affect the converter performance, a high ESR tantalum or aluminum electrolytic should be placed in parallel with the low ESR/ESL bypass ceramic capacitor. This dampens the high Q network and stabilizes the system. Output Capacitor—Channel 1 The output capacitor limits the output ripple and provides holdup during large load transitions. A 10µF to 22µF X5R or X7R ceramic capacitor typically provides sufficient bulk capacitance to stabilize the output during large load transitions and has the ESR and ESL characteristics necessary for low output ripple. The output voltage droop due to a load transient is dominated by the capacitance of the ceramic output capacitor. During a step increase in load current, the ceramic output capacitor alone supplies the load current until the loop responds. Within two or three switching cycles, the loop responds and the inductor current increases to match the load current demand. The relationship of the output voltage droop during the three switching cycles to the output capacitance can be estimated by: COUT = VO ⎛ V ⎞ · 1- O VIN ⎝ VIN ⎠ The term appears in both the input voltage ripple and input capacitor RMS current equations and is a maximum when VO is twice VIN. This is why the input voltage ripple and the input capacitor RMS current ripple are a maximum at 50% duty cycle. The input capacitor provides a low impedance loop for the edges of pulsed current drawn by the AAT2782. Low ESR/ESL X7R and X5R ceramic capacitors are ideal for this function. To minimize stray inductance, the capacitor should be placed as closely as possible to the IC. This keeps the high frequency content of the input current localized, minimizing EMI and input voltage ripple. The proper placement of the input capacitor (C1) can be seen in the evaluation board layout in the Layout section of this datasheet (see Figure 2). A laboratory test set-up typically consists of two long wires running from the bench power supply to the evaluation board input voltage pins. The inductance of these wires, along with the low-ESR ceramic input capacitor, can create a high Q network that may affect converter performance. This problem often becomes apparent in the form of excessive ringing in the output voltage during load transients. Errors in the loop phase and gain measurements can also result. Since the inductance of a short PCB trace feeding the input voltage is significantly lower than the power leads from the bench power supply, most applications do not exhibit this problem. In applications where the input power source lead inductance cannot be reduced to a level that does 16 3 · ∆ILOAD VDROOP · FOSC Once the average inductor current increases to the DC load level, the output voltage recovers. The above equation establishes a limit on the minimum value for the output capacitor with respect to load transients. The internal voltage loop compensation also limits the minimum output capacitor value to 10µF. This is due to its effect on the loop crossover frequency (bandwidth), phase margin, and gain margin. Increased output capacitance will reduce the crossover frequency with greater phase margin. Output Capacitor—Channel 2 The output capacitor limits the output ripple and limits droop during large load transitions. A 4.7µF to 10µF X5R or X7R ceramic capacitor typically provides sufficient bulk capacitance to stabilize the output during large load transitions and has the ESR and ESL characteristics necessary for low output ripple. Adjustable Output Resistor Selection The output voltages on the two AAT2782 buck converters are programmed with external feedback resistors R3, R5 and R2, R4. To limit the bias current required for the external feedback resistor string while maintaining good noise immunity, the minimum suggested value for R2, R4 is 59kΩ. Although a larger value will further www.analogictech.com 2782.2008.05.1.0 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO reduce quiescent current, it will also increase the impedance of the feedback node, making it more sensitive to external noise and interference. Table 1 summarizes the resistor values for various output voltages with R2, R4 set to either 59kΩ for good noise immunity or 221kΩ for reduced no load input current. VOUT = 0.6V · 1 + R3, R5 R2, R4 VOUT (V) R2, R4 = 59kΩ R3, R5 (kΩ) R2, R4 = 221kΩ R3, R5 (kΩ) 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.8 1.85 2.0 2.5 3.3 19.6 29.4 39.2 49.9 59.0 68.1 78.7 88.7 118 124 137 187 267 75 113 150 187 221 261 301 332 442 464 523 715 1000 Table 1: AAT2782 Resistor Values for Various Output Voltages. Channel 3: 400mA Low Dropout (LDO) Converter The Channel 3 LDO converter can operate independently or can be used to post-regulate one of the step-down buck converters and provide a quiet output voltage. The input voltage can be as low as 1.7V for an output voltage of 1.2V; 2.5V, 2.8V, and 3.3V versions are also available. The output current is 400mA. If the channel 2 buck converter efficiency at full load is 85% and the LDO efficiency is 70%, the combined post-regulated efficiency would be ∼60%. If the LDO is used to post-regulate from a buck, then EN3 should be brought high after the buck comes into regulation. Component Selection Input Capacitor Typically, a 10µF or larger capacitor is required for CIN in most applications and capacitance value of greater than or equal to the value of the output capacitor is recom- 2782.2008.05.1.0 mended. A CIN capacitor is required for basic LDO regulator operation. If the AAT2782 is physically located more than three centimeters from an input power source, a CIN capacitor will be needed for stable operation. CIN should be located as closely to the device VIN3 pin as practically possible. CIN values greater than 10µF will offer superior input line transient response and will assist in maximizing the highest possible power supply ripple rejection. Ceramic, tantalum, or aluminum electrolytic capacitors may be selected for CIN. There is no specific capacitor ESR requirement for CIN. However, for 400mA LDO regulator output operation, ceramic capacitors are recommended for CIN due to their inherent capability over tantalum capacitors to withstand input current surges from low impedance sources such as batteries in portable devices. Care should also be taken when choosing the voltage rating for the capacitors. A 6.3V rated capacitor should not be used to bypass a 5V input. In such cases, a 10V rated capacitor should be used. Output Capacitor For proper load voltage regulation and operational stability, a capacitor is required between pins VOUT3 and GND. The COUT3 capacitor connection to the LDO regulator ground pin should be made as direct as practically possible for maximum device performance. The AAT2782 has been specifically designed to function with very low ESR ceramic capacitors. For best performance, ceramic capacitors are recommended. Typical output capacitor values for maximum output current conditions range from 4.7µF to 10µF. Applications utilizing the exceptionally low output noise and optimum power supply ripple rejection characteristics of the AAT2782 should use 10µF or greater for COUT3. If desired, COUT3 may be increased without limit. Thermal Calculations There are three types of losses associated with the AAT2782 step-down converters: switching losses, conduction losses, and quiescent current losses. Conduction losses are associated with the RDS(ON) characteristics of the power output switching devices. Switching losses are dominated by the gate charge of the power output switching devices. At full load, assuming continuous conduction mode (CCM), a simplified form of the losses for each step-down is given by: PTOTAL(Step-down) = www.analogictech.com IO2 · (RDS(ON)H · VO + RDS(ON)L · [VIN - VO]) VIN + [(tsw · FOSC · IOUT + IQ) · VIN] 17 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO IQ is the step-down converter quiescent current. The term tsw is used to estimate the full load step-down converter switching losses. For the condition where the step-down converter is in dropout at 100% duty cycle, the total device dissipation reduces to: Layout The suggested PCB layout for the AAT2782 is shown in Figures 2 and 3. The following guidelines should be used to help ensure a proper layout. 1. 2 O PTOTAL(Step-down) = I · RDSON(H) + IQ · VIN Since RDS(ON), quiescent current, and switching losses all vary with input voltage, the total losses should be investigated over the complete input voltage range. The AAT2782 LDO is designed to deliver a continuous output load current up to 400mA under normal operating conditions. The limiting characteristic for the maximum output load safe operating area is essentially package power dissipation and the internal preset thermal limit of the device. In order to obtain high operating currents, careful device layout and circuit operating conditions must be taken into account. This calculation accounts for the total power dissipation of the LDO regulator, including that caused by ground current. 2. 3. 4. 5. PTOTAL(LDO) = (VIN3 - VOUT3)IOUT3 + (VIN3 - IQ3) 6. Add the total losses of the two step-down converters and the LDO to determine the max junctions temperature. The maximum junction temperature can be derived from the ΘJA for the TDFN34-16 which is 50°C/W. 7. The power input capacitors (C6) should be connected as closely as possible to VP1 and VP2, The LDO input capacitor (C3) should be close to VIN3 as shown in Figure 2. Due to the pin placement of VP1, VP2 and VIN3 for all converters, proper decoupling is not possible with just one input capacitor. C4 is a bypass capacitor for the VIN supply pin for the device. C8 and L1, C5 and L2 should be connected as closely as possible. The connection of L1 and L2 to the LX1 and LX2 pins should be as short as possible. The feedback trace or FB pin should be separate from any power trace and connect as closely as possible to the load point. Sensing along a high-current load trace will degrade DC load regulation. The resistance of the trace from the load returns to GND1, GND2, and AGND should be kept to a minimum. This will help to minimize any error in DC regulation due to differences in the potential of the internal signal ground and the power ground. Connect unused signal pins to ground to avoid unwanted noise coupling. For good thermal coupling, PCB vias are required from the pad for the TDFN paddle to the ground plane. The via diameter should be 0.3mm to 0.33mm and positioned on a 1.2mm grid. TJ(MAX) = PTOTAL · ΘJA + TAMB 18 www.analogictech.com 2782.2008.05.1.0 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO AAT2782 Schematic VCC C2 C1 P1 N.A. R2 2 VCC EN3 1 1 3 EN3 2 VCC C4 3 VCC 3 0.1µF 4 1 EN2 2 C7 5 3 0.01µF EN2 4 6 VCC 1 EN1 2 1 AAT2782 U1 1 2 10µF FB2 OUT3 EN3 VIN3 VIN LX2 AGND R1 0 VOUT3 [email protected] R3 107K 59K C3 10µF 10V GND2 P3 C5 GND P4 C6 10 LX1 2.2µH 12 11 FB1 L2 1.7V@ 0.6A VOUT2 P2 4.7µF VP1 GND1 VOUT2 13 EN2 EN1 3 14 VP2 8 VOUT1 15 BYP 7 1 2 16 P5 10µF VCC 9 EP C8 L1 1.5µH 3 EN1 10µF P6 [email protected] R4 59K GND VOUT1 R5 59K C9 N.A. Symbol Part Number U1 AAT2782 NLCV32T-2R2M 744028002 LQM2HPN2R2MG0 LQH32PN1R5NN0L L2 L1 C2, C6, C8 C3 C5 C9 R2-R6 2782.2008.05.1.0 Description AnalogicTech AAT2782 Two Buck, One LDO 3x4 TDFN TDK 2.2µH Chip Inductor, ISAT = 770mA, 3.2x2.5x2.2mm Wurth 2.2µH Inductor, ISAT = 1A, 2.8x2.8x1.1mm Murata 2.2µH Inductor, ISAT = 1.3A, 2.5x2.0x0.9mm Murata 1.5µH Inductor, ISAT = 1.75A, 3.2x2.5x1.7mm Generic, MLC, 0603, 10µF/6.3V Cap Generic, MLC, 0603, 10µF/10V Cap Generic, MLC, 0603, 4.7µF/6.3V Cap Generic, MLC, 0402, 56pF/50V Generic, 0402 Resistors www.analogictech.com Quantity 1 1 1 3 1 1 1 6 19 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Figure 2: AAT2782 Evaluation Board Component Side Layout. Figure 3: AAT2782 Evaluation Board Solder Side Layout. 20 www.analogictech.com 2782.2008.05.1.0 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Ordering Information Voltage Package Channel 1 Channel 2 Channel 3 Marking1 Part Number (Tape and Reel)2 TDFN34-16 0.6 0.6 1.2 3ZXYY AAT2782IRN-AAE-T1 All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means semiconductor products that are in compliance with current RoHS standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more information, please visit our website at http://www.analogictech.com/about/quality.aspx. Legend Voltage Code Adjustable (0.6) 1.2 A E Package Information TDFN34-16 3.000 ± 0.050 1.600 ± 0.050 Detail "A" 3.300 ± 0.050 4.000 ± 0.050 Index Area 0.350 ± 0.100 Top View 0.230 ± 0.050 Bottom View C0.3 (4x) 0.050 ± 0.050 0.450 ± 0.050 0.850 MAX Pin 1 Indicator (optional) 0.229 ± 0.051 Side View Detail "A" All dimensions in millimeters. 1. XYY = assembly and date code. 2. Sample stock is generally held on part numbers listed in BOLD. 3. The leadless package family, which includes QFN, TQFN, DFN, TDFN and STDFN, has exposed copper (unplated) at the end of the lead terminals due to the manufacturing process. A solder fillet at the exposed copper edge cannot be guaranteed and is not required to ensure a proper bottom solder connection. 2782.2008.05.1.0 www.analogictech.com 21 PRODUCT DATASHEET AAT2782 SystemPowerTM Triple Output PMIC: Dual Buck with Low-VIN LDO Advanced Analogic Technologies, Inc. 3230 Scott Boulevard, Santa Clara, CA 95054 Phone (408) 737-4600 Fax (408) 737-4611 © Advanced Analogic Technologies, Inc. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in AnalogicTech’s terms and conditions of sale, AnalogicTech assumes no liability whatsoever, and AnalogicTech disclaims any express or implied warranty relating to the sale and/or use of AnalogicTech products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders. 22 www.analogictech.com 2782.2008.05.1.0