INTEGRATED CIRCUITS 74ALVC16245/74ALVCH16245 2.5V/3.3V 16-bit bus transceiver with direction pin (3-State) Product specification Supersedes data of 1998 Jun 16 IC24 Data Handbook 1998 Jun 29 Philips Semiconductors Product specification 74ALVC16245/ 74ALVCH16245 16-bit bus transceiver with direction pin (3-State) FEATURES PIN CONFIGURATION • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A • CMOS low power consumption • MULTIBYTETM flow-through standard pin-out architecture • Low inductance multiple VCC and ground pins for minimum noise and ground bounce • Direct interface with TTL levels • All data inputs have bus hold (74ALVCH16245 only) • Output drive capability 50Ω transmission lines @ 85°C • Current drive ±24 mA at 3.0 V DESCRIPTION The 74ALVC16245(74ALVCH16245) is a 16-bit transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. The 74ALVC16245(74ALVCH16245) features two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for direction control. nOE controls the outputs so that the buses are effectively isolated. This device can be used as two 8-bit transceivers or one 16-bit transceiver. 1DIR 1 48 1OE 1B0 2 47 1A0 1B1 3 46 1A1 GND 4 45 GND 1B2 5 44 1A2 1B3 6 43 1A3 VCC1 7 42 VCC2 1B4 8 41 1A4 1B5 9 40 1A5 GND 10 39 GND 1B6 11 38 1A6 1B7 12 37 1A7 2B0 13 36 2A0 2B1 14 35 2A1 GND 15 34 GND 2B2 16 33 2A2 2B3 17 32 2A3 31 VCC2 VCC1 18 The 74ALVCH16245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors. 30 2A4 2B4 19 The 74ALVC16245 has 5V tolerant inputs. 2B5 20 29 2A5 GND 21 28 GND 2B6 22 27 2A6 2B7 23 26 2A7 2DIR 24 25 2OE SW00198 QUICK REFERENCE DATA GND = 0V; Tamb = 25°C; tr = tf ≤ 2.5ns PARAMETER SYMBOL tPHL/tPLH Propagation delay An to Bn; Bn to An CI Input capacitance CI/O Input/output capacitance CPD CONDITIONS TYPICAL UNIT 1.9 ns 4.0 pF 8.0 pF VCC = 2.5V, CL = 30pF VCC = 3.3V, CL = 50pF Power dissipation capacitance per buffer VI = GND to VCC1 Outputs enabled 29 Outputs disabled 5 pF NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of the outputs. ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 48-Pin Plastic SSOP Type III PACKAGES –40°C to +85°C 74ALVC16245 DL AC16245 DL SOT370-1 48-Pin Plastic TSSOP Type II –40°C to +85°C 74ALVC16245 DGG AC16245 DGG SOT362-1 48-Pin Plastic SSOP Type III –40°C to +85°C 74ALVCH16245 DL ACH16245 DL SOT370-1 48-Pin Plastic TSSOP Type II –40°C to +85°C 74ALVCH16245 DGG ACH16245 DGG SOT362-1 1998 Jun 29 2 853-2083 19638 Philips Semiconductors Product specification 74ALVC16245/ 74ALVCH16245 16-bit bus transceiver with direction pin (3-State) PIN DESCRIPTION LOGIC SYMBOL (IEEE/IEC) PIN NUMBER SYMBOL 1 1DIR 2, 3, 5, 6, 8, 9, 11, 12 NAME AND FUNCTION Direction control 1B0 to 1B7 Data inputs/outputs 1OE 48 G3 1DIR 1 3 EN1 [BA] 2OE 25 G6 2DIR 24 6 EN4 [BA] 3 EN2 [AB] 4, 10, 15, 21, 28, 34, 39, 45 GND 7, 18, 31, 42 VCC 13, 14, 16, 17, 19, 20, 22, 23 2B0 to 2B7 Ground (0V) Positive supply voltage Data inputs/outputs 24 2DIR Direction control 25 2OE Output enable input (active LOW) 36, 35, 33, 32, 30, 29, 27, 26 2A0 to 2A7 47, 46, 44, 43, 41, 40, 38, 37 1A0 to 1A7 6 EN5 [AB] 1A0 1A1 1A2 1A3 Data inputs/outputs Data inputs/outputs 1A5 1A6 Output enable input (active LOW) 1OE 1A7 2A0 46 3 44 5 43 6 41 8 40 9 38 11 37 12 36 1A1 2DIR 47 2 46 3 24 2A1 25 1OE 1B0 1B1 2A0 2A1 36 13 35 14 2A2 2OE 2A3 2B0 2A4 2A5 2B1 2A6 1A2 1A3 1A4 1A5 1A6 1A7 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 2B0 5 1 48 1A0 13 4 LOGIC SYMBOL 1DIR 2 1 2 1A4 48 47 44 5 43 6 41 8 40 9 38 11 37 12 1B2 2A2 1B3 2A3 1B4 2A4 1B5 2A5 1B6 2A6 1B7 2A7 33 16 32 17 30 19 29 20 27 22 26 23 2A7 2B2 35 14 33 16 32 17 30 19 29 20 27 22 26 23 2B1 2B2 2B3 2B4 2B5 2B6 2B7 SW00196 2B3 BUS HOLD CIRCUIT 2B4 VCC 2B5 2B6 2B7 Data Input To internal circuit SW00197 FUNCTION TABLE INPUTS INPUTS/OUTPUT nOE nDIR nAn nBn L L A=B inputs L H inputs B=A H X Z Z SW00044 H = HIGH voltage level L = LOW voltage level X = don’t care Z = high impedance OFF-state 1998 Jun 29 3 Philips Semiconductors Product specification 74ALVC16245/ 74ALVCH16245 16-bit bus transceiver with direction pin (3-State) RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER CONDITIONS UNIT MIN MAX DC supply voltage 2.5V range (for max. speed performance @ 30 pF output load) 2.3 2.7 DC supply voltage 3.3V range (for max. speed performance @ 50 pF output load) 3.0 3.6 DC supply voltage (for low-voltage applications) 1.2 3.6 V VI DC Input voltage range 0 VCC V VO DC output voltage range 0 VCC V –40 +85 °C 0 0 20 10 ns/V Tamb tr, tf Operating free-air temperature range VCC = 2.3 to 3.0V VCC = 3.0 to 3.6V Input rise and fall times ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL VCC IIK PARAMETER CONDITIONS DC supply voltage DC input diode current VI 0 For data inputs with bus hold1 VI DC input voltage DC output voltage Note 1 IO DC output source or sink current VO = 0 to VCC DC VCC or GND current Storage temperature range For temperature range: –40 to +125 °C above +55°C derate linearly with 11.3 mW/K above +55°C derate linearly with 8 mW/K NOTE: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Jun 29 –50 mA –0.5 to VCC +0.5 –0.5 to +4.6 VO Power dissipation per package –plastic medium-shrink (SSOP) –plastic thin-medium-shrink (TSSOP) V –0.5 to +4.6 VO VCC or VO 0 PTOT –0.5 to +4.6 For control pins1 DC output diode current Tstg UNIT For data inputs without bus hold1 IOK IGND, ICC RATING 4 50 V mA –0.5 to VCC +0.5 V 50 mA 100 mA –65 to +150 °C 850 600 mW Philips Semiconductors Product specification 74ALVC16245/ 74ALVCH16245 16-bit bus transceiver with direction pin (3-State) DC CHARACTERISTICS Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER VIH HIGH level Input In ut voltage VIL Input LOW level In ut voltage VOH HIGH level output out ut voltage TEST CONDITIONS Temp = -40°C to +85°C MIN TYP1 VCC = 2.3 to 2.7V 1.7 1.2 VCC = 2.7 to 3.6V 2.0 1.5 UNIT MAX V VCC = 2.3 to 2.7V 1.2 0.7 VCC = 2.7 to 3.6V 1.5 0.8 VCC = 2 2.3 3 to 3 3.6V; 6V; VI = VIH or VIL; IO = –100µA VCC–0.2 –0 2 VCC VCC = 2.3V; VI = VIH or VIL; IO = –6mA VCC–0.3 VCC–0.08 VCC = 2.3V; VI = VIH or VIL; IO = –12mA VCC–0.6 VCC–0.26 VCC = 2.7V; VI = VIH or VIL; IO = –12mA VCC–0.5 VCC–0.14 VCC = 3.0V; VI = VIH or VIL; IO = –12mA VCC–0.6 VCC–0.09 VCC = 3.0V; VI = VIH or VIL; IO = –24mA VCC–1.0 VCC–0.28 V V VCC = 2 2.3 3 to 3 3.6V; 6V; VI = VIH or VIL; IO = 100µA GND 0 20 0.20 VCC = 2.3V; VI = VIH or VIL; IO = 6mA 0.07 0.40 VCC = 2.3V; VI = VIH or VIL; IO = 12mA 0.15 0.70 VCC = 2.7V; VI = VIH or VIL; IO = 12mA 0.14 0.40 VCC = 3.0V; VI = VIH or VIL; IO = 24mA 0.27 0.55 Input leakage current VCC = 2.3 to 3.6V; VI = VCC or GND 0.1 5 µA IOZ 3-State output OFF-state current VCC = 2.3 to 3.6V; VI = VIH or VIL; VO = VCC or GND 0.1 10 µA ICC Quiescent supply current VCC = 2.3 to 3.6V; VI = VCC or GND; IO = 0 0.2 40 µA ∆ICC Additional quiescent supply current given per data I/O pin with bus hold VCC = 2.3V to 3.6V; VI = VCC – 0.6V; IO = 0 150 750 µA IBHL2 Bus hold LOW sustaining current IBHH2 Bus hold HIGH sustaining current IBHLO2 Bus hold LOW overdrive current VCC = 3.6V 500 µA IBHHO2 Bus hold HIGH overdrive current VCC = 3.6V –500 µA VOL II LOW level output voltage VCC = 2.3V; VI = 0.7V 45 – VCC = 3.0V; VI = 0.8V 75 150 VCC = 2.3V; VI = 1.7V –45 VCC = 3.0V; VI = 2.0V –75 V µA µA –175 NOTES: 1. All typical values are at Tamb = 25°C. 2. Valid for data inputs of bus hold parts. AC CHARACTERISTICS FOR VCC = 2.3V TO 2.7V RANGE GND = 0V; tr = tf ≤ 2.0ns; CL = 30pF LIMITS SYMBOL PARAMETER WAVEFORM VCC = 2.3 to 2.7V UNIT MIN TYP1 MAX tPHL/tPLH Propagation delay nAn to nBn; nBn to nAn 1, 3 1.0 2.0 3.7 ns tPZH/tPZL 3-State output enable time nOE to nAn; nOE to nBn 2, 3 1.0 2.7 5.7 ns tPHZ/tPLZ 3-State output disable time nOE to nAn; nOE to nBn 2, 3 1.0 2.2 5.2 ns NOTES: 1. All typical values are measured at Tamb = 25°C and VCC = 2.5V. 1998 Jun 29 5 Philips Semiconductors Product specification 74ALVC16245/ 74ALVCH16245 16-bit bus transceiver with direction pin (3-State) AC CHARACTERISTICS FOR VCC = 3.0V TO 3.6V RANGE AND VCC = 2.7V GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF LIMITS SYMBOL PARAMETER VCC = 3.3 ± 0.3V WAVEFORM VCC = 2.7V UNIT MIN TYP1, 2 MAX MIN TYP1 MAX tPHL/tPLH Propagation delay nAn to nBn; nBn to nAn 1, 3 1.0 1.9 3.0 1.0 2.1 3.6 ns tPZH/tPZL 3-State output enable time nOE to nAn; nOE to nBn 2, 3 1.0 2.3 4.4 1.0 3.0 5.4 ns tPHZ/tPLZ 3-State output disable time nOE to nAn; nOE to nBn 2, 3 1.0 2.8 4.1 1.0 3.1 4.6 ns NOTES: 1. All typical values are measured at Tamb = 25°C. 2. Typical value is measured at VCC = 3.3V AC WAVEFORMS FOR VCC = 2.3V TO 2.7V AND VCC < 2.3V RANGE VM = 0.5 VCC VX = VOL + 0.15V VY = VOH –0.15V VOL and VOH are the typical output voltage drop that occur with the output load. V =V CC I AC WAVEFORMS FOR VCC = 3.0V TO 3.6V AND VCC = 2.7V RANGE VM = 1.5 V VX = VOL + 0.3V VY = VOH –0.3V VOL and VOH are the typical output voltage drop that occur with the output load. V = 2.7V I VI An, Bn INPUT VI VM OE INPUT GND tPHL tPLH VM GND VOH Bn, An OUTPUT VOL tPLZ VM tPZL VCC OUTPUT LOW-to-OFF OFF-to-LOW SW00063 Waveform 1. Input (nAn, nBn) to output (nBn, nAn) propagation delay times VM VX VOL tPHZ tPZH VOH VY OUTPUT HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled SW00064 Waveform 2. 3-State enable and disable times 1998 Jun 29 6 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin (3-State) TEST CIRCUIT S1 VCC RL = 500 Ω VO VI PULSE GENERATOR 2 * VCC Open GND D.U.T. RT RL = 500 Ω CL Test Circuit for switching times DEFINITIONS RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. SWITCH POSITION TEST tPLH/tPHL S1 Open tPLZ/tPZL 2 VCC tPHZ/tPZH GND VCC VI < 2.7V VCC 2.7–3.6V 2.7V SV00906 Waveform 3. Load circuitry for switching times 1998 Jun 29 7 74ALVC16245/ 74ALVCH16245 Philips Semiconductors Product specification 2.5V/3.3V 16-bit bus transceiver with direction pin (3-State) SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm 1998 Jun 29 8 74ALVC16245/ 74ALVCH16245 SOT370-1 Philips Semiconductors Product specification 2.5V/3.3V 16-bit bus transceiver with direction pin (3-State) TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm 1998 Jun 29 9 74ALVC16245/ 74ALVCH16245 SOT362-1 Philips Semiconductors Product specification 2.5V/3.3V 16-bit bus transceiver with direction pin (3-State) 74ALVC16245/ 74ALVCH16245 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Date of release: 06-98 Document order number: 1998 Jun 29 10 9397-750-04538