PHILIPS ACH16825DGG 18-bit buffer/driver 3-state Datasheet

INTEGRATED CIRCUITS
74ALVCH16825
18-bit buffer/driver (3-State)
Product specification
IC24 Data Handbook
1998 Jul 27
Philips Semiconductors
Product specification
18-bit buffer/driver (3-State)
74ALVCH16825
FEATURES
PIN CONFIGURATION
• Wide supply voltage range of 1.2V to 3.6V
• Complies with JEDEC standard no. 8-1A.
• CMOS low power consumption
• Direct interface with TTL levels
• Current drive ± 24 mA at 3.0 V
• MULTIBYTETM flow-through standard pin-out architecture
• Low inductance multiple VCC and GND pins for minimum noise
and ground bounce
• All data inputs have bus hold
• Output drive capability 50Ω transmission lines @ 85°C
DESCRIPTION
The 74ALVCH16825 is an 18–bit non-inverting buffer/driver with
3-State outputs for bus-oriented applications.
The 74ALVCH16825 consists of two 9-bit sections with separate
output enable signals. For either 9-bit buffer section, the two output
enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be
LOW for corresponding D outputs to be active. If either output
enable input is HIGH, the outputs of that 9-buffer section are in the
high impedance state.
The 74ALVCH16825 has active bus hold circuitry which is provided
to hold unused or floating data inputs at a valid logic level. This
feature eliminates the need for external pull-up or pull-down
resistors.
1OE2
1OE1
1
56
1Y1
2
55
1A0
1Y1
3
54
1A1
GND
4
53
GND
1Y2
5
52
1A2
1Y3
6
51
1A3
VCC
7
50
VCC
1Y4
8
49
1A4
1Y5
9
48
1A5
1Y6
10
47
1A6
GND
11
46
GND
1Y7
12
45
1A7
1Y8
13
44
1A8
GND
14
43
GND
GND
15
42
GND
2Y0
16
41
2A0
2Y1
17
40
2A1
GND
18
39
GND
2Y2
19
38
2A2
2Y3
20
37
2A3
2Y4
21
36
2A4
VCC
22
35
VCC
2Y5
23
34
2A5
2Y6
24
33
2A6
GND
25
32
GND
2Y7
26
31
2A7
2Y8
27
30
2A8
2OE1
28
29
2OE2
SH00139
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr = tf ≤ 2.5ns
PARAMETER
SYMBOL
Propagation delay
tPHL/tPLH
CP to Qn
CI
Input capacitance
CPD
Power dissipation
dissi ation capacitance
ca acitance per
er latch
CONDITIONS
VCC = 2.5V, CL = 30pF
VCC = 3.3V, CL = 50pF
VI = GND to VCC1
Output enabled
Output disabled
TYPICAL
2.0
2.0
4.0
19
3
UNIT
ns
pF
pF
F
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of outputs.
ORDERING INFORMATION
PACKAGES
56-Pin Plastic Thin Shrink Small Outline (TSSOP) Type II
1998 Jul 27
TEMPERATURE
RANGE
OUTSIDE NORTH
AMERICA
NORTH AMERICA
DRAWING
NUMBER
–40°C to +85°C
74ALVCH16825 DGG
ACH16825 DGG
SOT364-1
2
853-2097 19785
Philips Semiconductors
Product specification
18-bit buffer/driver (3-State)
74ALVCH16825
PIN DESCRIPTION
PIN NUMBER
FUNCTION TABLE
SYMBOL
1
1OE1
56
1OE2
55, 54, 52, 51, 49,
48, 47, 45, 44
Output enable input
(active LOW)
1A0 to 1A8
Data inputs
2, 3, 5, 6, 8,
9, 10, 12, 13
1Y0 to 1Y8
Data outputs
4, 11, 14, 15, 18, 25,
32, 39, 42, 43, 46, 53
GND
Ground (0V)
7, 22, 35, 50
VCC
Positive supply voltage
28
2OE1
29
2OE2
43, 42, 41, 40, 38,
37, 36, 34, 33, 31
2A0 to 2A8
16, 17, 19, 20, 21,
23, 24, 26, 27
INPUTS
NAME AND FUNCTION
H
L
X
Z
nOE2
L
L
L
L
L
L
H
H
H
X
X
Z
X
H
X
Z
=
=
=
=
HIGH voltage level
LOW voltage level
Don’t care
High impedance “off” state
LOGIC SYMBOL (IEEE/IEC)
Output enable input
(active LOW)
Data inputs
1OE1
2Y0 to 2Y8
A
OUTPUT
Y
nOE1
1
&
EN1
1OE2 56
Data outputs
2OE1 28
2OE2 29
&
EN2
LOGIC SYMBOL
1A0 55
1
2
1Y0
3
1Y1
1A2 52
5
1Y2
1A3 51
6
1Y3
55
1A4 49
8
1Y4
54
1A5 48
9
1Y5
52
1A6 47
10
1Y6
51
1A7 45
12
1Y7
49
1A8 44
13
1Y8
48
2A0 41
16
2Y0
47
2A1 40
17
2Y1
19
2Y2
56
1OE1 1OE2
2
3
5
6
8
1A0
1Y0
1A1
1Y1
1A2
1Y2
1A3
1Y3
1A4
1Y4
1, 1 ∇
1A1 54
1, 2 ∇
1Y5
1A5
1Y6
1A6
1Y7
1A7
45
2A2 38
13
1Y8
1A8
44
2A3 37
20
2Y3
16
2Y0
2A0
41
2A4 36
21
2Y4
17
2Y1
40
2A5 34
23
2Y5
19
2Y2
38
2A6 33
24
2Y6
20
2Y3
2A3
37
2A7 31
26
2Y7
21
2Y4
2A4
36
2A8 30
27
2Y8
23
2Y5
2A5
34
24
2Y6
2A6
33
26
2Y7
2A7
31
27
2Y8
2A8
30
9
10
12
2A1
2A2
SH00141
2OE1 2OE2
28
29
SH00142
1998 Jul 27
3
Philips Semiconductors
Product specification
18-bit buffer/driver (3-State)
74ALVCH16825
LOGIC DIAGRAM
BUS HOLD CIRCUIT
VCC
nOE1
nOE2
nAn
Data Input
nYn
To internal circuit
TO 8 OTHER CHANNELS
SH00140
SW00044
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
PARAMETER
CONDITIONS
MIN
MAX
DC supply voltage 2.5V range (for max. speed
performance @ 30 pF output load)
2.3
2.7
DC supply voltage 3.3V range (for max. speed
performance @ 50 pF output load)
3.0
3.6
UNIT
V
VI
DC Input voltage range
0
VCC
V
VO
DC output voltage range
0
VCC
V
–40
+85
°C
0
0
20
10
ns/V
Tamb
Operating free-air temperature range
tr, tf
Input rise and fall times
VCC = 2.3 to 3.0V
VCC = 3.0 to 3.6V
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
VCC
IIK
PARAMETER
CONDITIONS
DC supply voltage
DC input diode current
VI 0
For control
pins2
VI
DC in
input
ut voltage
IOK
DC output diode current
VO VCC or VO 0
VO
DC output voltage
Note 2
IO
DC output source or sink current
VO = 0 to VCC
IGND, ICC
Tstg
PTOT
For data inputs2
DC VCC or GND current
Storage temperature range
Power dissipation per package
–plastic medium-shrink (SSOP)
–plastic thin-medium-shrink (TSSOP)
For temperature range: –40 to +125 °C
above +55°C derate linearly with 11.3 mW/K
above +55°C derate linearly with 8 mW/K
RATING
UNIT
–0.5 to +4.6
V
–50
mA
–0.5 to +4.6
–0.5 to VCC +0.5
V
50
mA
–0.5 to VCC +0.5
V
50
mA
100
mA
–65 to +150
°C
850
600
mW
NOTE:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jul 27
4
Philips Semiconductors
Product specification
18-bit buffer/driver (3-State)
74ALVCH16825
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
VIH
HIGH level Input voltage
VIL
LOW level Input voltage
VOH
O
HIGH level output voltage
TEST CONDITIONS
Temp = -40°C to +85°C
MIN
TYP1
VCC = 2.3 to 2.7V
1.7
1.2
VCC = 2.7 to 3.6V
2.0
1.5
UNIT
MAX
V
VCC = 2.3 to 2.7V
1.2
0.7
VCC = 2.7 to 3.6V
1.5
0.8
V
3 to 3
6V; VI = VIH or VIL; IO = –100µA
100µA
VCC = 2
2.3
3.6V;
02
VCC0.2
VCC
VCC = 2.3V; VI = VIH or VIL; IO = –6mA
VCC0.3
VCC0.08
VCC = 2.3V; VI = VIH or VIL; IO = –12mA
VCC0.6
VCC0.26
VCC = 2.7V; VI = VIH or VIL; IO = –12mA
VCC0.5
VCC0.14
VCC = 3.0V; VI = VIH or VIL; IO = –12mA
VCC0.6
VCC0.09
VCC = 3.0V; VI = VIH or VIL; IO = –24mA
VCC1.0
VCC0.28
V
VCC = 2
2.3
3 to 3
3.6V;
6V; VI = VIH or VIL; IO = 100µA
GND
0 20
0.20
V
VCC = 2.3V; VI = VIH or VIL; IO = 6mA
0.07
0.40
V
VCC = 2.3V; VI = VIH or VIL; IO = 12mA
0.15
0.70
VCC = 2.7V; VI = VIH or VIL; IO = 12mA
0.14
0.40
VCC = 3.0V; VI = VIH or VIL; IO = 24mA
0.27
0.55
Input leakage
g current
VCC = 2
2.3
3 to 3
3.6V;
6V;
VI = VCC or GND
0.1
5
µA
µ
IOZ
3-State output OFF-state current
VCC = 2.3 to 3.6V; VI = VIH or VIL;
VO = VCC or GND
0.1
10
µA
ICC
Quiescent supply current
VCC = 2.3 to 3.6V; VI = VCC or GND; IO = 0
0.2
40
µA
∆ICC
Additional quiescent supply current
VCC = 2.3V to 3.6V; VI = VCC – 0.6V; IO = 0
150
750
µA
IBHL2
Bus hold LOW sustaining current
IBHH2
Bus hold HIGH sustaining current
IBHLO2
IBHHO2
VOL
II
LOW level output voltage
VCC = 2.3V; VI = 0.7V
45
–
VCC = 3.0V; VI = 0.8V
75
150
VCC = 2.3V; VI = 1.7V
–45
VCC = 3.0V; VI = 2.0V
–75
Bus hold LOW overdrive current
VCC = 3.6V
500
µA
Bus hold HIGH overdrive current
VCC = 3.6V
–500
µA
NOTES:
1. All typical values are at Tamb = 25°C.
2. Valid for data inputs of bus hold parts.
1998 Jul 27
V
5
–175
µA
µA
Philips Semiconductors
Product specification
18-bit buffer/driver (3-State)
74ALVCH16825
AC CHARACTERISTICS FOR VCC = 2.3V TO 2.7V RANGE
GND = 0V; tr = tf ≤ 2.0ns; CL = 30pF
LIMITS
SYMBOL
PARAMETER
WAVEFORM
VCC = 2.3 to 2.7V
UNIT
MIN
TYP1
MAX
tPHL/tPLH
Propagation delay
nAn to nYn
1, 3
1.0
2.0
4.1
ns
tPZH/tPZL
3-State output enable time
nOEn to nYn
2, 3
1.0
2.9
6.0
ns
tPHZ/tPLZ
3-State output disable time
nOEn to nYn
2,3
1.2
2.2
5.6
ns
NOTE:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
AC CHARACTERISTICS FOR VCC = 3.0V TO 3.6V RANGE AND VCC = 2.7V
GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF
SYMBOL
PARAMETER
WAVEFORM
LIMITS
LIMITS
VCC = 3.3 ± 0.3V
VCC = 2.7V
UNIT
MIN
TYP1, 2
MAX
MIN
TYP1
MAX
tPHL/tPLH
Propagation delay
nAn to nYn
1, 3
1.0
2.0
3.4
1.0
2.1
3.9
ns
tPZH/tPZL
3-State output enable time
nOEn to nYn
2, 3
1.0
2.8
4.7
1.0
2.9
5.7
ns
tPHZ/tPLZ
3-State output disable time
nOEn to nYn
2, 3
1.3
2.9
4.5
1.3
3.0
4.9
ns
NOTES:
1. All typical values are measured Tamb = 25°C.
2. Typical value is measured at VCC = 3.3V
AC WAVEFORMS FOR VCC = 2.3V TO 2.7V AND
VCC < 2.3V RANGE
VI
VM = 0.5 VCC
VX = VOL + 0.15V
VY = VOH –0.15V
VOL and VOH are the typical output voltage drop that occur with the
output load.
nOE INPUT
VM
GND
tPLZ
AC WAVEFORMS FOR VCC = 3.0V TO 3.6V AND
VCC = 2.7V RANGE
OUTPUT
LOW-to-OFF
OFF-to-LOW
VM = 1.5 V
VX = VOL + 0.3V
VY = VOH –0.3V
VOL and VOH are the typical output voltage drop that occur with the
output load.
V = 2.7V
I
V =V
I
CC
VOL
tPHZ
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
VY
VM
GND
outputs
enabled
VM
outputs
disabled
outputs
enabled
SH00137
tPLH
tPHL
Waveform 2. 3-State enable and disable times
VOH
VM
VOL
SH00132
Waveform 1. Input (Dn) to output (Yn) propagation delay
1998 Jul 27
tPZH
VOH
GND
Yn
OUTPUT
VM
VX
VI
An
INPUT
tPZL
VCC
6
Philips Semiconductors
Product specification
18-bit buffer/driver (3-State)
74ALVCH16825
TEST CIRCUIT
S1
VCC
RL = 500 Ω
VO
VI
PULSE
GENERATOR
2 * VCC
Open
GND
D.U.T.
RT
RL = 500 Ω
CL
Test Circuit for switching times
DEFINITIONS
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to ZOUT of pulse generators.
SWITCH POSITION
TEST
tPLH/tPHL
S1
Open
tPLZ/tPZL
2 VCC
tPHZ/tPZH
GND
VCC
VI
< 2.7V
VCC
2.7–3.6V
2.7V
SV00906
Waveform 3. Load circuitry for switching times
1998 Jul 27
7
Philips Semiconductors
Product specification
18-bit buffer/driver (3-State)
74ALVCH16825
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm
1998 Jul 27
8
SOT364-1
Philips Semiconductors
Product specification
18-bit buffer/driver (3-State)
74ALVCH16825
NOTES
1998 Jul 27
9
Philips Semiconductors
Product specification
18-bit buffer/driver (3-State)
74ALVCH16825
Data sheet status
Data sheet
status
Product
status
Definition [1]
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Document order number:
1998 Jul 27
10
Date of release: 07-98
9397-750-04555
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