Aeroflex ACT-9S512K8X-020L2I Act-ps512k8 high speed 4 megabit plastic monolithic sram Datasheet

ACT-PS512K8 High Speed
4 Megabit Plastic Monolithic SRAM
Plastic Path™ Features
Vss
Vcc
512Kx8
8
I/O0-7
Pin Description
I/O0-7
Data I/O
A0–18
Address Inputs
WE
Write Enable
CE
Chip Enable
OE
Output Enable
VCC
Power Supply
VSS
Ground
NC
Not Connected
A E RO
C
F
LE
X LA
ISO
9001
E
I NC .
CE
WE
OE
A0 – A18
www.aeroflex.com
S
Block Diagram – SOJ (L2)
CIRCUIT TECHNOLOGY
B
Low Power Monolithic CMOS 512K x 8 SRAM
■ Operating Temperature Range
● Full Military (-55°C to +125°C)
● Industrial (-40°C to +85°C)
■ Burn-in and Temperature Cycle Available
■ 10, 12, 15, 17, 20 & 25ns Access Times
■ +5V Power Supply
■ Industry Standard Pinouts
● Center Power / Ground Pins
■ TTL Compatible I/O
■ 3.3V Device I/O Interfacing
■ JEDEC Standard 36 pin Plastic SOJ Package
● 36 Lead, .93" x .405" x 0.148 Small Outline J lead (SOJ),
Aeroflex code# "L2"
■ Fully Static Operation
● No Clocks or Refresh Required
■
RTIFIED
General Description
The ACT-PS512K8 is a
Plastic High Speed, 4 Megabit
(4,194,304
bits)
CMOS
Monolithic SRAM organized as
524,288 words by 8 bits.
Designed for high-speed, high
density, high reliablility, mass
memory and fast cache system
applications.
The plastic monolithic is
input
and
output
TTL
compatible. Writing is executed
when the write enable (WE)
and chip enable (CE) inputs are
low. Reading is accomplished
when WE is high and CE and
output enable (OE) are both
low. Access time grades of
10ns 12ns, 15ns, 17ns, 20ns
and 25ns are standard.
eroflex Circuit Technology - Advanced Multichip Modules © SCD3764 REV A 6/2/98
Absolute Maximum Ratings
Symbol
Parameter
TC
TSTG
MINIMUM
MAXIMUM
Units
Case Operating Temperature
-55
+125
°C
Storage Temperature
-65
+150
°C
1.0
W
PD
Maximum Package Power Dissipation
VG
Maximum Signal Voltage to Ground
-0.5
VCC + 0.5
V
VCC
Power Supply Voltage
-0.5
+7.0
V
Recommended Operating Conditions
Symbol
Parameter
Minimum
Maximum
Units
+4.5
+5.5
V
0
0
V
VCC
Power Supply Voltage
VSS
Ground
VIH
Input High Voltage
+2.2
VCC + 0.5
V
VIL
Input Low Voltage
-0.5
+0.8
V
TC
Operating Temperature (Military)
-55
+125
°C
TC
Operating Temperature (Industrial)
-40
+85
°C
Truth Table
Mode
CE
WE
OE
Data I/O
Standby
Output Disable
Read
Write
H
L
L
L
X
H
H
L
X
H
L
X
High Z
High Z
Data OUT
Data IN
Supply
Current
ISB
ICC
ICC
ICC
Capacitance
(VIN & VOUT = 0V, f = 1MHz, TC = 25°C, unless otherwise noted, Guaranteed but not tested)
Symbol
CIN
COUT
Parameter
Maximum
Units
Input Capacitance (A0-18, WE & OE)
6
pF
Output Capacitance (I/O0-7 & CE)
8
pF
DC Characteristics
(VCC = 5.0V, VSS = 0V, TC = -55°C to +125°C or -40°C to +85°C)
Parameter
Sym
Conditions
Min
Max
Units
Input Leakage Current
ILI
VCC = Max, VIN = VSS to VCC
-10
+10
µA
Output Leakage Current
ILO
-10
+10
µA
Operating Supply Current
ICC
CE = VIH, OE = VIH, VOUT = VSS to VCC
CE = VIL, OE = VIH,f =5MHz,Vcc=5.5V
130
mA
Standby Current
ISB
CE = VIH, OE= VIH, f =5MHz,Vcc=5.5V
20
mA
Output Low Voltage
VOL IOL = 8 mA, Vcc = 4.5V
0.4
V
Output High Voltage
VOH IOH = -4 mA, Vcc = 4.5V
2.4
V
Note: DC Test conditions: VIL = 0.3V, VIH = Vcc - 0.3V.
Aeroflex Circuit Technology
2
SCD3764 REV A 6/2/98 Plainview NY (516) 694-6700
AC Characteristics
(VCC = 5.0V, VSS= 0V, TC = -55°C to +125°C or -40°C to +85°C)
Read Cycle
Parameter
Sym
–010
–012
–015
–017
–020
–025
Min Max Min Max Min Max Min Max Min Max Min Max
Units
ns
Read Cycle Time
tRC
Address Access Time
tAA
10
12
15
17
20
25
ns
Chip Enable Access Time
tACE
10
12
15
17
20
25
ns
Output Hold from Address Change
tOH
Output Enable to Output Valid
tOE
Chip Enable to Output in Low Z (1)
tCLZ
3
3
3
3
3
3
ns
Output Enable to Output in Low Z (1)
tOLZ
0
0
0
0
0
0
ns
Chip Deselect to Output in High Z (1)
tCHZ
5
6
7
7
8
10
ns
Output Disable to Output in High Z (1) tOHZ
5
6
7
7
8
10
ns
10
12
3
15
3
5
17
3
6
20
3
25
4
7
8
ns
5
10
ns
12
Note 1. Guaranteed by design, but not tested
Write Cycle
–010
–012
–015
–017
–020
–025
Min Max Min Max Min Max Min Max Min Max Min Max
Parameter
Sym
Write Cycle Time
tWC
10
12
15
17
20
25
ns
Chip Enable to End of Write
tCW
7
8
10
12
13
15
ns
Address Valid to End of Write
tAW
7
8
10
12
13
15
ns
Data Valid to End of Write
tDW
5
6
8
8
9
10
ns
Write Pulse Width
tWP
7
8
10
12
13
15
ns
Address Setup Time
tAS
0
0
0
0
0
0
ns
Address Hold Time
tAH
0
0
0
0
0
0
ns
Output Active from End of Write (1)
tOW
3
3
3
3
4
5
ns
Write to Output in High Z (1)
tWHZ
tDH
Data Hold from Write Time
5
6
0
0
7
0
8
0
8
0
Units
10
ns
0
ns
Note 1. Guaranteed by design, but not tested
Data Retention Electrical Characteristics (Special Order Only)
VCC = 5.0V, VSS= 0V, TC = -55°C to +125°C or -40°C to +85°C)
Parameter
Sym
Test Conditions
VCC for Data Retention
VDR
CE ≥ VCC – 0.2V
Data Retention Current
ICCDR1
VCC = 3V
Aeroflex Circuit Technology
3
Min
All Speeds
Typ
2
0.5
Max
Units
5.5
V
2.0
mA
SCD3764 REV A 6/2/98 Plainview NY (516) 694-6700
Timing Diagrams — SRAM
Write Cycle Timing Diagrams
Read Cycle Timing Diagrams
Write Cycle (SWE Controlled, OE = VIH)
Read Cycle 1 (SCE = OE = VIL, SWE = VIH)
tWC
tRC
A0-18
A0-18
tAA
tAW
tCW
tOH
DI/O
Previous Data Valid
tAH
SCE
Data Valid
tAS
tWP
SWE
tOW
tWHZ
tDW
SEE NOTE
D I/O
tDH
Data Valid
Read Cycle 2 (SWE = VIH)
tRC
Write Cycle (SCE Controlled, OE = VIH )
A0-18
tWC
tAA
A0-18
tAH
tAW
SCE
tACE
tAS
tCHZ
tCLZ
SEE NOTE
SCE
tOHZ
SWE
tCW
SEE NOTE
OE
tWP
tOE
SEE NOTE
tOLZ
SEE NOTE
DI/O
tDW
DI/O
UNDEFINED
tDH
Data Valid
High Z
Data Valid
Note: Guaranteed by design, but not tested.
DON’T CARE
AC Test Circuit
Current Source
AC Test Conditions
IOL
VZ ~ 1.5 V (Bipolar Supply)
To Device Under Test
C L = 50 pF
Parameter
Typical
Units
Input Pulse Level
0 – 3.0
V
Input Rise and Fall
5
ns
Input and Output Timing Reference Level
1.5
V
IOH
Current Source
Notes:
1) VZ is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 mA. 3) Tester Impedance
ZO = 75Ω. 4) VZ is typically the midpoint of VOH and VOL. 5) IOL and IOH are adjusted to simulate a typical resistance
load circuit. 6) ATE Tester includes jig capacitance.
Aeroflex Circuit Technology
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SCD3764 REV A 6/2/98 Plainview NY (516) 694-6700
Pin Numbers & Functions
36 Pins — SOJ
Pin #
Function
Pin #
Function
1
A0
19
NC
2
A1
20
A10
3
A2
21
A11
4
A3
22
A12
5
A4
23
A13
6
CE
24
A14
7
I/O0
25
I/O4
8
I/O1
26
I/O5
9
VCC
27
VCC
10
VSS
28
VSS
11
I/O2
29
I/O6
12
I/O3
30
I/O7
13
WE
31
OE
14
A5
32
A15
15
A6
33
A16
16
A7
34
A17
17
A8
35
A18
18
A9
36
NC
Package Outline "L2" — SOJ Package, 36 Leads
36
23.62 (.930)
23.37 (.920)
19
11.30 (.445)
11.05 (.435)
10.29 (.405)
10.03 (.395)
1
9.65 (.380)
9.14 (.360)
18
.69 MIN
(.027)
3.76 (.148) MAX
0.95
(.037)
1.27 TYP
(.050)
.43 +.10
-.05
TYP
(.017 +.004)
-.002)
.004 MAX
All dimensions in inches
Dimensions in millmeters mm
Dimensions in inches (.xxx)
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SCD3764 REV A 6/2/98 Plainview NY (516) 694-6700
CIRCUIT TECHNOLOGY
Ordering Information (Typical)
Model Number
Options
Speed
Package
ACT-PS512K8N–010L2I
None
10ns
36 Lead SOJ
ACT-PS512K8W–012L2I
Burn-in
12ns
36 Lead SOJ
ACT-PS512K8X–015L2T
Temp Cycle
15ns
36 Lead SOJ
ACT-PS512K8Y–017L2T
Temp Cycle & Burn-in
17ns
36 Lead SOJ
ACT-PS512K8Y–020L2T
Temp Cycle & Burn-in
20ns
36 Lead SOJ
ACT-PS512K8Y–025L2T
Temp Cycle & Burn-in
25ns
36 Lead SOJ
Part Number Breakdown
\\\
Aeroflex Circuit
Technology
ACT- P S 512K 8 N– 010 L2 T
Plastic Path
Electrical Testing
I = Industrial Temp, -40°C to +85°C
T = Military Temp, -55°C to +125°C
Memory Type
S = Plastic SRAM
Memory Depth, Locations
Memory Width, Bits
Package Type & Size
Options
N = None
W = Burn-in *
X = Temperature Cycle *
Y = Burn-in & Temperature Cycle
L2 = 36 Pin Plastic SOJ
* Screened to the test methods of MIL-STD-883
*
Memory Speed, ns
010 = 10ns
012 = 12ns
015 = 15ns
017 = 17ns
020 = 20ns
025 = 25ns
Telephone: (516) 694-6700
FAX:
(516) 694-6715
Toll Free Inquiries: 1-(800) 843-1553
Aeroflex Circuit Technology
35 South Service Road
Plainview New York 11830
Aeroflex Circuit Technology
6
SCD3764 REV A 6/2/98 Plainview NY (516) 694-6700
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